1 /* ----------------------------------------------------------------------- *
2 *
3 * Copyright 2002-2004 H. Peter Anvin - All Rights Reserved
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation, Inc., 53 Temple Place Ste 330,
8 * Boston MA 02111-1307, USA; either version 2 of the License, or
9 * (at your option) any later version; incorporated herein by reference.
10 *
11 * ----------------------------------------------------------------------- */
12
13 /*
14 * raid6/x86.h
15 *
16 * Definitions common to x86 and x86-64 RAID-6 code only
17 */
18
19 #ifndef LINUX_RAID_RAID6X86_H
20 #define LINUX_RAID_RAID6X86_H
21
22 #if (defined(__i386__) || defined(__x86_64__)) && !defined(__arch_um__)
23
24 #ifdef __KERNEL__ /* Real code */
25
26 #include <asm/fpu/api.h>
27
28 #else /* Dummy code for user space testing */
29
kernel_fpu_begin(void)30 static inline void kernel_fpu_begin(void)
31 {
32 }
33
kernel_fpu_end(void)34 static inline void kernel_fpu_end(void)
35 {
36 }
37
38 #define __aligned(x) __attribute__((aligned(x)))
39
40 #define X86_FEATURE_MMX (0*32+23) /* Multimedia Extensions */
41 #define X86_FEATURE_FXSR (0*32+24) /* FXSAVE and FXRSTOR instructions
42 * (fast save and restore) */
43 #define X86_FEATURE_XMM (0*32+25) /* Streaming SIMD Extensions */
44 #define X86_FEATURE_XMM2 (0*32+26) /* Streaming SIMD Extensions-2 */
45 #define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */
46 #define X86_FEATURE_SSSE3 (4*32+ 9) /* Supplemental SSE-3 */
47 #define X86_FEATURE_AVX (4*32+28) /* Advanced Vector Extensions */
48 #define X86_FEATURE_AVX2 (9*32+ 5) /* AVX2 instructions */
49 #define X86_FEATURE_AVX512F (9*32+16) /* AVX-512 Foundation */
50 #define X86_FEATURE_AVX512DQ (9*32+17) /* AVX-512 DQ (Double/Quad granular)
51 * Instructions
52 */
53 #define X86_FEATURE_AVX512BW (9*32+30) /* AVX-512 BW (Byte/Word granular)
54 * Instructions
55 */
56 #define X86_FEATURE_AVX512VL (9*32+31) /* AVX-512 VL (128/256 Vector Length)
57 * Extensions
58 */
59 #define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */
60
61 /* Should work well enough on modern CPUs for testing */
boot_cpu_has(int flag)62 static inline int boot_cpu_has(int flag)
63 {
64 u32 eax, ebx, ecx, edx;
65
66 eax = (flag & 0x100) ? 7 :
67 (flag & 0x20) ? 0x80000001 : 1;
68 ecx = 0;
69
70 asm volatile("cpuid"
71 : "+a" (eax), "=b" (ebx), "=d" (edx), "+c" (ecx));
72
73 return ((flag & 0x100 ? ebx :
74 (flag & 0x80) ? ecx : edx) >> (flag & 31)) & 1;
75 }
76
77 #endif /* ndef __KERNEL__ */
78
79 #endif
80 #endif
81