1 /*
2 * Copyright 2014 IBM Corp.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9
10 #include <linux/spinlock.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/device.h>
14 #include <linux/mutex.h>
15 #include <linux/init.h>
16 #include <linux/list.h>
17 #include <linux/mm.h>
18 #include <linux/of.h>
19 #include <linux/slab.h>
20 #include <linux/idr.h>
21 #include <linux/pci.h>
22 #include <linux/sched/task.h>
23
24 #include <asm/cputable.h>
25 #include <misc/cxl-base.h>
26
27 #include "cxl.h"
28 #include "trace.h"
29
30 static DEFINE_SPINLOCK(adapter_idr_lock);
31 static DEFINE_IDR(cxl_adapter_idr);
32
33 uint cxl_verbose;
34 module_param_named(verbose, cxl_verbose, uint, 0600);
35 MODULE_PARM_DESC(verbose, "Enable verbose dmesg output");
36
37 const struct cxl_backend_ops *cxl_ops;
38
cxl_afu_slbia(struct cxl_afu * afu)39 int cxl_afu_slbia(struct cxl_afu *afu)
40 {
41 unsigned long timeout = jiffies + (HZ * CXL_TIMEOUT);
42
43 pr_devel("cxl_afu_slbia issuing SLBIA command\n");
44 cxl_p2n_write(afu, CXL_SLBIA_An, CXL_TLB_SLB_IQ_ALL);
45 while (cxl_p2n_read(afu, CXL_SLBIA_An) & CXL_TLB_SLB_P) {
46 if (time_after_eq(jiffies, timeout)) {
47 dev_warn(&afu->dev, "WARNING: CXL AFU SLBIA timed out!\n");
48 return -EBUSY;
49 }
50 /* If the adapter has gone down, we can assume that we
51 * will PERST it and that will invalidate everything.
52 */
53 if (!cxl_ops->link_ok(afu->adapter, afu))
54 return -EIO;
55 cpu_relax();
56 }
57 return 0;
58 }
59
_cxl_slbia(struct cxl_context * ctx,struct mm_struct * mm)60 static inline void _cxl_slbia(struct cxl_context *ctx, struct mm_struct *mm)
61 {
62 unsigned long flags;
63
64 if (ctx->mm != mm)
65 return;
66
67 pr_devel("%s matched mm - card: %i afu: %i pe: %i\n", __func__,
68 ctx->afu->adapter->adapter_num, ctx->afu->slice, ctx->pe);
69
70 spin_lock_irqsave(&ctx->sste_lock, flags);
71 trace_cxl_slbia(ctx);
72 memset(ctx->sstp, 0, ctx->sst_size);
73 spin_unlock_irqrestore(&ctx->sste_lock, flags);
74 mb();
75 cxl_afu_slbia(ctx->afu);
76 }
77
cxl_slbia_core(struct mm_struct * mm)78 static inline void cxl_slbia_core(struct mm_struct *mm)
79 {
80 struct cxl *adapter;
81 struct cxl_afu *afu;
82 struct cxl_context *ctx;
83 int card, slice, id;
84
85 pr_devel("%s called\n", __func__);
86
87 spin_lock(&adapter_idr_lock);
88 idr_for_each_entry(&cxl_adapter_idr, adapter, card) {
89 /* XXX: Make this lookup faster with link from mm to ctx */
90 spin_lock(&adapter->afu_list_lock);
91 for (slice = 0; slice < adapter->slices; slice++) {
92 afu = adapter->afu[slice];
93 if (!afu || !afu->enabled)
94 continue;
95 rcu_read_lock();
96 idr_for_each_entry(&afu->contexts_idr, ctx, id)
97 _cxl_slbia(ctx, mm);
98 rcu_read_unlock();
99 }
100 spin_unlock(&adapter->afu_list_lock);
101 }
102 spin_unlock(&adapter_idr_lock);
103 }
104
105 static struct cxl_calls cxl_calls = {
106 .cxl_slbia = cxl_slbia_core,
107 .owner = THIS_MODULE,
108 };
109
cxl_alloc_sst(struct cxl_context * ctx)110 int cxl_alloc_sst(struct cxl_context *ctx)
111 {
112 unsigned long vsid;
113 u64 ea_mask, size, sstp0, sstp1;
114
115 sstp0 = 0;
116 sstp1 = 0;
117
118 ctx->sst_size = PAGE_SIZE;
119 ctx->sst_lru = 0;
120 ctx->sstp = (struct cxl_sste *)get_zeroed_page(GFP_KERNEL);
121 if (!ctx->sstp) {
122 pr_err("cxl_alloc_sst: Unable to allocate segment table\n");
123 return -ENOMEM;
124 }
125 pr_devel("SSTP allocated at 0x%p\n", ctx->sstp);
126
127 vsid = get_kernel_vsid((u64)ctx->sstp, mmu_kernel_ssize) << 12;
128
129 sstp0 |= (u64)mmu_kernel_ssize << CXL_SSTP0_An_B_SHIFT;
130 sstp0 |= (SLB_VSID_KERNEL | mmu_psize_defs[mmu_linear_psize].sllp) << 50;
131
132 size = (((u64)ctx->sst_size >> 8) - 1) << CXL_SSTP0_An_SegTableSize_SHIFT;
133 if (unlikely(size & ~CXL_SSTP0_An_SegTableSize_MASK)) {
134 WARN(1, "Impossible segment table size\n");
135 return -EINVAL;
136 }
137 sstp0 |= size;
138
139 if (mmu_kernel_ssize == MMU_SEGSIZE_256M)
140 ea_mask = 0xfffff00ULL;
141 else
142 ea_mask = 0xffffffff00ULL;
143
144 sstp0 |= vsid >> (50-14); /* Top 14 bits of VSID */
145 sstp1 |= (vsid << (64-(50-14))) & ~ea_mask;
146 sstp1 |= (u64)ctx->sstp & ea_mask;
147 sstp1 |= CXL_SSTP1_An_V;
148
149 pr_devel("Looked up %#llx: slbfee. %#llx (ssize: %x, vsid: %#lx), copied to SSTP0: %#llx, SSTP1: %#llx\n",
150 (u64)ctx->sstp, (u64)ctx->sstp & ESID_MASK, mmu_kernel_ssize, vsid, sstp0, sstp1);
151
152 /* Store calculated sstp hardware points for use later */
153 ctx->sstp0 = sstp0;
154 ctx->sstp1 = sstp1;
155
156 return 0;
157 }
158
159 /* print buffer content as integers when debugging */
cxl_dump_debug_buffer(void * buf,size_t buf_len)160 void cxl_dump_debug_buffer(void *buf, size_t buf_len)
161 {
162 #ifdef DEBUG
163 int i, *ptr;
164
165 /*
166 * We want to regroup up to 4 integers per line, which means they
167 * need to be in the same pr_devel() statement
168 */
169 ptr = (int *) buf;
170 for (i = 0; i * 4 < buf_len; i += 4) {
171 if ((i + 3) * 4 < buf_len)
172 pr_devel("%.8x %.8x %.8x %.8x\n", ptr[i], ptr[i + 1],
173 ptr[i + 2], ptr[i + 3]);
174 else if ((i + 2) * 4 < buf_len)
175 pr_devel("%.8x %.8x %.8x\n", ptr[i], ptr[i + 1],
176 ptr[i + 2]);
177 else if ((i + 1) * 4 < buf_len)
178 pr_devel("%.8x %.8x\n", ptr[i], ptr[i + 1]);
179 else
180 pr_devel("%.8x\n", ptr[i]);
181 }
182 #endif /* DEBUG */
183 }
184
185 /* Find a CXL adapter by it's number and increase it's refcount */
get_cxl_adapter(int num)186 struct cxl *get_cxl_adapter(int num)
187 {
188 struct cxl *adapter;
189
190 spin_lock(&adapter_idr_lock);
191 if ((adapter = idr_find(&cxl_adapter_idr, num)))
192 get_device(&adapter->dev);
193 spin_unlock(&adapter_idr_lock);
194
195 return adapter;
196 }
197
cxl_alloc_adapter_nr(struct cxl * adapter)198 static int cxl_alloc_adapter_nr(struct cxl *adapter)
199 {
200 int i;
201
202 idr_preload(GFP_KERNEL);
203 spin_lock(&adapter_idr_lock);
204 i = idr_alloc(&cxl_adapter_idr, adapter, 0, 0, GFP_NOWAIT);
205 spin_unlock(&adapter_idr_lock);
206 idr_preload_end();
207 if (i < 0)
208 return i;
209
210 adapter->adapter_num = i;
211
212 return 0;
213 }
214
cxl_remove_adapter_nr(struct cxl * adapter)215 void cxl_remove_adapter_nr(struct cxl *adapter)
216 {
217 idr_remove(&cxl_adapter_idr, adapter->adapter_num);
218 }
219
cxl_alloc_adapter(void)220 struct cxl *cxl_alloc_adapter(void)
221 {
222 struct cxl *adapter;
223
224 if (!(adapter = kzalloc(sizeof(struct cxl), GFP_KERNEL)))
225 return NULL;
226
227 spin_lock_init(&adapter->afu_list_lock);
228
229 if (cxl_alloc_adapter_nr(adapter))
230 goto err1;
231
232 if (dev_set_name(&adapter->dev, "card%i", adapter->adapter_num))
233 goto err2;
234
235 /* start with context lock taken */
236 atomic_set(&adapter->contexts_num, -1);
237
238 return adapter;
239 err2:
240 cxl_remove_adapter_nr(adapter);
241 err1:
242 kfree(adapter);
243 return NULL;
244 }
245
cxl_alloc_afu(struct cxl * adapter,int slice)246 struct cxl_afu *cxl_alloc_afu(struct cxl *adapter, int slice)
247 {
248 struct cxl_afu *afu;
249
250 if (!(afu = kzalloc(sizeof(struct cxl_afu), GFP_KERNEL)))
251 return NULL;
252
253 afu->adapter = adapter;
254 afu->dev.parent = &adapter->dev;
255 afu->dev.release = cxl_ops->release_afu;
256 afu->slice = slice;
257 idr_init(&afu->contexts_idr);
258 mutex_init(&afu->contexts_lock);
259 spin_lock_init(&afu->afu_cntl_lock);
260 atomic_set(&afu->configured_state, -1);
261 afu->prefault_mode = CXL_PREFAULT_NONE;
262 afu->irqs_max = afu->adapter->user_irqs;
263
264 return afu;
265 }
266
cxl_afu_select_best_mode(struct cxl_afu * afu)267 int cxl_afu_select_best_mode(struct cxl_afu *afu)
268 {
269 if (afu->modes_supported & CXL_MODE_DIRECTED)
270 return cxl_ops->afu_activate_mode(afu, CXL_MODE_DIRECTED);
271
272 if (afu->modes_supported & CXL_MODE_DEDICATED)
273 return cxl_ops->afu_activate_mode(afu, CXL_MODE_DEDICATED);
274
275 dev_warn(&afu->dev, "No supported programming modes available\n");
276 /* We don't fail this so the user can inspect sysfs */
277 return 0;
278 }
279
cxl_adapter_context_get(struct cxl * adapter)280 int cxl_adapter_context_get(struct cxl *adapter)
281 {
282 int rc;
283
284 rc = atomic_inc_unless_negative(&adapter->contexts_num);
285 return rc ? 0 : -EBUSY;
286 }
287
cxl_adapter_context_put(struct cxl * adapter)288 void cxl_adapter_context_put(struct cxl *adapter)
289 {
290 atomic_dec_if_positive(&adapter->contexts_num);
291 }
292
cxl_adapter_context_lock(struct cxl * adapter)293 int cxl_adapter_context_lock(struct cxl *adapter)
294 {
295 int rc;
296 /* no active contexts -> contexts_num == 0 */
297 rc = atomic_cmpxchg(&adapter->contexts_num, 0, -1);
298 return rc ? -EBUSY : 0;
299 }
300
cxl_adapter_context_unlock(struct cxl * adapter)301 void cxl_adapter_context_unlock(struct cxl *adapter)
302 {
303 int val = atomic_cmpxchg(&adapter->contexts_num, -1, 0);
304
305 /*
306 * contexts lock taken -> contexts_num == -1
307 * If not true then show a warning and force reset the lock.
308 * This will happen when context_unlock was requested without
309 * doing a context_lock.
310 */
311 if (val != -1) {
312 atomic_set(&adapter->contexts_num, 0);
313 WARN(1, "Adapter context unlocked with %d active contexts",
314 val);
315 }
316 }
317
init_cxl(void)318 static int __init init_cxl(void)
319 {
320 int rc = 0;
321
322 if ((rc = cxl_file_init()))
323 return rc;
324
325 cxl_debugfs_init();
326
327 /*
328 * we don't register the callback on P9. slb callack is only
329 * used for the PSL8 MMU and CX4.
330 */
331 if (cxl_is_power8()) {
332 rc = register_cxl_calls(&cxl_calls);
333 if (rc)
334 goto err;
335 }
336
337 if (cpu_has_feature(CPU_FTR_HVMODE)) {
338 cxl_ops = &cxl_native_ops;
339 rc = pci_register_driver(&cxl_pci_driver);
340 }
341 #ifdef CONFIG_PPC_PSERIES
342 else {
343 cxl_ops = &cxl_guest_ops;
344 rc = platform_driver_register(&cxl_of_driver);
345 }
346 #endif
347 if (rc)
348 goto err1;
349
350 return 0;
351 err1:
352 if (cxl_is_power8())
353 unregister_cxl_calls(&cxl_calls);
354 err:
355 cxl_debugfs_exit();
356 cxl_file_exit();
357
358 return rc;
359 }
360
exit_cxl(void)361 static void exit_cxl(void)
362 {
363 if (cpu_has_feature(CPU_FTR_HVMODE))
364 pci_unregister_driver(&cxl_pci_driver);
365 #ifdef CONFIG_PPC_PSERIES
366 else
367 platform_driver_unregister(&cxl_of_driver);
368 #endif
369
370 cxl_debugfs_exit();
371 cxl_file_exit();
372 if (cxl_is_power8())
373 unregister_cxl_calls(&cxl_calls);
374 idr_destroy(&cxl_adapter_idr);
375 }
376
377 module_init(init_cxl);
378 module_exit(exit_cxl);
379
380 MODULE_DESCRIPTION("IBM Coherent Accelerator");
381 MODULE_AUTHOR("Ian Munsie <imunsie@au1.ibm.com>");
382 MODULE_LICENSE("GPL");
383