1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Linux for s390 qdio support, buffer handling, qdio API and module support.
4 *
5 * Copyright IBM Corp. 2000, 2008
6 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
7 * Jan Glauber <jang@linux.vnet.ibm.com>
8 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
9 */
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/kernel.h>
13 #include <linux/timer.h>
14 #include <linux/delay.h>
15 #include <linux/gfp.h>
16 #include <linux/io.h>
17 #include <linux/atomic.h>
18 #include <asm/debug.h>
19 #include <asm/qdio.h>
20 #include <asm/ipl.h>
21
22 #include "cio.h"
23 #include "css.h"
24 #include "device.h"
25 #include "qdio.h"
26 #include "qdio_debug.h"
27
28 MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
29 "Jan Glauber <jang@linux.vnet.ibm.com>");
30 MODULE_DESCRIPTION("QDIO base support");
31 MODULE_LICENSE("GPL");
32
do_siga_sync(unsigned long schid,unsigned long out_mask,unsigned long in_mask,unsigned int fc)33 static inline int do_siga_sync(unsigned long schid,
34 unsigned long out_mask, unsigned long in_mask,
35 unsigned int fc)
36 {
37 int cc;
38
39 asm volatile(
40 " lgr 0,%[fc]\n"
41 " lgr 1,%[schid]\n"
42 " lgr 2,%[out]\n"
43 " lgr 3,%[in]\n"
44 " siga 0\n"
45 " ipm %[cc]\n"
46 " srl %[cc],28\n"
47 : [cc] "=&d" (cc)
48 : [fc] "d" (fc), [schid] "d" (schid),
49 [out] "d" (out_mask), [in] "d" (in_mask)
50 : "cc", "0", "1", "2", "3");
51 return cc;
52 }
53
do_siga_input(unsigned long schid,unsigned long mask,unsigned long fc)54 static inline int do_siga_input(unsigned long schid, unsigned long mask,
55 unsigned long fc)
56 {
57 int cc;
58
59 asm volatile(
60 " lgr 0,%[fc]\n"
61 " lgr 1,%[schid]\n"
62 " lgr 2,%[mask]\n"
63 " siga 0\n"
64 " ipm %[cc]\n"
65 " srl %[cc],28\n"
66 : [cc] "=&d" (cc)
67 : [fc] "d" (fc), [schid] "d" (schid), [mask] "d" (mask)
68 : "cc", "0", "1", "2");
69 return cc;
70 }
71
72 /**
73 * do_siga_output - perform SIGA-w/wt function
74 * @schid: subchannel id or in case of QEBSM the subchannel token
75 * @mask: which output queues to process
76 * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
77 * @fc: function code to perform
78 * @aob: asynchronous operation block
79 *
80 * Returns condition code.
81 * Note: For IQDC unicast queues only the highest priority queue is processed.
82 */
do_siga_output(unsigned long schid,unsigned long mask,unsigned int * bb,unsigned long fc,unsigned long aob)83 static inline int do_siga_output(unsigned long schid, unsigned long mask,
84 unsigned int *bb, unsigned long fc,
85 unsigned long aob)
86 {
87 int cc;
88
89 asm volatile(
90 " lgr 0,%[fc]\n"
91 " lgr 1,%[schid]\n"
92 " lgr 2,%[mask]\n"
93 " lgr 3,%[aob]\n"
94 " siga 0\n"
95 " lgr %[fc],0\n"
96 " ipm %[cc]\n"
97 " srl %[cc],28\n"
98 : [cc] "=&d" (cc), [fc] "+&d" (fc)
99 : [schid] "d" (schid), [mask] "d" (mask), [aob] "d" (aob)
100 : "cc", "0", "1", "2", "3");
101 *bb = fc >> 31;
102 return cc;
103 }
104
105 /**
106 * qdio_do_eqbs - extract buffer states for QEBSM
107 * @q: queue to manipulate
108 * @state: state of the extracted buffers
109 * @start: buffer number to start at
110 * @count: count of buffers to examine
111 * @auto_ack: automatically acknowledge buffers
112 *
113 * Returns the number of successfully extracted equal buffer states.
114 * Stops processing if a state is different from the last buffers state.
115 */
qdio_do_eqbs(struct qdio_q * q,unsigned char * state,int start,int count,int auto_ack)116 static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
117 int start, int count, int auto_ack)
118 {
119 int tmp_count = count, tmp_start = start, nr = q->nr;
120 unsigned int ccq = 0;
121
122 qperf_inc(q, eqbs);
123
124 if (!q->is_input_q)
125 nr += q->irq_ptr->nr_input_qs;
126 again:
127 ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
128 auto_ack);
129
130 switch (ccq) {
131 case 0:
132 case 32:
133 /* all done, or next buffer state different */
134 return count - tmp_count;
135 case 96:
136 /* not all buffers processed */
137 qperf_inc(q, eqbs_partial);
138 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS part:%02x",
139 tmp_count);
140 return count - tmp_count;
141 case 97:
142 /* no buffer processed */
143 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
144 goto again;
145 default:
146 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
147 DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
148 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
149 q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE, q->nr,
150 q->first_to_kick, count, q->irq_ptr->int_parm);
151 return 0;
152 }
153 }
154
155 /**
156 * qdio_do_sqbs - set buffer states for QEBSM
157 * @q: queue to manipulate
158 * @state: new state of the buffers
159 * @start: first buffer number to change
160 * @count: how many buffers to change
161 *
162 * Returns the number of successfully changed buffers.
163 * Does retrying until the specified count of buffer states is set or an
164 * error occurs.
165 */
qdio_do_sqbs(struct qdio_q * q,unsigned char state,int start,int count)166 static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
167 int count)
168 {
169 unsigned int ccq = 0;
170 int tmp_count = count, tmp_start = start;
171 int nr = q->nr;
172
173 if (!count)
174 return 0;
175 qperf_inc(q, sqbs);
176
177 if (!q->is_input_q)
178 nr += q->irq_ptr->nr_input_qs;
179 again:
180 ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
181
182 switch (ccq) {
183 case 0:
184 case 32:
185 /* all done, or active buffer adapter-owned */
186 WARN_ON_ONCE(tmp_count);
187 return count - tmp_count;
188 case 96:
189 /* not all buffers processed */
190 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
191 qperf_inc(q, sqbs_partial);
192 goto again;
193 default:
194 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
195 DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
196 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
197 q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE, q->nr,
198 q->first_to_kick, count, q->irq_ptr->int_parm);
199 return 0;
200 }
201 }
202
203 /*
204 * Returns number of examined buffers and their common state in *state.
205 * Requested number of buffers-to-examine must be > 0.
206 */
get_buf_states(struct qdio_q * q,unsigned int bufnr,unsigned char * state,unsigned int count,int auto_ack,int merge_pending)207 static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
208 unsigned char *state, unsigned int count,
209 int auto_ack, int merge_pending)
210 {
211 unsigned char __state = 0;
212 int i;
213
214 if (is_qebsm(q))
215 return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
216
217 /* get initial state: */
218 __state = q->slsb.val[bufnr];
219 if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
220 __state = SLSB_P_OUTPUT_EMPTY;
221
222 for (i = 1; i < count; i++) {
223 bufnr = next_buf(bufnr);
224
225 /* merge PENDING into EMPTY: */
226 if (merge_pending &&
227 q->slsb.val[bufnr] == SLSB_P_OUTPUT_PENDING &&
228 __state == SLSB_P_OUTPUT_EMPTY)
229 continue;
230
231 /* stop if next state differs from initial state: */
232 if (q->slsb.val[bufnr] != __state)
233 break;
234 }
235 *state = __state;
236 return i;
237 }
238
get_buf_state(struct qdio_q * q,unsigned int bufnr,unsigned char * state,int auto_ack)239 static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
240 unsigned char *state, int auto_ack)
241 {
242 return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
243 }
244
245 /* wrap-around safe setting of slsb states, returns number of changed buffers */
set_buf_states(struct qdio_q * q,int bufnr,unsigned char state,int count)246 static inline int set_buf_states(struct qdio_q *q, int bufnr,
247 unsigned char state, int count)
248 {
249 int i;
250
251 if (is_qebsm(q))
252 return qdio_do_sqbs(q, state, bufnr, count);
253
254 for (i = 0; i < count; i++) {
255 xchg(&q->slsb.val[bufnr], state);
256 bufnr = next_buf(bufnr);
257 }
258 return count;
259 }
260
set_buf_state(struct qdio_q * q,int bufnr,unsigned char state)261 static inline int set_buf_state(struct qdio_q *q, int bufnr,
262 unsigned char state)
263 {
264 return set_buf_states(q, bufnr, state, 1);
265 }
266
267 /* set slsb states to initial state */
qdio_init_buf_states(struct qdio_irq * irq_ptr)268 static void qdio_init_buf_states(struct qdio_irq *irq_ptr)
269 {
270 struct qdio_q *q;
271 int i;
272
273 for_each_input_queue(irq_ptr, q, i)
274 set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
275 QDIO_MAX_BUFFERS_PER_Q);
276 for_each_output_queue(irq_ptr, q, i)
277 set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
278 QDIO_MAX_BUFFERS_PER_Q);
279 }
280
qdio_siga_sync(struct qdio_q * q,unsigned int output,unsigned int input)281 static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
282 unsigned int input)
283 {
284 unsigned long schid = *((u32 *) &q->irq_ptr->schid);
285 unsigned int fc = QDIO_SIGA_SYNC;
286 int cc;
287
288 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
289 qperf_inc(q, siga_sync);
290
291 if (is_qebsm(q)) {
292 schid = q->irq_ptr->sch_token;
293 fc |= QDIO_SIGA_QEBSM_FLAG;
294 }
295
296 cc = do_siga_sync(schid, output, input, fc);
297 if (unlikely(cc))
298 DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
299 return (cc) ? -EIO : 0;
300 }
301
qdio_siga_sync_q(struct qdio_q * q)302 static inline int qdio_siga_sync_q(struct qdio_q *q)
303 {
304 if (q->is_input_q)
305 return qdio_siga_sync(q, 0, q->mask);
306 else
307 return qdio_siga_sync(q, q->mask, 0);
308 }
309
qdio_siga_output(struct qdio_q * q,unsigned int * busy_bit,unsigned long aob)310 static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit,
311 unsigned long aob)
312 {
313 unsigned long schid = *((u32 *) &q->irq_ptr->schid);
314 unsigned int fc = QDIO_SIGA_WRITE;
315 u64 start_time = 0;
316 int retries = 0, cc;
317 unsigned long laob = 0;
318
319 WARN_ON_ONCE(aob && ((queue_type(q) != QDIO_IQDIO_QFMT) ||
320 !q->u.out.use_cq));
321 if (q->u.out.use_cq && aob != 0) {
322 fc = QDIO_SIGA_WRITEQ;
323 laob = aob;
324 }
325
326 if (is_qebsm(q)) {
327 schid = q->irq_ptr->sch_token;
328 fc |= QDIO_SIGA_QEBSM_FLAG;
329 }
330 again:
331 cc = do_siga_output(schid, q->mask, busy_bit, fc, laob);
332
333 /* hipersocket busy condition */
334 if (unlikely(*busy_bit)) {
335 retries++;
336
337 if (!start_time) {
338 start_time = get_tod_clock_fast();
339 goto again;
340 }
341 if (get_tod_clock_fast() - start_time < QDIO_BUSY_BIT_PATIENCE)
342 goto again;
343 }
344 if (retries) {
345 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
346 "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
347 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
348 }
349 return cc;
350 }
351
qdio_siga_input(struct qdio_q * q)352 static inline int qdio_siga_input(struct qdio_q *q)
353 {
354 unsigned long schid = *((u32 *) &q->irq_ptr->schid);
355 unsigned int fc = QDIO_SIGA_READ;
356 int cc;
357
358 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
359 qperf_inc(q, siga_read);
360
361 if (is_qebsm(q)) {
362 schid = q->irq_ptr->sch_token;
363 fc |= QDIO_SIGA_QEBSM_FLAG;
364 }
365
366 cc = do_siga_input(schid, q->mask, fc);
367 if (unlikely(cc))
368 DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
369 return (cc) ? -EIO : 0;
370 }
371
372 #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
373 #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
374
qdio_sync_queues(struct qdio_q * q)375 static inline void qdio_sync_queues(struct qdio_q *q)
376 {
377 /* PCI capable outbound queues will also be scanned so sync them too */
378 if (pci_out_supported(q))
379 qdio_siga_sync_all(q);
380 else
381 qdio_siga_sync_q(q);
382 }
383
debug_get_buf_state(struct qdio_q * q,unsigned int bufnr,unsigned char * state)384 int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
385 unsigned char *state)
386 {
387 if (need_siga_sync(q))
388 qdio_siga_sync_q(q);
389 return get_buf_states(q, bufnr, state, 1, 0, 0);
390 }
391
qdio_stop_polling(struct qdio_q * q)392 static inline void qdio_stop_polling(struct qdio_q *q)
393 {
394 if (!q->u.in.polling)
395 return;
396
397 q->u.in.polling = 0;
398 qperf_inc(q, stop_polling);
399
400 /* show the card that we are not polling anymore */
401 if (is_qebsm(q)) {
402 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
403 q->u.in.ack_count);
404 q->u.in.ack_count = 0;
405 } else
406 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
407 }
408
account_sbals(struct qdio_q * q,unsigned int count)409 static inline void account_sbals(struct qdio_q *q, unsigned int count)
410 {
411 int pos;
412
413 q->q_stats.nr_sbal_total += count;
414 if (count == QDIO_MAX_BUFFERS_MASK) {
415 q->q_stats.nr_sbals[7]++;
416 return;
417 }
418 pos = ilog2(count);
419 q->q_stats.nr_sbals[pos]++;
420 }
421
process_buffer_error(struct qdio_q * q,int count)422 static void process_buffer_error(struct qdio_q *q, int count)
423 {
424 unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
425 SLSB_P_OUTPUT_NOT_INIT;
426
427 q->qdio_error = QDIO_ERROR_SLSB_STATE;
428
429 /* special handling for no target buffer empty */
430 if (queue_type(q) == QDIO_IQDIO_QFMT && !q->is_input_q &&
431 q->sbal[q->first_to_check]->element[15].sflags == 0x10) {
432 qperf_inc(q, target_full);
433 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
434 q->first_to_check);
435 goto set;
436 }
437
438 DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
439 DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
440 DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
441 DBF_ERROR("F14:%2x F15:%2x",
442 q->sbal[q->first_to_check]->element[14].sflags,
443 q->sbal[q->first_to_check]->element[15].sflags);
444
445 set:
446 /*
447 * Interrupts may be avoided as long as the error is present
448 * so change the buffer state immediately to avoid starvation.
449 */
450 set_buf_states(q, q->first_to_check, state, count);
451 }
452
inbound_primed(struct qdio_q * q,int count)453 static inline void inbound_primed(struct qdio_q *q, int count)
454 {
455 int new;
456
457 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim:%1d %02x", q->nr, count);
458
459 /* for QEBSM the ACK was already set by EQBS */
460 if (is_qebsm(q)) {
461 if (!q->u.in.polling) {
462 q->u.in.polling = 1;
463 q->u.in.ack_count = count;
464 q->u.in.ack_start = q->first_to_check;
465 return;
466 }
467
468 /* delete the previous ACK's */
469 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
470 q->u.in.ack_count);
471 q->u.in.ack_count = count;
472 q->u.in.ack_start = q->first_to_check;
473 return;
474 }
475
476 /*
477 * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
478 * or by the next inbound run.
479 */
480 new = add_buf(q->first_to_check, count - 1);
481 if (q->u.in.polling) {
482 /* reset the previous ACK but first set the new one */
483 set_buf_state(q, new, SLSB_P_INPUT_ACK);
484 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
485 } else {
486 q->u.in.polling = 1;
487 set_buf_state(q, new, SLSB_P_INPUT_ACK);
488 }
489
490 q->u.in.ack_start = new;
491 count--;
492 if (!count)
493 return;
494 /* need to change ALL buffers to get more interrupts */
495 set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
496 }
497
get_inbound_buffer_frontier(struct qdio_q * q)498 static int get_inbound_buffer_frontier(struct qdio_q *q)
499 {
500 unsigned char state = 0;
501 int count;
502
503 q->timestamp = get_tod_clock_fast();
504
505 /*
506 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
507 * would return 0.
508 */
509 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
510 if (!count)
511 goto out;
512
513 /*
514 * No siga sync here, as a PCI or we after a thin interrupt
515 * already sync'ed the queues.
516 */
517 count = get_buf_states(q, q->first_to_check, &state, count, 1, 0);
518 if (!count)
519 goto out;
520
521 switch (state) {
522 case SLSB_P_INPUT_PRIMED:
523 inbound_primed(q, count);
524 q->first_to_check = add_buf(q->first_to_check, count);
525 if (atomic_sub_return(count, &q->nr_buf_used) == 0)
526 qperf_inc(q, inbound_queue_full);
527 if (q->irq_ptr->perf_stat_enabled)
528 account_sbals(q, count);
529 break;
530 case SLSB_P_INPUT_ERROR:
531 process_buffer_error(q, count);
532 q->first_to_check = add_buf(q->first_to_check, count);
533 if (atomic_sub_return(count, &q->nr_buf_used) == 0)
534 qperf_inc(q, inbound_queue_full);
535 if (q->irq_ptr->perf_stat_enabled)
536 account_sbals_error(q, count);
537 break;
538 case SLSB_CU_INPUT_EMPTY:
539 case SLSB_P_INPUT_NOT_INIT:
540 case SLSB_P_INPUT_ACK:
541 if (q->irq_ptr->perf_stat_enabled)
542 q->q_stats.nr_sbal_nop++;
543 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop:%1d %#02x",
544 q->nr, q->first_to_check);
545 break;
546 default:
547 WARN_ON_ONCE(1);
548 }
549 out:
550 return q->first_to_check;
551 }
552
qdio_inbound_q_moved(struct qdio_q * q)553 static int qdio_inbound_q_moved(struct qdio_q *q)
554 {
555 int bufnr;
556
557 bufnr = get_inbound_buffer_frontier(q);
558
559 if (bufnr != q->last_move) {
560 q->last_move = bufnr;
561 if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
562 q->u.in.timestamp = get_tod_clock();
563 return 1;
564 } else
565 return 0;
566 }
567
qdio_inbound_q_done(struct qdio_q * q)568 static inline int qdio_inbound_q_done(struct qdio_q *q)
569 {
570 unsigned char state = 0;
571
572 if (!atomic_read(&q->nr_buf_used))
573 return 1;
574
575 if (need_siga_sync(q))
576 qdio_siga_sync_q(q);
577 get_buf_state(q, q->first_to_check, &state, 0);
578
579 if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
580 /* more work coming */
581 return 0;
582
583 if (is_thinint_irq(q->irq_ptr))
584 return 1;
585
586 /* don't poll under z/VM */
587 if (MACHINE_IS_VM)
588 return 1;
589
590 /*
591 * At this point we know, that inbound first_to_check
592 * has (probably) not moved (see qdio_inbound_processing).
593 */
594 if (get_tod_clock_fast() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
595 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
596 q->first_to_check);
597 return 1;
598 } else
599 return 0;
600 }
601
contains_aobs(struct qdio_q * q)602 static inline int contains_aobs(struct qdio_q *q)
603 {
604 return !q->is_input_q && q->u.out.use_cq;
605 }
606
qdio_handle_aobs(struct qdio_q * q,int start,int count)607 static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count)
608 {
609 unsigned char state = 0;
610 int j, b = start;
611
612 if (!contains_aobs(q))
613 return;
614
615 for (j = 0; j < count; ++j) {
616 get_buf_state(q, b, &state, 0);
617 if (state == SLSB_P_OUTPUT_PENDING) {
618 struct qaob *aob = q->u.out.aobs[b];
619 if (aob == NULL)
620 continue;
621
622 q->u.out.sbal_state[b].flags |=
623 QDIO_OUTBUF_STATE_FLAG_PENDING;
624 q->u.out.aobs[b] = NULL;
625 } else if (state == SLSB_P_OUTPUT_EMPTY) {
626 q->u.out.sbal_state[b].aob = NULL;
627 }
628 b = next_buf(b);
629 }
630 }
631
qdio_aob_for_buffer(struct qdio_output_q * q,int bufnr)632 static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
633 int bufnr)
634 {
635 unsigned long phys_aob = 0;
636
637 if (!q->use_cq)
638 return 0;
639
640 if (!q->aobs[bufnr]) {
641 struct qaob *aob = qdio_allocate_aob();
642 q->aobs[bufnr] = aob;
643 }
644 if (q->aobs[bufnr]) {
645 q->sbal_state[bufnr].aob = q->aobs[bufnr];
646 q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
647 phys_aob = virt_to_phys(q->aobs[bufnr]);
648 WARN_ON_ONCE(phys_aob & 0xFF);
649 }
650
651 q->sbal_state[bufnr].flags = 0;
652 return phys_aob;
653 }
654
qdio_kick_handler(struct qdio_q * q)655 static void qdio_kick_handler(struct qdio_q *q)
656 {
657 int start = q->first_to_kick;
658 int end = q->first_to_check;
659 int count;
660
661 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
662 return;
663
664 count = sub_buf(end, start);
665
666 if (q->is_input_q) {
667 qperf_inc(q, inbound_handler);
668 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
669 } else {
670 qperf_inc(q, outbound_handler);
671 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
672 start, count);
673 }
674
675 qdio_handle_aobs(q, start, count);
676
677 q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
678 q->irq_ptr->int_parm);
679
680 /* for the next time */
681 q->first_to_kick = end;
682 q->qdio_error = 0;
683 }
684
qdio_tasklet_schedule(struct qdio_q * q)685 static inline int qdio_tasklet_schedule(struct qdio_q *q)
686 {
687 if (likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) {
688 tasklet_schedule(&q->tasklet);
689 return 0;
690 }
691 return -EPERM;
692 }
693
__qdio_inbound_processing(struct qdio_q * q)694 static void __qdio_inbound_processing(struct qdio_q *q)
695 {
696 qperf_inc(q, tasklet_inbound);
697
698 if (!qdio_inbound_q_moved(q))
699 return;
700
701 qdio_kick_handler(q);
702
703 if (!qdio_inbound_q_done(q)) {
704 /* means poll time is not yet over */
705 qperf_inc(q, tasklet_inbound_resched);
706 if (!qdio_tasklet_schedule(q))
707 return;
708 }
709
710 qdio_stop_polling(q);
711 /*
712 * We need to check again to not lose initiative after
713 * resetting the ACK state.
714 */
715 if (!qdio_inbound_q_done(q)) {
716 qperf_inc(q, tasklet_inbound_resched2);
717 qdio_tasklet_schedule(q);
718 }
719 }
720
qdio_inbound_processing(unsigned long data)721 void qdio_inbound_processing(unsigned long data)
722 {
723 struct qdio_q *q = (struct qdio_q *)data;
724 __qdio_inbound_processing(q);
725 }
726
get_outbound_buffer_frontier(struct qdio_q * q)727 static int get_outbound_buffer_frontier(struct qdio_q *q)
728 {
729 unsigned char state = 0;
730 int count;
731
732 q->timestamp = get_tod_clock_fast();
733
734 if (need_siga_sync(q))
735 if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
736 !pci_out_supported(q)) ||
737 (queue_type(q) == QDIO_IQDIO_QFMT &&
738 multicast_outbound(q)))
739 qdio_siga_sync_q(q);
740
741 /*
742 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
743 * would return 0.
744 */
745 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
746 if (!count)
747 goto out;
748
749 count = get_buf_states(q, q->first_to_check, &state, count, 0,
750 q->u.out.use_cq);
751 if (!count)
752 goto out;
753
754 switch (state) {
755 case SLSB_P_OUTPUT_EMPTY:
756 case SLSB_P_OUTPUT_PENDING:
757 /* the adapter got it */
758 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
759 "out empty:%1d %02x", q->nr, count);
760
761 atomic_sub(count, &q->nr_buf_used);
762 q->first_to_check = add_buf(q->first_to_check, count);
763 if (q->irq_ptr->perf_stat_enabled)
764 account_sbals(q, count);
765
766 break;
767 case SLSB_P_OUTPUT_ERROR:
768 process_buffer_error(q, count);
769 q->first_to_check = add_buf(q->first_to_check, count);
770 atomic_sub(count, &q->nr_buf_used);
771 if (q->irq_ptr->perf_stat_enabled)
772 account_sbals_error(q, count);
773 break;
774 case SLSB_CU_OUTPUT_PRIMED:
775 /* the adapter has not fetched the output yet */
776 if (q->irq_ptr->perf_stat_enabled)
777 q->q_stats.nr_sbal_nop++;
778 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
779 q->nr);
780 break;
781 case SLSB_P_OUTPUT_NOT_INIT:
782 case SLSB_P_OUTPUT_HALTED:
783 break;
784 default:
785 WARN_ON_ONCE(1);
786 }
787
788 out:
789 return q->first_to_check;
790 }
791
792 /* all buffers processed? */
qdio_outbound_q_done(struct qdio_q * q)793 static inline int qdio_outbound_q_done(struct qdio_q *q)
794 {
795 return atomic_read(&q->nr_buf_used) == 0;
796 }
797
qdio_outbound_q_moved(struct qdio_q * q)798 static inline int qdio_outbound_q_moved(struct qdio_q *q)
799 {
800 int bufnr;
801
802 bufnr = get_outbound_buffer_frontier(q);
803
804 if (bufnr != q->last_move) {
805 q->last_move = bufnr;
806 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
807 return 1;
808 } else
809 return 0;
810 }
811
qdio_kick_outbound_q(struct qdio_q * q,unsigned long aob)812 static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob)
813 {
814 int retries = 0, cc;
815 unsigned int busy_bit;
816
817 if (!need_siga_out(q))
818 return 0;
819
820 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
821 retry:
822 qperf_inc(q, siga_write);
823
824 cc = qdio_siga_output(q, &busy_bit, aob);
825 switch (cc) {
826 case 0:
827 break;
828 case 2:
829 if (busy_bit) {
830 while (++retries < QDIO_BUSY_BIT_RETRIES) {
831 mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
832 goto retry;
833 }
834 DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
835 cc = -EBUSY;
836 } else {
837 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
838 cc = -ENOBUFS;
839 }
840 break;
841 case 1:
842 case 3:
843 DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
844 cc = -EIO;
845 break;
846 }
847 if (retries) {
848 DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
849 DBF_ERROR("count:%u", retries);
850 }
851 return cc;
852 }
853
__qdio_outbound_processing(struct qdio_q * q)854 static void __qdio_outbound_processing(struct qdio_q *q)
855 {
856 qperf_inc(q, tasklet_outbound);
857 WARN_ON_ONCE(atomic_read(&q->nr_buf_used) < 0);
858
859 if (qdio_outbound_q_moved(q))
860 qdio_kick_handler(q);
861
862 if (queue_type(q) == QDIO_ZFCP_QFMT)
863 if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
864 goto sched;
865
866 if (q->u.out.pci_out_enabled)
867 return;
868
869 /*
870 * Now we know that queue type is either qeth without pci enabled
871 * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY
872 * is noticed and outbound_handler is called after some time.
873 */
874 if (qdio_outbound_q_done(q))
875 del_timer_sync(&q->u.out.timer);
876 else
877 if (!timer_pending(&q->u.out.timer) &&
878 likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE))
879 mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
880 return;
881
882 sched:
883 qdio_tasklet_schedule(q);
884 }
885
886 /* outbound tasklet */
qdio_outbound_processing(unsigned long data)887 void qdio_outbound_processing(unsigned long data)
888 {
889 struct qdio_q *q = (struct qdio_q *)data;
890 __qdio_outbound_processing(q);
891 }
892
qdio_outbound_timer(struct timer_list * t)893 void qdio_outbound_timer(struct timer_list *t)
894 {
895 struct qdio_q *q = from_timer(q, t, u.out.timer);
896
897 qdio_tasklet_schedule(q);
898 }
899
qdio_check_outbound_after_thinint(struct qdio_q * q)900 static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
901 {
902 struct qdio_q *out;
903 int i;
904
905 if (!pci_out_supported(q))
906 return;
907
908 for_each_output_queue(q->irq_ptr, out, i)
909 if (!qdio_outbound_q_done(out))
910 qdio_tasklet_schedule(out);
911 }
912
__tiqdio_inbound_processing(struct qdio_q * q)913 static void __tiqdio_inbound_processing(struct qdio_q *q)
914 {
915 qperf_inc(q, tasklet_inbound);
916 if (need_siga_sync(q) && need_siga_sync_after_ai(q))
917 qdio_sync_queues(q);
918
919 /*
920 * The interrupt could be caused by a PCI request. Check the
921 * PCI capable outbound queues.
922 */
923 qdio_check_outbound_after_thinint(q);
924
925 if (!qdio_inbound_q_moved(q))
926 return;
927
928 qdio_kick_handler(q);
929
930 if (!qdio_inbound_q_done(q)) {
931 qperf_inc(q, tasklet_inbound_resched);
932 if (!qdio_tasklet_schedule(q))
933 return;
934 }
935
936 qdio_stop_polling(q);
937 /*
938 * We need to check again to not lose initiative after
939 * resetting the ACK state.
940 */
941 if (!qdio_inbound_q_done(q)) {
942 qperf_inc(q, tasklet_inbound_resched2);
943 qdio_tasklet_schedule(q);
944 }
945 }
946
tiqdio_inbound_processing(unsigned long data)947 void tiqdio_inbound_processing(unsigned long data)
948 {
949 struct qdio_q *q = (struct qdio_q *)data;
950 __tiqdio_inbound_processing(q);
951 }
952
qdio_set_state(struct qdio_irq * irq_ptr,enum qdio_irq_states state)953 static inline void qdio_set_state(struct qdio_irq *irq_ptr,
954 enum qdio_irq_states state)
955 {
956 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
957
958 irq_ptr->state = state;
959 mb();
960 }
961
qdio_irq_check_sense(struct qdio_irq * irq_ptr,struct irb * irb)962 static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
963 {
964 if (irb->esw.esw0.erw.cons) {
965 DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
966 DBF_ERROR_HEX(irb, 64);
967 DBF_ERROR_HEX(irb->ecw, 64);
968 }
969 }
970
971 /* PCI interrupt handler */
qdio_int_handler_pci(struct qdio_irq * irq_ptr)972 static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
973 {
974 int i;
975 struct qdio_q *q;
976
977 if (unlikely(irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
978 return;
979
980 for_each_input_queue(irq_ptr, q, i) {
981 if (q->u.in.queue_start_poll) {
982 /* skip if polling is enabled or already in work */
983 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
984 &q->u.in.queue_irq_state)) {
985 qperf_inc(q, int_discarded);
986 continue;
987 }
988 q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
989 q->irq_ptr->int_parm);
990 } else {
991 tasklet_schedule(&q->tasklet);
992 }
993 }
994
995 if (!(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED))
996 return;
997
998 for_each_output_queue(irq_ptr, q, i) {
999 if (qdio_outbound_q_done(q))
1000 continue;
1001 if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
1002 qdio_siga_sync_q(q);
1003 qdio_tasklet_schedule(q);
1004 }
1005 }
1006
qdio_handle_activate_check(struct ccw_device * cdev,unsigned long intparm,int cstat,int dstat)1007 static void qdio_handle_activate_check(struct ccw_device *cdev,
1008 unsigned long intparm, int cstat, int dstat)
1009 {
1010 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1011 struct qdio_q *q;
1012 int count;
1013
1014 DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
1015 DBF_ERROR("intp :%lx", intparm);
1016 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
1017
1018 if (irq_ptr->nr_input_qs) {
1019 q = irq_ptr->input_qs[0];
1020 } else if (irq_ptr->nr_output_qs) {
1021 q = irq_ptr->output_qs[0];
1022 } else {
1023 dump_stack();
1024 goto no_handler;
1025 }
1026
1027 count = sub_buf(q->first_to_check, q->first_to_kick);
1028 q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE,
1029 q->nr, q->first_to_kick, count, irq_ptr->int_parm);
1030 no_handler:
1031 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1032 /*
1033 * In case of z/VM LGR (Live Guest Migration) QDIO recovery will happen.
1034 * Therefore we call the LGR detection function here.
1035 */
1036 lgr_info_log();
1037 }
1038
qdio_establish_handle_irq(struct ccw_device * cdev,int cstat,int dstat)1039 static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
1040 int dstat)
1041 {
1042 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1043
1044 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
1045
1046 if (cstat)
1047 goto error;
1048 if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
1049 goto error;
1050 if (!(dstat & DEV_STAT_DEV_END))
1051 goto error;
1052 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
1053 return;
1054
1055 error:
1056 DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
1057 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
1058 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
1059 }
1060
1061 /* qdio interrupt handler */
qdio_int_handler(struct ccw_device * cdev,unsigned long intparm,struct irb * irb)1062 void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
1063 struct irb *irb)
1064 {
1065 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1066 struct subchannel_id schid;
1067 int cstat, dstat;
1068
1069 if (!intparm || !irq_ptr) {
1070 ccw_device_get_schid(cdev, &schid);
1071 DBF_ERROR("qint:%4x", schid.sch_no);
1072 return;
1073 }
1074
1075 if (irq_ptr->perf_stat_enabled)
1076 irq_ptr->perf_stat.qdio_int++;
1077
1078 if (IS_ERR(irb)) {
1079 DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
1080 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
1081 wake_up(&cdev->private->wait_q);
1082 return;
1083 }
1084 qdio_irq_check_sense(irq_ptr, irb);
1085 cstat = irb->scsw.cmd.cstat;
1086 dstat = irb->scsw.cmd.dstat;
1087
1088 switch (irq_ptr->state) {
1089 case QDIO_IRQ_STATE_INACTIVE:
1090 qdio_establish_handle_irq(cdev, cstat, dstat);
1091 break;
1092 case QDIO_IRQ_STATE_CLEANUP:
1093 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1094 break;
1095 case QDIO_IRQ_STATE_ESTABLISHED:
1096 case QDIO_IRQ_STATE_ACTIVE:
1097 if (cstat & SCHN_STAT_PCI) {
1098 qdio_int_handler_pci(irq_ptr);
1099 return;
1100 }
1101 if (cstat || dstat)
1102 qdio_handle_activate_check(cdev, intparm, cstat,
1103 dstat);
1104 break;
1105 case QDIO_IRQ_STATE_STOPPED:
1106 break;
1107 default:
1108 WARN_ON_ONCE(1);
1109 }
1110 wake_up(&cdev->private->wait_q);
1111 }
1112
1113 /**
1114 * qdio_get_ssqd_desc - get qdio subchannel description
1115 * @cdev: ccw device to get description for
1116 * @data: where to store the ssqd
1117 *
1118 * Returns 0 or an error code. The results of the chsc are stored in the
1119 * specified structure.
1120 */
qdio_get_ssqd_desc(struct ccw_device * cdev,struct qdio_ssqd_desc * data)1121 int qdio_get_ssqd_desc(struct ccw_device *cdev,
1122 struct qdio_ssqd_desc *data)
1123 {
1124 struct subchannel_id schid;
1125
1126 if (!cdev || !cdev->private)
1127 return -EINVAL;
1128
1129 ccw_device_get_schid(cdev, &schid);
1130 DBF_EVENT("get ssqd:%4x", schid.sch_no);
1131 return qdio_setup_get_ssqd(NULL, &schid, data);
1132 }
1133 EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
1134
qdio_shutdown_queues(struct ccw_device * cdev)1135 static void qdio_shutdown_queues(struct ccw_device *cdev)
1136 {
1137 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1138 struct qdio_q *q;
1139 int i;
1140
1141 for_each_input_queue(irq_ptr, q, i)
1142 tasklet_kill(&q->tasklet);
1143
1144 for_each_output_queue(irq_ptr, q, i) {
1145 del_timer_sync(&q->u.out.timer);
1146 tasklet_kill(&q->tasklet);
1147 }
1148 }
1149
1150 /**
1151 * qdio_shutdown - shut down a qdio subchannel
1152 * @cdev: associated ccw device
1153 * @how: use halt or clear to shutdown
1154 */
qdio_shutdown(struct ccw_device * cdev,int how)1155 int qdio_shutdown(struct ccw_device *cdev, int how)
1156 {
1157 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1158 struct subchannel_id schid;
1159 int rc;
1160
1161 if (!irq_ptr)
1162 return -ENODEV;
1163
1164 WARN_ON_ONCE(irqs_disabled());
1165 ccw_device_get_schid(cdev, &schid);
1166 DBF_EVENT("qshutdown:%4x", schid.sch_no);
1167
1168 mutex_lock(&irq_ptr->setup_mutex);
1169 /*
1170 * Subchannel was already shot down. We cannot prevent being called
1171 * twice since cio may trigger a shutdown asynchronously.
1172 */
1173 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1174 mutex_unlock(&irq_ptr->setup_mutex);
1175 return 0;
1176 }
1177
1178 /*
1179 * Indicate that the device is going down. Scheduling the queue
1180 * tasklets is forbidden from here on.
1181 */
1182 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1183
1184 tiqdio_remove_input_queues(irq_ptr);
1185 qdio_shutdown_queues(cdev);
1186 qdio_shutdown_debug_entries(irq_ptr);
1187
1188 /* cleanup subchannel */
1189 spin_lock_irq(get_ccwdev_lock(cdev));
1190
1191 if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
1192 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
1193 else
1194 /* default behaviour is halt */
1195 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
1196 if (rc) {
1197 DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
1198 DBF_ERROR("rc:%4d", rc);
1199 goto no_cleanup;
1200 }
1201
1202 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
1203 spin_unlock_irq(get_ccwdev_lock(cdev));
1204 wait_event_interruptible_timeout(cdev->private->wait_q,
1205 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
1206 irq_ptr->state == QDIO_IRQ_STATE_ERR,
1207 10 * HZ);
1208 spin_lock_irq(get_ccwdev_lock(cdev));
1209
1210 no_cleanup:
1211 qdio_shutdown_thinint(irq_ptr);
1212
1213 /* restore interrupt handler */
1214 if ((void *)cdev->handler == (void *)qdio_int_handler) {
1215 cdev->handler = irq_ptr->orig_handler;
1216 cdev->private->intparm = 0;
1217 }
1218 spin_unlock_irq(get_ccwdev_lock(cdev));
1219
1220 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1221 mutex_unlock(&irq_ptr->setup_mutex);
1222 if (rc)
1223 return rc;
1224 return 0;
1225 }
1226 EXPORT_SYMBOL_GPL(qdio_shutdown);
1227
1228 /**
1229 * qdio_free - free data structures for a qdio subchannel
1230 * @cdev: associated ccw device
1231 */
qdio_free(struct ccw_device * cdev)1232 int qdio_free(struct ccw_device *cdev)
1233 {
1234 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1235 struct subchannel_id schid;
1236
1237 if (!irq_ptr)
1238 return -ENODEV;
1239
1240 ccw_device_get_schid(cdev, &schid);
1241 DBF_EVENT("qfree:%4x", schid.sch_no);
1242 DBF_DEV_EVENT(DBF_ERR, irq_ptr, "dbf abandoned");
1243 mutex_lock(&irq_ptr->setup_mutex);
1244
1245 irq_ptr->debug_area = NULL;
1246 cdev->private->qdio_data = NULL;
1247 mutex_unlock(&irq_ptr->setup_mutex);
1248
1249 qdio_release_memory(irq_ptr);
1250 return 0;
1251 }
1252 EXPORT_SYMBOL_GPL(qdio_free);
1253
1254 /**
1255 * qdio_allocate - allocate qdio queues and associated data
1256 * @init_data: initialization data
1257 */
qdio_allocate(struct qdio_initialize * init_data)1258 int qdio_allocate(struct qdio_initialize *init_data)
1259 {
1260 struct subchannel_id schid;
1261 struct qdio_irq *irq_ptr;
1262
1263 ccw_device_get_schid(init_data->cdev, &schid);
1264 DBF_EVENT("qallocate:%4x", schid.sch_no);
1265
1266 if ((init_data->no_input_qs && !init_data->input_handler) ||
1267 (init_data->no_output_qs && !init_data->output_handler))
1268 return -EINVAL;
1269
1270 if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
1271 (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
1272 return -EINVAL;
1273
1274 if ((!init_data->input_sbal_addr_array) ||
1275 (!init_data->output_sbal_addr_array))
1276 return -EINVAL;
1277
1278 /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
1279 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1280 if (!irq_ptr)
1281 goto out_err;
1282
1283 mutex_init(&irq_ptr->setup_mutex);
1284 if (qdio_allocate_dbf(init_data, irq_ptr))
1285 goto out_rel;
1286
1287 /*
1288 * Allocate a page for the chsc calls in qdio_establish.
1289 * Must be pre-allocated since a zfcp recovery will call
1290 * qdio_establish. In case of low memory and swap on a zfcp disk
1291 * we may not be able to allocate memory otherwise.
1292 */
1293 irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
1294 if (!irq_ptr->chsc_page)
1295 goto out_rel;
1296
1297 /* qdr is used in ccw1.cda which is u32 */
1298 irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1299 if (!irq_ptr->qdr)
1300 goto out_rel;
1301
1302 if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
1303 init_data->no_output_qs))
1304 goto out_rel;
1305
1306 init_data->cdev->private->qdio_data = irq_ptr;
1307 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1308 return 0;
1309 out_rel:
1310 qdio_release_memory(irq_ptr);
1311 out_err:
1312 return -ENOMEM;
1313 }
1314 EXPORT_SYMBOL_GPL(qdio_allocate);
1315
qdio_detect_hsicq(struct qdio_irq * irq_ptr)1316 static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
1317 {
1318 struct qdio_q *q = irq_ptr->input_qs[0];
1319 int i, use_cq = 0;
1320
1321 if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
1322 use_cq = 1;
1323
1324 for_each_output_queue(irq_ptr, q, i) {
1325 if (use_cq) {
1326 if (qdio_enable_async_operation(&q->u.out) < 0) {
1327 use_cq = 0;
1328 continue;
1329 }
1330 } else
1331 qdio_disable_async_operation(&q->u.out);
1332 }
1333 DBF_EVENT("use_cq:%d", use_cq);
1334 }
1335
1336 /**
1337 * qdio_establish - establish queues on a qdio subchannel
1338 * @init_data: initialization data
1339 */
qdio_establish(struct qdio_initialize * init_data)1340 int qdio_establish(struct qdio_initialize *init_data)
1341 {
1342 struct ccw_device *cdev = init_data->cdev;
1343 struct subchannel_id schid;
1344 struct qdio_irq *irq_ptr;
1345 int rc;
1346
1347 ccw_device_get_schid(cdev, &schid);
1348 DBF_EVENT("qestablish:%4x", schid.sch_no);
1349
1350 irq_ptr = cdev->private->qdio_data;
1351 if (!irq_ptr)
1352 return -ENODEV;
1353
1354 mutex_lock(&irq_ptr->setup_mutex);
1355 qdio_setup_irq(init_data);
1356
1357 rc = qdio_establish_thinint(irq_ptr);
1358 if (rc) {
1359 mutex_unlock(&irq_ptr->setup_mutex);
1360 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1361 return rc;
1362 }
1363
1364 /* establish q */
1365 irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
1366 irq_ptr->ccw.flags = CCW_FLAG_SLI;
1367 irq_ptr->ccw.count = irq_ptr->equeue.count;
1368 irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
1369
1370 spin_lock_irq(get_ccwdev_lock(cdev));
1371 ccw_device_set_options_mask(cdev, 0);
1372
1373 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
1374 spin_unlock_irq(get_ccwdev_lock(cdev));
1375 if (rc) {
1376 DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
1377 DBF_ERROR("rc:%4x", rc);
1378 mutex_unlock(&irq_ptr->setup_mutex);
1379 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1380 return rc;
1381 }
1382
1383 wait_event_interruptible_timeout(cdev->private->wait_q,
1384 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
1385 irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
1386
1387 if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
1388 mutex_unlock(&irq_ptr->setup_mutex);
1389 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1390 return -EIO;
1391 }
1392
1393 qdio_setup_ssqd_info(irq_ptr);
1394
1395 qdio_detect_hsicq(irq_ptr);
1396
1397 /* qebsm is now setup if available, initialize buffer states */
1398 qdio_init_buf_states(irq_ptr);
1399
1400 mutex_unlock(&irq_ptr->setup_mutex);
1401 qdio_print_subchannel_info(irq_ptr, cdev);
1402 qdio_setup_debug_entries(irq_ptr, cdev);
1403 return 0;
1404 }
1405 EXPORT_SYMBOL_GPL(qdio_establish);
1406
1407 /**
1408 * qdio_activate - activate queues on a qdio subchannel
1409 * @cdev: associated cdev
1410 */
qdio_activate(struct ccw_device * cdev)1411 int qdio_activate(struct ccw_device *cdev)
1412 {
1413 struct subchannel_id schid;
1414 struct qdio_irq *irq_ptr;
1415 int rc;
1416
1417 ccw_device_get_schid(cdev, &schid);
1418 DBF_EVENT("qactivate:%4x", schid.sch_no);
1419
1420 irq_ptr = cdev->private->qdio_data;
1421 if (!irq_ptr)
1422 return -ENODEV;
1423
1424 mutex_lock(&irq_ptr->setup_mutex);
1425 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1426 rc = -EBUSY;
1427 goto out;
1428 }
1429
1430 irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
1431 irq_ptr->ccw.flags = CCW_FLAG_SLI;
1432 irq_ptr->ccw.count = irq_ptr->aqueue.count;
1433 irq_ptr->ccw.cda = 0;
1434
1435 spin_lock_irq(get_ccwdev_lock(cdev));
1436 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
1437
1438 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
1439 0, DOIO_DENY_PREFETCH);
1440 spin_unlock_irq(get_ccwdev_lock(cdev));
1441 if (rc) {
1442 DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
1443 DBF_ERROR("rc:%4x", rc);
1444 goto out;
1445 }
1446
1447 if (is_thinint_irq(irq_ptr))
1448 tiqdio_add_input_queues(irq_ptr);
1449
1450 /* wait for subchannel to become active */
1451 msleep(5);
1452
1453 switch (irq_ptr->state) {
1454 case QDIO_IRQ_STATE_STOPPED:
1455 case QDIO_IRQ_STATE_ERR:
1456 rc = -EIO;
1457 break;
1458 default:
1459 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
1460 rc = 0;
1461 }
1462 out:
1463 mutex_unlock(&irq_ptr->setup_mutex);
1464 return rc;
1465 }
1466 EXPORT_SYMBOL_GPL(qdio_activate);
1467
buf_in_between(int bufnr,int start,int count)1468 static inline int buf_in_between(int bufnr, int start, int count)
1469 {
1470 int end = add_buf(start, count);
1471
1472 if (end > start) {
1473 if (bufnr >= start && bufnr < end)
1474 return 1;
1475 else
1476 return 0;
1477 }
1478
1479 /* wrap-around case */
1480 if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
1481 (bufnr < end))
1482 return 1;
1483 else
1484 return 0;
1485 }
1486
1487 /**
1488 * handle_inbound - reset processed input buffers
1489 * @q: queue containing the buffers
1490 * @callflags: flags
1491 * @bufnr: first buffer to process
1492 * @count: how many buffers are emptied
1493 */
handle_inbound(struct qdio_q * q,unsigned int callflags,int bufnr,int count)1494 static int handle_inbound(struct qdio_q *q, unsigned int callflags,
1495 int bufnr, int count)
1496 {
1497 int diff;
1498
1499 qperf_inc(q, inbound_call);
1500
1501 if (!q->u.in.polling)
1502 goto set;
1503
1504 /* protect against stop polling setting an ACK for an emptied slsb */
1505 if (count == QDIO_MAX_BUFFERS_PER_Q) {
1506 /* overwriting everything, just delete polling status */
1507 q->u.in.polling = 0;
1508 q->u.in.ack_count = 0;
1509 goto set;
1510 } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
1511 if (is_qebsm(q)) {
1512 /* partial overwrite, just update ack_start */
1513 diff = add_buf(bufnr, count);
1514 diff = sub_buf(diff, q->u.in.ack_start);
1515 q->u.in.ack_count -= diff;
1516 if (q->u.in.ack_count <= 0) {
1517 q->u.in.polling = 0;
1518 q->u.in.ack_count = 0;
1519 goto set;
1520 }
1521 q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
1522 }
1523 else
1524 /* the only ACK will be deleted, so stop polling */
1525 q->u.in.polling = 0;
1526 }
1527
1528 set:
1529 count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
1530 atomic_add(count, &q->nr_buf_used);
1531
1532 if (need_siga_in(q))
1533 return qdio_siga_input(q);
1534
1535 return 0;
1536 }
1537
1538 /**
1539 * handle_outbound - process filled outbound buffers
1540 * @q: queue containing the buffers
1541 * @callflags: flags
1542 * @bufnr: first buffer to process
1543 * @count: how many buffers are filled
1544 */
handle_outbound(struct qdio_q * q,unsigned int callflags,int bufnr,int count)1545 static int handle_outbound(struct qdio_q *q, unsigned int callflags,
1546 int bufnr, int count)
1547 {
1548 unsigned char state = 0;
1549 int used, rc = 0;
1550
1551 qperf_inc(q, outbound_call);
1552
1553 count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
1554 used = atomic_add_return(count, &q->nr_buf_used);
1555
1556 if (used == QDIO_MAX_BUFFERS_PER_Q)
1557 qperf_inc(q, outbound_queue_full);
1558
1559 if (callflags & QDIO_FLAG_PCI_OUT) {
1560 q->u.out.pci_out_enabled = 1;
1561 qperf_inc(q, pci_request_int);
1562 } else
1563 q->u.out.pci_out_enabled = 0;
1564
1565 if (queue_type(q) == QDIO_IQDIO_QFMT) {
1566 unsigned long phys_aob = 0;
1567
1568 /* One SIGA-W per buffer required for unicast HSI */
1569 WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
1570
1571 phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
1572
1573 rc = qdio_kick_outbound_q(q, phys_aob);
1574 } else if (need_siga_sync(q)) {
1575 rc = qdio_siga_sync_q(q);
1576 } else if (count < QDIO_MAX_BUFFERS_PER_Q &&
1577 get_buf_state(q, prev_buf(bufnr), &state, 0) > 0 &&
1578 state == SLSB_CU_OUTPUT_PRIMED) {
1579 /* The previous buffer is not processed yet, tack on. */
1580 qperf_inc(q, fast_requeue);
1581 } else {
1582 rc = qdio_kick_outbound_q(q, 0);
1583 }
1584
1585 /* in case of SIGA errors we must process the error immediately */
1586 if (used >= q->u.out.scan_threshold || rc)
1587 qdio_tasklet_schedule(q);
1588 else
1589 /* free the SBALs in case of no further traffic */
1590 if (!timer_pending(&q->u.out.timer) &&
1591 likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE))
1592 mod_timer(&q->u.out.timer, jiffies + HZ);
1593 return rc;
1594 }
1595
1596 /**
1597 * do_QDIO - process input or output buffers
1598 * @cdev: associated ccw_device for the qdio subchannel
1599 * @callflags: input or output and special flags from the program
1600 * @q_nr: queue number
1601 * @bufnr: buffer number
1602 * @count: how many buffers to process
1603 */
do_QDIO(struct ccw_device * cdev,unsigned int callflags,int q_nr,unsigned int bufnr,unsigned int count)1604 int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
1605 int q_nr, unsigned int bufnr, unsigned int count)
1606 {
1607 struct qdio_irq *irq_ptr;
1608
1609 if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
1610 return -EINVAL;
1611
1612 irq_ptr = cdev->private->qdio_data;
1613 if (!irq_ptr)
1614 return -ENODEV;
1615
1616 DBF_DEV_EVENT(DBF_INFO, irq_ptr,
1617 "do%02x b:%02x c:%02x", callflags, bufnr, count);
1618
1619 if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
1620 return -EIO;
1621 if (!count)
1622 return 0;
1623 if (callflags & QDIO_FLAG_SYNC_INPUT)
1624 return handle_inbound(irq_ptr->input_qs[q_nr],
1625 callflags, bufnr, count);
1626 else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
1627 return handle_outbound(irq_ptr->output_qs[q_nr],
1628 callflags, bufnr, count);
1629 return -EINVAL;
1630 }
1631 EXPORT_SYMBOL_GPL(do_QDIO);
1632
1633 /**
1634 * qdio_start_irq - process input buffers
1635 * @cdev: associated ccw_device for the qdio subchannel
1636 * @nr: input queue number
1637 *
1638 * Return codes
1639 * 0 - success
1640 * 1 - irqs not started since new data is available
1641 */
qdio_start_irq(struct ccw_device * cdev,int nr)1642 int qdio_start_irq(struct ccw_device *cdev, int nr)
1643 {
1644 struct qdio_q *q;
1645 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1646
1647 if (!irq_ptr)
1648 return -ENODEV;
1649 q = irq_ptr->input_qs[nr];
1650
1651 clear_nonshared_ind(irq_ptr);
1652 qdio_stop_polling(q);
1653 clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
1654
1655 /*
1656 * We need to check again to not lose initiative after
1657 * resetting the ACK state.
1658 */
1659 if (test_nonshared_ind(irq_ptr))
1660 goto rescan;
1661 if (!qdio_inbound_q_done(q))
1662 goto rescan;
1663 return 0;
1664
1665 rescan:
1666 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
1667 &q->u.in.queue_irq_state))
1668 return 0;
1669 else
1670 return 1;
1671
1672 }
1673 EXPORT_SYMBOL(qdio_start_irq);
1674
1675 /**
1676 * qdio_get_next_buffers - process input buffers
1677 * @cdev: associated ccw_device for the qdio subchannel
1678 * @nr: input queue number
1679 * @bufnr: first filled buffer number
1680 * @error: buffers are in error state
1681 *
1682 * Return codes
1683 * < 0 - error
1684 * = 0 - no new buffers found
1685 * > 0 - number of processed buffers
1686 */
qdio_get_next_buffers(struct ccw_device * cdev,int nr,int * bufnr,int * error)1687 int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
1688 int *error)
1689 {
1690 struct qdio_q *q;
1691 int start, end;
1692 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1693
1694 if (!irq_ptr)
1695 return -ENODEV;
1696 q = irq_ptr->input_qs[nr];
1697
1698 /*
1699 * Cannot rely on automatic sync after interrupt since queues may
1700 * also be examined without interrupt.
1701 */
1702 if (need_siga_sync(q))
1703 qdio_sync_queues(q);
1704
1705 /* check the PCI capable outbound queues. */
1706 qdio_check_outbound_after_thinint(q);
1707
1708 if (!qdio_inbound_q_moved(q))
1709 return 0;
1710
1711 /* Note: upper-layer MUST stop processing immediately here ... */
1712 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
1713 return -EIO;
1714
1715 start = q->first_to_kick;
1716 end = q->first_to_check;
1717 *bufnr = start;
1718 *error = q->qdio_error;
1719
1720 /* for the next time */
1721 q->first_to_kick = end;
1722 q->qdio_error = 0;
1723 return sub_buf(end, start);
1724 }
1725 EXPORT_SYMBOL(qdio_get_next_buffers);
1726
1727 /**
1728 * qdio_stop_irq - disable interrupt processing for the device
1729 * @cdev: associated ccw_device for the qdio subchannel
1730 * @nr: input queue number
1731 *
1732 * Return codes
1733 * 0 - interrupts were already disabled
1734 * 1 - interrupts successfully disabled
1735 */
qdio_stop_irq(struct ccw_device * cdev,int nr)1736 int qdio_stop_irq(struct ccw_device *cdev, int nr)
1737 {
1738 struct qdio_q *q;
1739 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1740
1741 if (!irq_ptr)
1742 return -ENODEV;
1743 q = irq_ptr->input_qs[nr];
1744
1745 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
1746 &q->u.in.queue_irq_state))
1747 return 0;
1748 else
1749 return 1;
1750 }
1751 EXPORT_SYMBOL(qdio_stop_irq);
1752
1753 /**
1754 * qdio_pnso_brinfo() - perform network subchannel op #0 - bridge info.
1755 * @schid: Subchannel ID.
1756 * @cnc: Boolean Change-Notification Control
1757 * @response: Response code will be stored at this address
1758 * @cb: Callback function will be executed for each element
1759 * of the address list
1760 * @priv: Pointer to pass to the callback function.
1761 *
1762 * Performs "Store-network-bridging-information list" operation and calls
1763 * the callback function for every entry in the list. If "change-
1764 * notification-control" is set, further changes in the address list
1765 * will be reported via the IPA command.
1766 */
qdio_pnso_brinfo(struct subchannel_id schid,int cnc,u16 * response,void (* cb)(void * priv,enum qdio_brinfo_entry_type type,void * entry),void * priv)1767 int qdio_pnso_brinfo(struct subchannel_id schid,
1768 int cnc, u16 *response,
1769 void (*cb)(void *priv, enum qdio_brinfo_entry_type type,
1770 void *entry),
1771 void *priv)
1772 {
1773 struct chsc_pnso_area *rr;
1774 int rc;
1775 u32 prev_instance = 0;
1776 int isfirstblock = 1;
1777 int i, size, elems;
1778
1779 rr = (struct chsc_pnso_area *)get_zeroed_page(GFP_KERNEL);
1780 if (rr == NULL)
1781 return -ENOMEM;
1782 do {
1783 /* on the first iteration, naihdr.resume_token will be zero */
1784 rc = chsc_pnso_brinfo(schid, rr, rr->naihdr.resume_token, cnc);
1785 if (rc != 0 && rc != -EBUSY)
1786 goto out;
1787 if (rr->response.code != 1) {
1788 rc = -EIO;
1789 continue;
1790 } else
1791 rc = 0;
1792
1793 if (cb == NULL)
1794 continue;
1795
1796 size = rr->naihdr.naids;
1797 elems = (rr->response.length -
1798 sizeof(struct chsc_header) -
1799 sizeof(struct chsc_brinfo_naihdr)) /
1800 size;
1801
1802 if (!isfirstblock && (rr->naihdr.instance != prev_instance)) {
1803 /* Inform the caller that they need to scrap */
1804 /* the data that was already reported via cb */
1805 rc = -EAGAIN;
1806 break;
1807 }
1808 isfirstblock = 0;
1809 prev_instance = rr->naihdr.instance;
1810 for (i = 0; i < elems; i++)
1811 switch (size) {
1812 case sizeof(struct qdio_brinfo_entry_l3_ipv6):
1813 (*cb)(priv, l3_ipv6_addr,
1814 &rr->entries.l3_ipv6[i]);
1815 break;
1816 case sizeof(struct qdio_brinfo_entry_l3_ipv4):
1817 (*cb)(priv, l3_ipv4_addr,
1818 &rr->entries.l3_ipv4[i]);
1819 break;
1820 case sizeof(struct qdio_brinfo_entry_l2):
1821 (*cb)(priv, l2_addr_lnid,
1822 &rr->entries.l2[i]);
1823 break;
1824 default:
1825 WARN_ON_ONCE(1);
1826 rc = -EIO;
1827 goto out;
1828 }
1829 } while (rr->response.code == 0x0107 || /* channel busy */
1830 (rr->response.code == 1 && /* list stored */
1831 /* resume token is non-zero => list incomplete */
1832 (rr->naihdr.resume_token.t1 || rr->naihdr.resume_token.t2)));
1833 (*response) = rr->response.code;
1834
1835 out:
1836 free_page((unsigned long)rr);
1837 return rc;
1838 }
1839 EXPORT_SYMBOL_GPL(qdio_pnso_brinfo);
1840
init_QDIO(void)1841 static int __init init_QDIO(void)
1842 {
1843 int rc;
1844
1845 rc = qdio_debug_init();
1846 if (rc)
1847 return rc;
1848 rc = qdio_setup_init();
1849 if (rc)
1850 goto out_debug;
1851 rc = tiqdio_allocate_memory();
1852 if (rc)
1853 goto out_cache;
1854 rc = tiqdio_register_thinints();
1855 if (rc)
1856 goto out_ti;
1857 return 0;
1858
1859 out_ti:
1860 tiqdio_free_memory();
1861 out_cache:
1862 qdio_setup_exit();
1863 out_debug:
1864 qdio_debug_exit();
1865 return rc;
1866 }
1867
exit_QDIO(void)1868 static void __exit exit_QDIO(void)
1869 {
1870 tiqdio_unregister_thinints();
1871 tiqdio_free_memory();
1872 qdio_setup_exit();
1873 qdio_debug_exit();
1874 }
1875
1876 module_init(init_QDIO);
1877 module_exit(exit_QDIO);
1878