1 /*
2 * Copyright (c) 2021 The Linux Foundation. All rights reserved.
3 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for
6 * any purpose with or without fee is hereby granted, provided that the
7 * above copyright notice and this permission notice appear in all
8 * copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17 * PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 #include <wlan_utility.h>
21 #include <dp_internal.h>
22 #include "dp_rings.h"
23 #include <dp_htt.h>
24 #include "dp_be.h"
25 #include "dp_be_tx.h"
26 #include "dp_be_rx.h"
27 #ifdef WIFI_MONITOR_SUPPORT
28 #if !defined(DISABLE_MON_CONFIG) && (defined(WLAN_PKT_CAPTURE_TX_2_0) || \
29 defined(WLAN_PKT_CAPTURE_RX_2_0))
30 #include "dp_mon_2.0.h"
31 #endif
32 #include "dp_mon.h"
33 #endif
34 #include <hal_be_api.h>
35 #ifdef WLAN_SUPPORT_PPEDS
36 #include "be/dp_ppeds.h"
37 #include <ppe_vp_public.h>
38 #include <ppe_drv_sc.h>
39 #endif
40
41 #ifdef WLAN_SUPPORT_PPEDS
42 static const char *ring_usage_dump[RING_USAGE_MAX] = {
43 "100%",
44 "Greater than 90%",
45 "70 to 90%",
46 "50 to 70%",
47 "Less than 50%"
48 };
49 #endif
50
51 /* Generic AST entry aging timer value */
52 #define DP_AST_AGING_TIMER_DEFAULT_MS 5000
53
54 #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
55 #define DP_TX_VDEV_ID_CHECK_ENABLE 0
56
57 static struct wlan_cfg_tcl_wbm_ring_num_map g_tcl_wbm_map_array[MAX_TCL_DATA_RINGS] = {
58 {.tcl_ring_num = 0, .wbm_ring_num = 0, .wbm_rbm_id = HAL_BE_WBM_SW0_BM_ID, .for_ipa = 0},
59 {1, 4, HAL_BE_WBM_SW4_BM_ID, 0},
60 {2, 2, HAL_BE_WBM_SW2_BM_ID, 0},
61 #ifdef QCA_WIFI_KIWI_V2
62 {3, 5, HAL_BE_WBM_SW5_BM_ID, 0},
63 {4, 6, HAL_BE_WBM_SW6_BM_ID, 0}
64 #else
65 {3, 6, HAL_BE_WBM_SW5_BM_ID, 0},
66 {4, 7, HAL_BE_WBM_SW6_BM_ID, 0}
67 #endif
68 };
69 #else
70 #define DP_TX_VDEV_ID_CHECK_ENABLE 1
71
72 static struct wlan_cfg_tcl_wbm_ring_num_map g_tcl_wbm_map_array[MAX_TCL_DATA_RINGS] = {
73 {.tcl_ring_num = 0, .wbm_ring_num = 0, .wbm_rbm_id = HAL_BE_WBM_SW0_BM_ID, .for_ipa = 0},
74 {1, 1, HAL_BE_WBM_SW1_BM_ID, 0},
75 {2, 2, HAL_BE_WBM_SW2_BM_ID, 0},
76 {3, 3, HAL_BE_WBM_SW3_BM_ID, 0},
77 {4, 4, HAL_BE_WBM_SW4_BM_ID, 0}
78 };
79 #endif
80
81 #ifdef WLAN_SUPPORT_PPEDS
82 static struct cdp_ppeds_txrx_ops dp_ops_ppeds_be = {
83 .ppeds_entry_attach = dp_ppeds_attach_vdev_be,
84 .ppeds_entry_detach = dp_ppeds_detach_vdev_be,
85 .ppeds_set_int_pri2tid = dp_ppeds_set_int_pri2tid_be,
86 .ppeds_update_int_pri2tid = dp_ppeds_update_int_pri2tid_be,
87 .ppeds_entry_dump = dp_ppeds_dump_ppe_vp_tbl_be,
88 .ppeds_enable_pri2tid = dp_ppeds_vdev_enable_pri2tid_be,
89 .ppeds_vp_setup_recovery = dp_ppeds_vp_setup_on_fw_recovery,
90 .ppeds_stats_sync = dp_ppeds_stats_sync_be,
91 };
92
dp_ppeds_rings_status(struct dp_soc * soc)93 static void dp_ppeds_rings_status(struct dp_soc *soc)
94 {
95 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
96
97 dp_print_ring_stat_from_hal(soc, &be_soc->reo2ppe_ring, REO2PPE);
98 dp_print_ring_stat_from_hal(soc, &be_soc->ppe2tcl_ring, PPE2TCL);
99 dp_print_ring_stat_from_hal(soc, &be_soc->ppeds_wbm_release_ring,
100 WBM2SW_RELEASE);
101 }
102
103 #ifdef GLOBAL_ASSERT_AVOIDANCE
dp_ppeds_print_assert_war_stats(struct dp_soc_be * be_soc)104 void dp_ppeds_print_assert_war_stats(struct dp_soc_be *be_soc)
105 {
106 DP_PRINT_STATS("PPE-DS Tx WAR stats: [%u] [%u] [%u]",
107 be_soc->ppeds_stats.tx.tx_comp_buf_src,
108 be_soc->ppeds_stats.tx.tx_comp_desc_null,
109 be_soc->ppeds_stats.tx.tx_comp_invalid_flag);
110 }
111
dp_ppeds_clear_assert_war_stats(struct dp_soc_be * be_soc)112 static void dp_ppeds_clear_assert_war_stats(struct dp_soc_be *be_soc)
113 {
114 be_soc->ppeds_stats.tx.tx_comp_buf_src = 0;
115 be_soc->ppeds_stats.tx.tx_comp_desc_null = 0;
116 be_soc->ppeds_stats.tx.tx_comp_invalid_flag = 0;
117 }
118 #else
dp_ppeds_print_assert_war_stats(struct dp_soc_be * be_soc)119 static void dp_ppeds_print_assert_war_stats(struct dp_soc_be *be_soc)
120 {
121 }
122
dp_ppeds_clear_assert_war_stats(struct dp_soc_be * be_soc)123 static void dp_ppeds_clear_assert_war_stats(struct dp_soc_be *be_soc)
124 {
125 }
126 #endif
127
dp_ppeds_inuse_desc(struct dp_soc * soc)128 static void dp_ppeds_inuse_desc(struct dp_soc *soc)
129 {
130 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
131
132 DP_PRINT_STATS("PPE-DS Tx Descriptors in Use = %u num_free %u",
133 be_soc->ppeds_tx_desc.num_allocated,
134 be_soc->ppeds_tx_desc.num_free);
135
136 DP_PRINT_STATS("PPE-DS Tx desc alloc failed %u",
137 be_soc->ppeds_stats.tx.desc_alloc_failed);
138
139 dp_ppeds_print_assert_war_stats(be_soc);
140 }
141
dp_ppeds_clear_stats(struct dp_soc * soc)142 static void dp_ppeds_clear_stats(struct dp_soc *soc)
143 {
144 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
145
146 be_soc->ppeds_stats.tx.desc_alloc_failed = 0;
147 dp_ppeds_clear_assert_war_stats(be_soc);
148 }
149
dp_ppeds_rings_stats(struct dp_soc * soc)150 static void dp_ppeds_rings_stats(struct dp_soc *soc)
151 {
152 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
153 int i = 0;
154
155 DP_PRINT_STATS("Ring utilization statistics");
156 DP_PRINT_STATS("WBM2SW_RELEASE");
157
158 for (i = 0; i < RING_USAGE_MAX; i++)
159 DP_PRINT_STATS("\t %s utilized %d instances",
160 ring_usage_dump[i],
161 be_soc->ppeds_wbm_release_ring.stats.util[i]);
162
163 DP_PRINT_STATS("PPE2TCL");
164
165 for (i = 0; i < RING_USAGE_MAX; i++)
166 DP_PRINT_STATS("\t %s utilized %d instances",
167 ring_usage_dump[i],
168 be_soc->ppe2tcl_ring.stats.util[i]);
169 }
170
dp_ppeds_clear_rings_stats(struct dp_soc * soc)171 static void dp_ppeds_clear_rings_stats(struct dp_soc *soc)
172 {
173 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
174
175 memset(&be_soc->ppeds_wbm_release_ring.stats, 0,
176 sizeof(struct ring_util_stats));
177 memset(&be_soc->ppe2tcl_ring.stats, 0, sizeof(struct ring_util_stats));
178 }
179 #endif
180
dp_soc_cfg_attach_be(struct dp_soc * soc)181 static void dp_soc_cfg_attach_be(struct dp_soc *soc)
182 {
183 struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx = soc->wlan_cfg_ctx;
184 dp_soc_cfg_attach(soc);
185
186 wlan_cfg_set_rx_rel_ring_id(soc_cfg_ctx, WBM2SW_REL_ERR_RING_NUM);
187
188 soc->wlan_cfg_ctx->tcl_wbm_map_array = g_tcl_wbm_map_array;
189
190 /* this is used only when dmac mode is enabled */
191 soc->num_rx_refill_buf_rings = 1;
192
193 /*
194 * do not allocate TCL credit ring for BE as we already have
195 * 4 TCL_DATA rings
196 */
197 soc->init_tcl_cmd_cred_ring = false;
198 soc->wlan_cfg_ctx->notify_frame_support =
199 DP_MARK_NOTIFY_FRAME_SUPPORT;
200 }
201
dp_get_context_size_be(enum dp_context_type context_type)202 qdf_size_t dp_get_context_size_be(enum dp_context_type context_type)
203 {
204 switch (context_type) {
205 case DP_CONTEXT_TYPE_SOC:
206 return sizeof(struct dp_soc_be);
207 case DP_CONTEXT_TYPE_PDEV:
208 return sizeof(struct dp_pdev_be);
209 case DP_CONTEXT_TYPE_VDEV:
210 return sizeof(struct dp_vdev_be);
211 case DP_CONTEXT_TYPE_PEER:
212 return sizeof(struct dp_peer_be);
213 default:
214 return 0;
215 }
216 }
217
218 #if defined(DP_FEATURE_HW_COOKIE_CONVERSION) || defined(WLAN_SUPPORT_RX_FISA)
dp_get_cmem_chunk(struct dp_soc * soc,uint64_t size,enum CMEM_MEM_CLIENTS client)219 static uint64_t dp_get_cmem_chunk(struct dp_soc *soc, uint64_t size,
220 enum CMEM_MEM_CLIENTS client)
221 {
222 uint64_t cmem_chunk;
223
224 dp_info("cmem base 0x%llx, total size 0x%llx avail_size 0x%llx",
225 soc->cmem_base, soc->cmem_total_size, soc->cmem_avail_size);
226
227 /* Check if requested cmem space is available */
228 if (soc->cmem_avail_size < size) {
229 dp_err("cmem_size 0x%llx bytes < requested size 0x%llx bytes",
230 soc->cmem_avail_size, size);
231 return 0;
232 }
233
234 cmem_chunk = soc->cmem_base +
235 (soc->cmem_total_size - soc->cmem_avail_size);
236 soc->cmem_avail_size -= size;
237 dp_info("Reserved cmem space 0x%llx, size 0x%llx for client %d",
238 cmem_chunk, size, client);
239
240 return cmem_chunk;
241 }
242 #endif
243
244 #ifdef WLAN_SUPPORT_RX_FISA
dp_get_fst_cmem_base_be(struct dp_soc * soc,uint64_t size)245 static uint64_t dp_get_fst_cmem_base_be(struct dp_soc *soc, uint64_t size)
246 {
247 return dp_get_cmem_chunk(soc, size, FISA_FST);
248 }
249
dp_initialize_arch_ops_be_fisa(struct dp_arch_ops * arch_ops)250 static void dp_initialize_arch_ops_be_fisa(struct dp_arch_ops *arch_ops)
251 {
252 arch_ops->dp_get_fst_cmem_base = dp_get_fst_cmem_base_be;
253 }
254 #else
dp_initialize_arch_ops_be_fisa(struct dp_arch_ops * arch_ops)255 static void dp_initialize_arch_ops_be_fisa(struct dp_arch_ops *arch_ops)
256 {
257 }
258 #endif
259
260 #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
261 #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
262 /**
263 * dp_cc_wbm_sw_en_cfg() - configure HW cookie conversion enablement
264 * per wbm2sw ring
265 *
266 * @cc_cfg: HAL HW cookie conversion configuration structure pointer
267 *
268 * Return: None
269 */
270 #ifdef IPA_OPT_WIFI_DP
271 static inline
dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config * cc_cfg)272 void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
273 {
274 cc_cfg->wbm2sw6_cc_en = 1;
275 cc_cfg->wbm2sw5_cc_en = 0;
276 cc_cfg->wbm2sw4_cc_en = 1;
277 cc_cfg->wbm2sw3_cc_en = 1;
278 cc_cfg->wbm2sw2_cc_en = 1;
279 /* disable wbm2sw1 hw cc as it's for FW */
280 cc_cfg->wbm2sw1_cc_en = 0;
281 cc_cfg->wbm2sw0_cc_en = 1;
282 cc_cfg->wbm2fw_cc_en = 0;
283 }
284 #else
285 static inline
dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config * cc_cfg)286 void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
287 {
288 cc_cfg->wbm2sw6_cc_en = 1;
289 cc_cfg->wbm2sw5_cc_en = 1;
290 cc_cfg->wbm2sw4_cc_en = 1;
291 cc_cfg->wbm2sw3_cc_en = 1;
292 cc_cfg->wbm2sw2_cc_en = 1;
293 /* disable wbm2sw1 hw cc as it's for FW */
294 cc_cfg->wbm2sw1_cc_en = 0;
295 cc_cfg->wbm2sw0_cc_en = 1;
296 cc_cfg->wbm2fw_cc_en = 0;
297 }
298 #endif
299 #else
300 static inline
dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config * cc_cfg)301 void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
302 {
303 cc_cfg->wbm2sw6_cc_en = 1;
304 cc_cfg->wbm2sw5_cc_en = 1;
305 cc_cfg->wbm2sw4_cc_en = 1;
306 cc_cfg->wbm2sw3_cc_en = 1;
307 cc_cfg->wbm2sw2_cc_en = 1;
308 cc_cfg->wbm2sw1_cc_en = 1;
309 cc_cfg->wbm2sw0_cc_en = 1;
310 cc_cfg->wbm2fw_cc_en = 0;
311 }
312 #endif
313
314 /**
315 * dp_cc_reg_cfg_init() - initialize and configure HW cookie
316 * conversion register
317 *
318 * @soc: SOC handle
319 * @is_4k_align: page address 4k aligned
320 *
321 * Return: None
322 */
dp_cc_reg_cfg_init(struct dp_soc * soc,bool is_4k_align)323 static void dp_cc_reg_cfg_init(struct dp_soc *soc,
324 bool is_4k_align)
325 {
326 struct hal_hw_cc_config cc_cfg = { 0 };
327 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
328
329 if (soc->cdp_soc.ol_ops->get_con_mode &&
330 soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_FTM_MODE)
331 return;
332
333 if (!soc->wlan_cfg_ctx->hw_cc_enabled) {
334 dp_info("INI skip HW CC register setting");
335 return;
336 }
337
338 cc_cfg.lut_base_addr_31_0 = be_soc->cc_cmem_base;
339 cc_cfg.cc_global_en = true;
340 cc_cfg.page_4k_align = is_4k_align;
341 cc_cfg.cookie_offset_msb = DP_CC_DESC_ID_SPT_VA_OS_MSB;
342 cc_cfg.cookie_page_msb = DP_CC_DESC_ID_PPT_PAGE_OS_MSB;
343 /* 36th bit should be 1 then HW know this is CMEM address */
344 cc_cfg.lut_base_addr_39_32 = 0x10;
345
346 cc_cfg.error_path_cookie_conv_en = true;
347 cc_cfg.release_path_cookie_conv_en = true;
348 dp_cc_wbm_sw_en_cfg(&cc_cfg);
349
350 hal_cookie_conversion_reg_cfg_be(soc->hal_soc, &cc_cfg);
351 }
352
353 /**
354 * dp_hw_cc_cmem_write() - DP wrapper function for CMEM buffer writing
355 * @hal_soc_hdl: HAL SOC handle
356 * @offset: CMEM address
357 * @value: value to write
358 *
359 * Return: None.
360 */
dp_hw_cc_cmem_write(hal_soc_handle_t hal_soc_hdl,uint32_t offset,uint32_t value)361 static inline void dp_hw_cc_cmem_write(hal_soc_handle_t hal_soc_hdl,
362 uint32_t offset,
363 uint32_t value)
364 {
365 hal_cmem_write(hal_soc_hdl, offset, value);
366 }
367
368 /**
369 * dp_hw_cc_cmem_addr_init() - Check and initialize CMEM base address for
370 * HW cookie conversion
371 *
372 * @soc: SOC handle
373 *
374 * Return: 0 in case of success, else error value
375 */
dp_hw_cc_cmem_addr_init(struct dp_soc * soc)376 static inline QDF_STATUS dp_hw_cc_cmem_addr_init(struct dp_soc *soc)
377 {
378 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
379
380 be_soc->cc_cmem_base = dp_get_cmem_chunk(soc, DP_CC_PPT_MEM_SIZE,
381 COOKIE_CONVERSION);
382 return QDF_STATUS_SUCCESS;
383 }
384
385 #else
386
dp_cc_reg_cfg_init(struct dp_soc * soc,bool is_4k_align)387 static inline void dp_cc_reg_cfg_init(struct dp_soc *soc,
388 bool is_4k_align) {}
389
dp_hw_cc_cmem_write(hal_soc_handle_t hal_soc_hdl,uint32_t offset,uint32_t value)390 static inline void dp_hw_cc_cmem_write(hal_soc_handle_t hal_soc_hdl,
391 uint32_t offset,
392 uint32_t value)
393 { }
394
dp_hw_cc_cmem_addr_init(struct dp_soc * soc)395 static inline QDF_STATUS dp_hw_cc_cmem_addr_init(struct dp_soc *soc)
396 {
397 return QDF_STATUS_SUCCESS;
398 }
399 #endif
400
401 #if defined(DP_FEATURE_HW_COOKIE_CONVERSION) || defined(WLAN_SUPPORT_RX_FISA)
dp_get_cmem_allocation(struct dp_soc * soc,uint8_t for_feature)402 static QDF_STATUS dp_get_cmem_allocation(struct dp_soc *soc,
403 uint8_t for_feature)
404 {
405 QDF_STATUS status = QDF_STATUS_E_NOMEM;
406
407 switch (for_feature) {
408 case COOKIE_CONVERSION:
409 status = dp_hw_cc_cmem_addr_init(soc);
410 break;
411 default:
412 dp_err("Invalid CMEM request");
413 }
414
415 return status;
416 }
417 #else
dp_get_cmem_allocation(struct dp_soc * soc,uint8_t for_feature)418 static QDF_STATUS dp_get_cmem_allocation(struct dp_soc *soc,
419 uint8_t for_feature)
420 {
421 return QDF_STATUS_SUCCESS;
422 }
423 #endif
424
425 QDF_STATUS
dp_hw_cookie_conversion_attach(struct dp_soc_be * be_soc,struct dp_hw_cookie_conversion_t * cc_ctx,uint32_t num_descs,enum qdf_dp_desc_type desc_type,uint8_t desc_pool_id)426 dp_hw_cookie_conversion_attach(struct dp_soc_be *be_soc,
427 struct dp_hw_cookie_conversion_t *cc_ctx,
428 uint32_t num_descs,
429 enum qdf_dp_desc_type desc_type,
430 uint8_t desc_pool_id)
431 {
432 struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
433 uint32_t num_spt_pages, i = 0;
434 struct dp_spt_page_desc *spt_desc;
435 struct qdf_mem_dma_page_t *dma_page;
436 uint8_t chip_id;
437
438 /* estimate how many SPT DDR pages needed */
439 num_spt_pages = qdf_do_div(
440 num_descs + (DP_CC_SPT_PAGE_MAX_ENTRIES - 1),
441 DP_CC_SPT_PAGE_MAX_ENTRIES);
442 num_spt_pages = num_spt_pages <= DP_CC_PPT_MAX_ENTRIES ?
443 num_spt_pages : DP_CC_PPT_MAX_ENTRIES;
444 dp_info("num_spt_pages needed %d", num_spt_pages);
445
446 dp_desc_multi_pages_mem_alloc(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
447 &cc_ctx->page_pool, qdf_page_size,
448 num_spt_pages, 0, false);
449 if (!cc_ctx->page_pool.dma_pages) {
450 dp_err("spt ddr pages allocation failed");
451 return QDF_STATUS_E_RESOURCES;
452 }
453 cc_ctx->page_desc_base = qdf_mem_malloc(
454 num_spt_pages * sizeof(struct dp_spt_page_desc));
455 if (!cc_ctx->page_desc_base) {
456 dp_err("spt page descs allocation failed");
457 goto fail_0;
458 }
459
460 chip_id = dp_mlo_get_chip_id(soc);
461 cc_ctx->cmem_offset = dp_desc_pool_get_cmem_base(chip_id, desc_pool_id,
462 desc_type);
463
464 /* initial page desc */
465 spt_desc = cc_ctx->page_desc_base;
466 dma_page = cc_ctx->page_pool.dma_pages;
467 while (i < num_spt_pages) {
468 /* check if page address 4K aligned */
469 if (qdf_unlikely(dma_page[i].page_p_addr & 0xFFF)) {
470 dp_err("non-4k aligned pages addr %pK",
471 (void *)dma_page[i].page_p_addr);
472 goto fail_1;
473 }
474
475 spt_desc[i].page_v_addr =
476 dma_page[i].page_v_addr_start;
477 spt_desc[i].page_p_addr =
478 dma_page[i].page_p_addr;
479 i++;
480 }
481
482 cc_ctx->total_page_num = num_spt_pages;
483 qdf_spinlock_create(&cc_ctx->cc_lock);
484
485 return QDF_STATUS_SUCCESS;
486 fail_1:
487 qdf_mem_free(cc_ctx->page_desc_base);
488 cc_ctx->page_desc_base = NULL;
489 fail_0:
490 dp_desc_multi_pages_mem_free(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
491 &cc_ctx->page_pool, 0, false);
492
493 return QDF_STATUS_E_FAILURE;
494 }
495
496 QDF_STATUS
dp_hw_cookie_conversion_detach(struct dp_soc_be * be_soc,struct dp_hw_cookie_conversion_t * cc_ctx)497 dp_hw_cookie_conversion_detach(struct dp_soc_be *be_soc,
498 struct dp_hw_cookie_conversion_t *cc_ctx)
499 {
500 struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
501
502 dp_desc_multi_pages_mem_free(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
503 &cc_ctx->page_pool, 0, false);
504 if (cc_ctx->page_desc_base)
505 qdf_spinlock_destroy(&cc_ctx->cc_lock);
506
507 qdf_mem_free(cc_ctx->page_desc_base);
508 cc_ctx->page_desc_base = NULL;
509
510 return QDF_STATUS_SUCCESS;
511 }
512
513 QDF_STATUS
dp_hw_cookie_conversion_init(struct dp_soc_be * be_soc,struct dp_hw_cookie_conversion_t * cc_ctx)514 dp_hw_cookie_conversion_init(struct dp_soc_be *be_soc,
515 struct dp_hw_cookie_conversion_t *cc_ctx)
516 {
517 struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
518 uint32_t i = 0;
519 struct dp_spt_page_desc *spt_desc;
520 uint32_t ppt_index;
521 uint32_t ppt_id_start;
522
523 if (!cc_ctx->total_page_num) {
524 dp_err("total page num is 0");
525 return QDF_STATUS_E_INVAL;
526 }
527
528 ppt_id_start = DP_CMEM_OFFSET_TO_PPT_ID(cc_ctx->cmem_offset);
529 spt_desc = cc_ctx->page_desc_base;
530 while (i < cc_ctx->total_page_num) {
531 /* write page PA to CMEM */
532 dp_hw_cc_cmem_write(soc->hal_soc,
533 (cc_ctx->cmem_offset + be_soc->cc_cmem_base
534 + (i * DP_CC_PPT_ENTRY_SIZE_4K_ALIGNED)),
535 (spt_desc[i].page_p_addr >>
536 DP_CC_PPT_ENTRY_HW_APEND_BITS_4K_ALIGNED));
537
538 ppt_index = ppt_id_start + i;
539
540 if (ppt_index >= DP_CC_PPT_MAX_ENTRIES)
541 qdf_assert_always(0);
542
543 spt_desc[i].ppt_index = ppt_index;
544
545 be_soc->page_desc_base[ppt_index].page_v_addr =
546 spt_desc[i].page_v_addr;
547 i++;
548 }
549 return QDF_STATUS_SUCCESS;
550 }
551
552 #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
553 QDF_STATUS
dp_hw_cookie_conversion_deinit(struct dp_soc_be * be_soc,struct dp_hw_cookie_conversion_t * cc_ctx)554 dp_hw_cookie_conversion_deinit(struct dp_soc_be *be_soc,
555 struct dp_hw_cookie_conversion_t *cc_ctx)
556 {
557 uint32_t ppt_index;
558 struct dp_spt_page_desc *spt_desc;
559 int i = 0;
560
561 spt_desc = cc_ctx->page_desc_base;
562 while (i < cc_ctx->total_page_num) {
563 ppt_index = spt_desc[i].ppt_index;
564 be_soc->page_desc_base[ppt_index].page_v_addr = NULL;
565 i++;
566 }
567 return QDF_STATUS_SUCCESS;
568 }
569 #else
570 QDF_STATUS
dp_hw_cookie_conversion_deinit(struct dp_soc_be * be_soc,struct dp_hw_cookie_conversion_t * cc_ctx)571 dp_hw_cookie_conversion_deinit(struct dp_soc_be *be_soc,
572 struct dp_hw_cookie_conversion_t *cc_ctx)
573 {
574 struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
575 uint32_t ppt_index;
576 struct dp_spt_page_desc *spt_desc;
577 int i = 0;
578
579 spt_desc = cc_ctx->page_desc_base;
580 while (i < cc_ctx->total_page_num) {
581 /* reset PA in CMEM to NULL */
582 dp_hw_cc_cmem_write(soc->hal_soc,
583 (cc_ctx->cmem_offset + be_soc->cc_cmem_base
584 + (i * DP_CC_PPT_ENTRY_SIZE_4K_ALIGNED)),
585 0);
586
587 ppt_index = spt_desc[i].ppt_index;
588 be_soc->page_desc_base[ppt_index].page_v_addr = NULL;
589 i++;
590 }
591 return QDF_STATUS_SUCCESS;
592 }
593 #endif
594
595 #ifdef WLAN_SUPPORT_PPEDS
dp_soc_ppeds_attach_be(struct dp_soc * soc)596 static QDF_STATUS dp_soc_ppeds_attach_be(struct dp_soc *soc)
597 {
598 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
599 int target_type = hal_get_target_type(soc->hal_soc);
600 struct cdp_ops *cdp_ops = soc->cdp_soc.ops;
601
602 /*
603 * Check if PPE DS is enabled and wlan soc supports it.
604 */
605 if (!wlan_cfg_get_dp_soc_ppeds_enable(soc->wlan_cfg_ctx) ||
606 !dp_ppeds_target_supported(target_type))
607 return QDF_STATUS_SUCCESS;
608
609 if (dp_ppeds_attach_soc_be(be_soc) != QDF_STATUS_SUCCESS)
610 return QDF_STATUS_SUCCESS;
611
612 cdp_ops->ppeds_ops = &dp_ops_ppeds_be;
613
614 return QDF_STATUS_SUCCESS;
615 }
616
dp_soc_ppeds_detach_be(struct dp_soc * soc)617 static QDF_STATUS dp_soc_ppeds_detach_be(struct dp_soc *soc)
618 {
619 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
620 struct cdp_ops *cdp_ops = soc->cdp_soc.ops;
621
622 if (!be_soc->ppeds_handle)
623 return QDF_STATUS_E_FAILURE;
624
625 dp_ppeds_detach_soc_be(be_soc);
626
627 cdp_ops->ppeds_ops = NULL;
628
629 return QDF_STATUS_SUCCESS;
630 }
631
dp_peer_ppeds_default_route_be(struct dp_soc * soc,struct dp_peer_be * be_peer,uint8_t vdev_id,uint16_t src_info)632 static QDF_STATUS dp_peer_ppeds_default_route_be(struct dp_soc *soc,
633 struct dp_peer_be *be_peer,
634 uint8_t vdev_id,
635 uint16_t src_info)
636 {
637 uint16_t service_code;
638 uint8_t priority_valid;
639 uint8_t use_ppe_ds = PEER_ROUTING_USE_PPE;
640 uint8_t peer_routing_enabled = PEER_ROUTING_ENABLED;
641 QDF_STATUS status = QDF_STATUS_SUCCESS;
642 struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
643 struct dp_vdev_be *be_vdev;
644
645 be_vdev = dp_get_be_vdev_from_dp_vdev(be_peer->peer.vdev);
646
647 /*
648 * Program service code bypass to avoid L2 new mac address
649 * learning exception when fdb learning is disabled.
650 */
651 service_code = PPE_DRV_SC_SPF_BYPASS;
652 priority_valid = be_peer->priority_valid;
653
654 /*
655 * if FST is enabled then let flow rule take the decision of
656 * routing the pkt to DS or host
657 */
658 if (wlan_cfg_is_rx_flow_tag_enabled(cfg))
659 use_ppe_ds = 0;
660
661 if (soc->cdp_soc.ol_ops->peer_set_ppeds_default_routing) {
662 status =
663 soc->cdp_soc.ol_ops->peer_set_ppeds_default_routing
664 (soc->ctrl_psoc,
665 be_peer->peer.mac_addr.raw,
666 service_code, priority_valid,
667 src_info, vdev_id, use_ppe_ds,
668 peer_routing_enabled);
669 if (status != QDF_STATUS_SUCCESS) {
670 dp_err("vdev_id: %d, PPE peer routing mac:"
671 QDF_MAC_ADDR_FMT, vdev_id,
672 QDF_MAC_ADDR_REF(be_peer->peer.mac_addr.raw));
673
674 return QDF_STATUS_E_FAILURE;
675 }
676 }
677
678 return QDF_STATUS_SUCCESS;
679 }
680
681 #ifdef WLAN_FEATURE_11BE_MLO
dp_peer_setup_ppeds_be(struct dp_soc * soc,struct dp_peer * peer,struct dp_vdev_be * be_vdev,void * args)682 QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc,
683 struct dp_peer *peer,
684 struct dp_vdev_be *be_vdev,
685 void *args)
686 {
687 struct dp_peer *mld_peer;
688 struct dp_soc *mld_soc;
689 struct dp_soc_be *be_soc;
690 struct cdp_soc_t *cdp_soc;
691 struct dp_peer_be *be_peer = dp_get_be_peer_from_dp_peer(peer);
692 struct cdp_ds_vp_params vp_params = {0};
693 struct dp_ppe_vp_profile *ppe_vp_profile = (struct dp_ppe_vp_profile *)args;
694 uint16_t src_info = ppe_vp_profile->vp_num;
695 uint8_t vdev_id = be_vdev->vdev.vdev_id;
696 QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
697
698 if (!be_peer) {
699 dp_err("BE peer is null");
700 return QDF_STATUS_E_NULL_VALUE;
701 }
702
703 if (IS_DP_LEGACY_PEER(peer)) {
704 qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
705 vdev_id, src_info);
706 } else if (IS_MLO_DP_MLD_PEER(peer)) {
707 int i;
708 struct dp_peer *link_peer = NULL;
709 struct dp_mld_link_peers link_peers_info;
710
711 /* get link peers with reference */
712 dp_get_link_peers_ref_from_mld_peer(soc, peer, &link_peers_info,
713 DP_MOD_ID_DS);
714
715 for (i = 0; i < link_peers_info.num_links; i++) {
716 link_peer = link_peers_info.link_peers[i];
717 be_peer = dp_get_be_peer_from_dp_peer(link_peer);
718 if (!be_peer) {
719 dp_err("BE peer is null");
720 continue;
721 }
722
723 be_vdev = dp_get_be_vdev_from_dp_vdev(link_peer->vdev);
724 if (!be_vdev) {
725 dp_err("BE vap is null for peer id %d ",
726 link_peer->peer_id);
727 continue;
728 }
729
730 vdev_id = be_vdev->vdev.vdev_id;
731 soc = link_peer->vdev->pdev->soc;
732 qdf_status = dp_peer_ppeds_default_route_be(soc,
733 be_peer,
734 vdev_id,
735 src_info);
736 }
737
738 dp_release_link_peers_ref(&link_peers_info, DP_MOD_ID_DS);
739 } else {
740 mld_peer = DP_GET_MLD_PEER_FROM_PEER(peer);
741
742 if (!mld_peer)
743 return qdf_status;
744
745 /*
746 * In case of MLO link peer,
747 * Fetch the VP profile from the mld vdev.
748 */
749 be_vdev = dp_get_be_vdev_from_dp_vdev(mld_peer->vdev);
750 if (!be_vdev) {
751 dp_err("BE vap is null");
752 return QDF_STATUS_E_NULL_VALUE;
753 }
754
755 /*
756 * Extract the VP profile from the vap
757 * in case of MLO peer, we have to get the profile from
758 * the MLD vdev's osif handle and not the link peer.
759 */
760 mld_soc = mld_peer->vdev->pdev->soc;
761 cdp_soc = &mld_soc->cdp_soc;
762 if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
763 dp_err("%pK: Register PPEDS profile info API before use", cdp_soc);
764 return QDF_STATUS_E_NULL_VALUE;
765 }
766
767 qdf_status = cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(mld_soc->ctrl_psoc,
768 mld_peer->vdev->vdev_id,
769 &vp_params);
770 if (qdf_status == QDF_STATUS_E_NULL_VALUE) {
771 dp_err("%pK: Failed to get ppeds profile for mld soc", mld_soc);
772 return qdf_status;
773 }
774
775 /*
776 * Check if PPE DS routing is enabled on
777 * the associated vap.
778 */
779 if (vp_params.ppe_vp_type != PPE_VP_USER_TYPE_DS)
780 return qdf_status;
781
782 be_soc = dp_get_be_soc_from_dp_soc(mld_soc);
783 ppe_vp_profile = &be_soc->ppe_vp_profile[vp_params.ppe_vp_profile_idx];
784 src_info = ppe_vp_profile->vp_num;
785
786 qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
787 vdev_id, src_info);
788 }
789
790 return qdf_status;
791 }
792 #else
dp_peer_setup_ppeds_be(struct dp_soc * soc,struct dp_peer * peer,struct dp_vdev_be * be_vdev void * args)793 static QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc,
794 struct dp_peer *peer,
795 struct dp_vdev_be *be_vdev
796 void *args)
797 {
798 struct dp_ppe_vp_profile *vp_profile = (struct dp_ppe_vp_profile *)args;
799 struct dp_peer_be *be_peer = dp_get_be_peer_from_dp_peer(peer);
800 QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
801
802 if (!be_peer) {
803 dp_err("BE peer is null");
804 return QDF_STATUS_E_NULL_VALUE;
805 }
806
807 qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
808 be_vdev->vdev.vdev_id,
809 vp_profile->vp_num);
810
811 return qdf_status;
812 }
813 #endif
814 #else
dp_ppeds_init_soc_be(struct dp_soc * soc)815 static QDF_STATUS dp_ppeds_init_soc_be(struct dp_soc *soc)
816 {
817 return QDF_STATUS_SUCCESS;
818 }
819
dp_ppeds_deinit_soc_be(struct dp_soc * soc)820 static QDF_STATUS dp_ppeds_deinit_soc_be(struct dp_soc *soc)
821 {
822 return QDF_STATUS_SUCCESS;
823 }
824
dp_soc_ppeds_attach_be(struct dp_soc * soc)825 static inline QDF_STATUS dp_soc_ppeds_attach_be(struct dp_soc *soc)
826 {
827 return QDF_STATUS_SUCCESS;
828 }
829
dp_soc_ppeds_detach_be(struct dp_soc * soc)830 static inline QDF_STATUS dp_soc_ppeds_detach_be(struct dp_soc *soc)
831 {
832 return QDF_STATUS_SUCCESS;
833 }
834
dp_peer_setup_ppeds_be(struct dp_soc * soc,struct dp_peer * peer,struct dp_vdev_be * be_vdev,void * args)835 QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc, struct dp_peer *peer,
836 struct dp_vdev_be *be_vdev,
837 void *args)
838 {
839 return QDF_STATUS_SUCCESS;
840 }
841
dp_ppeds_stop_soc_be(struct dp_soc * soc)842 static inline void dp_ppeds_stop_soc_be(struct dp_soc *soc)
843 {
844 }
845 #endif /* WLAN_SUPPORT_PPEDS */
846
dp_reo_shared_qaddr_detach(struct dp_soc * soc)847 void dp_reo_shared_qaddr_detach(struct dp_soc *soc)
848 {
849 qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
850 REO_QUEUE_REF_ML_TABLE_SIZE,
851 soc->reo_qref.mlo_reo_qref_table_vaddr,
852 soc->reo_qref.mlo_reo_qref_table_paddr, 0);
853 qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
854 REO_QUEUE_REF_NON_ML_TABLE_SIZE,
855 soc->reo_qref.non_mlo_reo_qref_table_vaddr,
856 soc->reo_qref.non_mlo_reo_qref_table_paddr, 0);
857 }
858
859 #ifdef QCA_SUPPORT_DP_GLOBAL_CTX
dp_soc_tx_cookie_detach_be(struct dp_soc * soc)860 static void dp_soc_tx_cookie_detach_be(struct dp_soc *soc)
861 {
862 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
863 int i = 0;
864 struct dp_global_context *dp_global;
865
866 dp_global = wlan_objmgr_get_global_ctx();
867
868 dp_global->tx_cookie_ctx_alloc_cnt--;
869 if (dp_global->tx_cookie_ctx_alloc_cnt == 0) {
870 for (i = 0; i < MAX_TXDESC_POOLS; i++) {
871 dp_hw_cookie_conversion_detach(be_soc,
872 dp_global->tx_cc_ctx[i]);
873 qdf_mem_free(dp_global->tx_cc_ctx[i]);
874 }
875 }
876
877 dp_global->spcl_tx_cookie_ctx_alloc_cnt--;
878 if (dp_global->spcl_tx_cookie_ctx_alloc_cnt == 0) {
879 for (i = 0; i < MAX_TXDESC_POOLS; i++) {
880 dp_hw_cookie_conversion_detach(
881 be_soc,
882 dp_global->spcl_tx_cc_ctx[i]);
883 qdf_mem_free(dp_global->spcl_tx_cc_ctx[i]);
884 }
885 }
886 }
887
dp_soc_tx_cookie_attach_be(struct dp_soc * soc)888 static QDF_STATUS dp_soc_tx_cookie_attach_be(struct dp_soc *soc)
889 {
890 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
891 struct dp_hw_cookie_conversion_t *cc_ctx;
892 struct dp_global_context *dp_global;
893 struct dp_hw_cookie_conversion_t *spcl_cc_ctx;
894 uint32_t num_entries;
895 int i = 0;
896 QDF_STATUS qdf_status;
897
898 dp_global = wlan_objmgr_get_global_ctx();
899 if (dp_global->tx_cookie_ctx_alloc_cnt == 0) {
900 for (i = 0; i < MAX_TXDESC_POOLS; i++) {
901 dp_global->tx_cc_ctx[i] =
902 qdf_mem_malloc(
903 sizeof(struct dp_hw_cookie_conversion_t));
904 cc_ctx = dp_global->tx_cc_ctx[i];
905 num_entries =
906 wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
907 qdf_status =
908 dp_hw_cookie_conversion_attach(
909 be_soc,
910 cc_ctx,
911 num_entries,
912 QDF_DP_TX_DESC_TYPE, i);
913 if (!QDF_IS_STATUS_SUCCESS(qdf_status))
914 return QDF_STATUS_E_FAILURE;
915 }
916 }
917 dp_global->tx_cookie_ctx_alloc_cnt++;
918
919 if (dp_global->spcl_tx_cookie_ctx_alloc_cnt == 0) {
920 for (i = 0; i < MAX_TXDESC_POOLS; i++) {
921 dp_global->spcl_tx_cc_ctx[i] =
922 qdf_mem_malloc(
923 sizeof(struct dp_hw_cookie_conversion_t));
924 spcl_cc_ctx = dp_global->spcl_tx_cc_ctx[i];
925 num_entries =
926 wlan_cfg_get_num_tx_spl_desc(soc->wlan_cfg_ctx);
927 qdf_status =
928 dp_hw_cookie_conversion_attach(
929 be_soc,
930 spcl_cc_ctx,
931 num_entries,
932 QDF_DP_TX_SPCL_DESC_TYPE, i);
933 if (!QDF_IS_STATUS_SUCCESS(qdf_status))
934 return QDF_STATUS_E_FAILURE;
935 }
936 }
937 dp_global->spcl_tx_cookie_ctx_alloc_cnt++;
938 return QDF_STATUS_SUCCESS;
939 }
940
dp_soc_tx_cookie_deinit_be(struct dp_soc * soc)941 static void dp_soc_tx_cookie_deinit_be(struct dp_soc *soc)
942 {
943 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
944 struct dp_global_context *dp_global;
945 int i = 0;
946
947 dp_global = wlan_objmgr_get_global_ctx();
948
949 for (i = 0; i < MAX_TXDESC_POOLS; i++)
950 dp_hw_cookie_conversion_deinit(
951 be_soc,
952 dp_global->tx_cc_ctx[i]);
953 for (i = 0; i < MAX_TXDESC_POOLS; i++)
954 dp_hw_cookie_conversion_deinit(be_soc,
955 dp_global->spcl_tx_cc_ctx[i]);
956 }
957
dp_soc_tx_cookie_init_be(struct dp_soc * soc)958 static QDF_STATUS dp_soc_tx_cookie_init_be(struct dp_soc *soc)
959 {
960 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
961 struct dp_global_context *dp_global;
962 struct dp_hw_cookie_conversion_t *cc_ctx;
963 struct dp_hw_cookie_conversion_t *spcl_cc_ctx;
964 QDF_STATUS qdf_status;
965 int i = 0;
966
967 dp_global = wlan_objmgr_get_global_ctx();
968 for (i = 0; i < MAX_TXDESC_POOLS; i++) {
969 cc_ctx = dp_global->tx_cc_ctx[i];
970 qdf_status =
971 dp_hw_cookie_conversion_init(be_soc,
972 cc_ctx);
973 if (!QDF_IS_STATUS_SUCCESS(qdf_status))
974 return QDF_STATUS_E_FAILURE;
975 }
976 for (i = 0; i < MAX_TXDESC_POOLS; i++) {
977 spcl_cc_ctx = dp_global->spcl_tx_cc_ctx[i];
978 qdf_status =
979 dp_hw_cookie_conversion_init(be_soc,
980 spcl_cc_ctx);
981 if (!QDF_IS_STATUS_SUCCESS(qdf_status))
982 return QDF_STATUS_E_FAILURE;
983 }
984 return QDF_STATUS_SUCCESS;
985 }
986 #else
dp_soc_tx_cookie_detach_be(struct dp_soc * soc)987 static void dp_soc_tx_cookie_detach_be(struct dp_soc *soc)
988 {
989 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
990 int i = 0;
991
992 for (i = 0; i < MAX_TXDESC_POOLS; i++) {
993 dp_hw_cookie_conversion_detach(
994 be_soc,
995 &be_soc->tx_cc_ctx[i]);
996 }
997 }
998
dp_soc_tx_cookie_attach_be(struct dp_soc * soc)999 static QDF_STATUS dp_soc_tx_cookie_attach_be(struct dp_soc *soc)
1000 {
1001 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
1002 uint32_t num_entries;
1003 int i = 0;
1004 QDF_STATUS qdf_status;
1005
1006 for (i = 0; i < MAX_TXDESC_POOLS; i++) {
1007 num_entries = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
1008 qdf_status =
1009 dp_hw_cookie_conversion_attach(
1010 be_soc,
1011 &be_soc->tx_cc_ctx[i],
1012 num_entries,
1013 QDF_DP_TX_DESC_TYPE, i);
1014 if (!QDF_IS_STATUS_SUCCESS(qdf_status))
1015 return QDF_STATUS_E_FAILURE;
1016 }
1017 return QDF_STATUS_SUCCESS;
1018 }
1019
dp_soc_tx_cookie_deinit_be(struct dp_soc * soc)1020 static void dp_soc_tx_cookie_deinit_be(struct dp_soc *soc)
1021 {
1022 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
1023 int i = 0;
1024
1025 for (i = 0; i < MAX_TXDESC_POOLS; i++)
1026 dp_hw_cookie_conversion_deinit(
1027 be_soc,
1028 &be_soc->tx_cc_ctx[i]);
1029 }
1030
dp_soc_tx_cookie_init_be(struct dp_soc * soc)1031 static QDF_STATUS dp_soc_tx_cookie_init_be(struct dp_soc *soc)
1032 {
1033 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
1034 int i = 0;
1035 QDF_STATUS qdf_status;
1036
1037 for (i = 0; i < MAX_TXDESC_POOLS; i++) {
1038 qdf_status =
1039 dp_hw_cookie_conversion_init(
1040 be_soc,
1041 &be_soc->tx_cc_ctx[i]);
1042 if (!QDF_IS_STATUS_SUCCESS(qdf_status))
1043 return QDF_STATUS_E_FAILURE;
1044 }
1045 return QDF_STATUS_SUCCESS;
1046 }
1047 #endif
1048
dp_soc_detach_be(struct dp_soc * soc)1049 static QDF_STATUS dp_soc_detach_be(struct dp_soc *soc)
1050 {
1051 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
1052 dp_mlo_dev_obj_t mlo_dev_obj;
1053 int i = 0;
1054
1055 dp_soc_ppeds_detach_be(soc);
1056 dp_reo_shared_qaddr_detach(soc);
1057
1058 mlo_dev_obj = dp_get_mlo_dev_list_obj(be_soc);
1059 dp_mlo_dev_ctxt_list_detach_wrapper(mlo_dev_obj);
1060 dp_soc_tx_cookie_detach_be(soc);
1061
1062 for (i = 0; i < MAX_RXDESC_POOLS; i++)
1063 dp_hw_cookie_conversion_detach(be_soc,
1064 &be_soc->rx_cc_ctx[i]);
1065
1066 qdf_mem_free(be_soc->page_desc_base);
1067 be_soc->page_desc_base = NULL;
1068
1069 return QDF_STATUS_SUCCESS;
1070 }
1071
1072 #ifdef QCA_SUPPORT_DP_GLOBAL_CTX
dp_set_rx_fst_be(struct dp_rx_fst * fst)1073 static void dp_set_rx_fst_be(struct dp_rx_fst *fst)
1074 {
1075 struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
1076
1077 if (dp_global)
1078 dp_global->fst_ctx = fst;
1079 }
1080
dp_get_rx_fst_be(void)1081 static struct dp_rx_fst *dp_get_rx_fst_be(void)
1082 {
1083 struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
1084
1085 if (dp_global)
1086 return dp_global->fst_ctx;
1087
1088 return NULL;
1089 }
1090
dp_rx_fst_release_ref_be(void)1091 static uint32_t dp_rx_fst_release_ref_be(void)
1092 {
1093 struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
1094 uint32_t rx_fst_ref_cnt;
1095
1096 if (dp_global) {
1097 rx_fst_ref_cnt = qdf_atomic_read(&dp_global->rx_fst_ref_cnt);
1098 qdf_atomic_dec(&dp_global->rx_fst_ref_cnt);
1099 return rx_fst_ref_cnt;
1100 }
1101
1102 return 1;
1103 }
1104
dp_rx_fst_get_ref_be(void)1105 static void dp_rx_fst_get_ref_be(void)
1106 {
1107 struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
1108
1109 if (dp_global)
1110 qdf_atomic_inc(&dp_global->rx_fst_ref_cnt);
1111 }
1112
1113 #else
dp_set_rx_fst_be(struct dp_rx_fst * fst)1114 static void dp_set_rx_fst_be(struct dp_rx_fst *fst)
1115 {
1116 }
1117
dp_get_rx_fst_be(void)1118 static struct dp_rx_fst *dp_get_rx_fst_be(void)
1119 {
1120 return NULL;
1121 }
1122
dp_rx_fst_release_ref_be(void)1123 static uint32_t dp_rx_fst_release_ref_be(void)
1124 {
1125 return 1;
1126 }
1127
dp_rx_fst_get_ref_be(void)1128 static void dp_rx_fst_get_ref_be(void)
1129 {
1130 }
1131 #endif
1132
1133 #ifdef WLAN_MLO_MULTI_CHIP
1134 #ifdef WLAN_MCAST_MLO
1135 static inline void
dp_mlo_mcast_init(struct dp_soc * soc,struct dp_vdev * vdev)1136 dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
1137 {
1138 struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
1139
1140 be_vdev->mcast_primary = false;
1141
1142 hal_tx_mcast_mlo_reinject_routing_set(
1143 soc->hal_soc,
1144 HAL_TX_MCAST_MLO_REINJECT_TQM_NOTIFY);
1145
1146 if (vdev->opmode == wlan_op_mode_ap) {
1147 hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
1148 vdev->vdev_id,
1149 HAL_TX_MCAST_CTRL_FW_EXCEPTION);
1150 }
1151 }
1152
1153 static inline void
dp_mlo_mcast_deinit(struct dp_soc * soc,struct dp_vdev * vdev)1154 dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
1155 {
1156 struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
1157
1158 be_vdev->mcast_primary = false;
1159 vdev->mlo_vdev = 0;
1160 }
1161
1162 #else
1163 static inline void
dp_mlo_mcast_init(struct dp_soc * soc,struct dp_vdev * vdev)1164 dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
1165 {
1166 }
1167
1168 static inline void
dp_mlo_mcast_deinit(struct dp_soc * soc,struct dp_vdev * vdev)1169 dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
1170 {
1171 }
1172 #endif
1173
dp_get_rx_hash_key_be(struct dp_soc * soc,struct cdp_lro_hash_config * lro_hash)1174 static void dp_get_rx_hash_key_be(struct dp_soc *soc,
1175 struct cdp_lro_hash_config *lro_hash)
1176 {
1177 dp_mlo_get_rx_hash_key(soc, lro_hash);
1178 }
1179
1180 #ifdef WLAN_DP_MLO_DEV_CTX
1181 static inline void
dp_attach_vdev_list_in_mlo_dev_ctxt(struct dp_soc_be * be_soc,struct dp_vdev * vdev,struct dp_mlo_dev_ctxt * mlo_dev_ctxt)1182 dp_attach_vdev_list_in_mlo_dev_ctxt(struct dp_soc_be *be_soc,
1183 struct dp_vdev *vdev,
1184 struct dp_mlo_dev_ctxt *mlo_dev_ctxt)
1185 {
1186 uint8_t pdev_id = vdev->pdev->pdev_id;
1187
1188 qdf_spin_lock_bh(&mlo_dev_ctxt->vdev_list_lock);
1189 if (vdev->is_bridge_vdev) {
1190 if (mlo_dev_ctxt->bridge_vdev[be_soc->mlo_chip_id][pdev_id]
1191 != CDP_INVALID_VDEV_ID)
1192 dp_alert("bridge vdevId in MLO dev ctx is not Invalid"
1193 "chip_id: %u, pdev_id: %u,"
1194 "existing vdev_id: %u, new vdev_id : %u",
1195 be_soc->mlo_chip_id, pdev_id,
1196 mlo_dev_ctxt->bridge_vdev[be_soc->mlo_chip_id][pdev_id],
1197 vdev->vdev_id);
1198
1199 mlo_dev_ctxt->bridge_vdev[be_soc->mlo_chip_id][pdev_id] =
1200 vdev->vdev_id;
1201 mlo_dev_ctxt->is_bridge_vdev_present = 1;
1202 } else {
1203 if (mlo_dev_ctxt->vdev_list[be_soc->mlo_chip_id][pdev_id]
1204 != CDP_INVALID_VDEV_ID)
1205 dp_alert("vdevId in MLO dev ctx is not Invalid"
1206 "chip_id: %u, pdev_id: %u,"
1207 "existing vdev_id: %u, new vdev_id : %u",
1208 be_soc->mlo_chip_id, pdev_id,
1209 mlo_dev_ctxt->vdev_list[be_soc->mlo_chip_id][pdev_id],
1210 vdev->vdev_id);
1211
1212 mlo_dev_ctxt->vdev_list[be_soc->mlo_chip_id][pdev_id] =
1213 vdev->vdev_id;
1214 }
1215 mlo_dev_ctxt->vdev_count++;
1216 qdf_spin_unlock_bh(&mlo_dev_ctxt->vdev_list_lock);
1217 }
1218
1219 static inline QDF_STATUS
dp_detach_vdev_list_in_mlo_dev_ctxt(struct dp_soc_be * be_soc,struct dp_vdev * vdev,struct dp_mlo_dev_ctxt * mlo_dev_ctxt)1220 dp_detach_vdev_list_in_mlo_dev_ctxt(struct dp_soc_be *be_soc,
1221 struct dp_vdev *vdev,
1222 struct dp_mlo_dev_ctxt *mlo_dev_ctxt)
1223 {
1224 uint8_t pdev_id = vdev->pdev->pdev_id;
1225
1226 if (mlo_dev_ctxt->vdev_list[be_soc->mlo_chip_id][pdev_id] ==
1227 CDP_INVALID_VDEV_ID) {
1228 return QDF_STATUS_E_INVAL;
1229 }
1230
1231 qdf_spin_lock_bh(&mlo_dev_ctxt->vdev_list_lock);
1232 if (vdev->is_bridge_vdev) {
1233 mlo_dev_ctxt->bridge_vdev[be_soc->mlo_chip_id][pdev_id] =
1234 CDP_INVALID_VDEV_ID;
1235 } else {
1236 mlo_dev_ctxt->vdev_list[be_soc->mlo_chip_id][pdev_id] =
1237 CDP_INVALID_VDEV_ID;
1238 }
1239 mlo_dev_ctxt->vdev_count--;
1240 qdf_spin_unlock_bh(&mlo_dev_ctxt->vdev_list_lock);
1241
1242 return QDF_STATUS_SUCCESS;
1243 }
1244 #endif /* WLAN_DP_MLO_DEV_CTX */
1245 #else
1246 static inline void
dp_mlo_mcast_init(struct dp_soc * soc,struct dp_vdev * vdev)1247 dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
1248 {
1249 }
1250
1251 static inline void
dp_mlo_mcast_deinit(struct dp_soc * soc,struct dp_vdev * vdev)1252 dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
1253 {
1254 }
1255
dp_get_rx_hash_key_be(struct dp_soc * soc,struct cdp_lro_hash_config * lro_hash)1256 static void dp_get_rx_hash_key_be(struct dp_soc *soc,
1257 struct cdp_lro_hash_config *lro_hash)
1258 {
1259 dp_get_rx_hash_key_bytes(lro_hash);
1260 }
1261
1262 #ifdef WLAN_DP_MLO_DEV_CTX
1263 static inline void
dp_attach_vdev_list_in_mlo_dev_ctxt(struct dp_soc_be * be_soc,struct dp_vdev * vdev,struct dp_mlo_dev_ctxt * mlo_dev_ctxt)1264 dp_attach_vdev_list_in_mlo_dev_ctxt(struct dp_soc_be *be_soc,
1265 struct dp_vdev *vdev,
1266 struct dp_mlo_dev_ctxt *mlo_dev_ctxt)
1267 {
1268 }
1269
1270 static inline QDF_STATUS
dp_detach_vdev_list_in_mlo_dev_ctxt(struct dp_soc_be * be_soc,struct dp_vdev * vdev,struct dp_mlo_dev_ctxt * mlo_dev_ctxt)1271 dp_detach_vdev_list_in_mlo_dev_ctxt(struct dp_soc_be *be_soc,
1272 struct dp_vdev *vdev,
1273 struct dp_mlo_dev_ctxt *mlo_dev_ctxt)
1274 {
1275 }
1276 #endif /* WLAN_DP_MLO_DEV_CTX */
1277 #endif
1278
dp_soc_attach_be(struct dp_soc * soc,struct cdp_soc_attach_params * params)1279 static QDF_STATUS dp_soc_attach_be(struct dp_soc *soc,
1280 struct cdp_soc_attach_params *params)
1281 {
1282 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
1283 QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
1284 uint32_t max_tx_rx_desc_num, num_spt_pages;
1285 uint32_t num_entries;
1286 int i = 0;
1287 dp_mlo_dev_obj_t mlo_dev_obj;
1288
1289 mlo_dev_obj = dp_get_mlo_dev_list_obj(be_soc);
1290 max_tx_rx_desc_num = WLAN_CFG_NUM_TX_DESC_MAX * MAX_TXDESC_POOLS +
1291 WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX * MAX_RXDESC_POOLS +
1292 WLAN_CFG_NUM_PPEDS_TX_DESC_MAX * MAX_PPE_TXDESC_POOLS;
1293 /* estimate how many SPT DDR pages needed */
1294 num_spt_pages = max_tx_rx_desc_num / DP_CC_SPT_PAGE_MAX_ENTRIES;
1295 num_spt_pages = num_spt_pages <= DP_CC_PPT_MAX_ENTRIES ?
1296 num_spt_pages : DP_CC_PPT_MAX_ENTRIES;
1297
1298 be_soc->page_desc_base = qdf_mem_malloc(
1299 DP_CC_PPT_MAX_ENTRIES * sizeof(struct dp_spt_page_desc));
1300 if (!be_soc->page_desc_base) {
1301 dp_err("spt page descs allocation failed");
1302 return QDF_STATUS_E_NOMEM;
1303 }
1304
1305 soc->wbm_sw0_bm_id = hal_tx_get_wbm_sw0_bm_id();
1306
1307 qdf_status = dp_get_cmem_allocation(soc, COOKIE_CONVERSION);
1308 if (!QDF_IS_STATUS_SUCCESS(qdf_status))
1309 goto fail;
1310
1311 dp_soc_mlo_fill_params(soc, params);
1312
1313 /* Initialize common cdp mlo ops */
1314 dp_soc_initialize_cdp_cmn_mlo_ops(soc);
1315
1316 /* Initialize MLO device ctxt list */
1317 dp_mlo_dev_ctxt_list_attach_wrapper(mlo_dev_obj);
1318
1319 qdf_status = dp_soc_ppeds_attach_be(soc);
1320 if (!QDF_IS_STATUS_SUCCESS(qdf_status))
1321 goto fail;
1322
1323 qdf_status = dp_soc_tx_cookie_attach_be(soc);
1324 if (!QDF_IS_STATUS_SUCCESS(qdf_status))
1325 goto fail;
1326
1327 for (i = 0; i < MAX_RXDESC_POOLS; i++) {
1328 num_entries =
1329 wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
1330 qdf_status =
1331 dp_hw_cookie_conversion_attach(be_soc,
1332 &be_soc->rx_cc_ctx[i],
1333 num_entries,
1334 QDF_DP_RX_DESC_BUF_TYPE,
1335 i);
1336 if (!QDF_IS_STATUS_SUCCESS(qdf_status))
1337 goto fail;
1338 }
1339
1340 return qdf_status;
1341 fail:
1342 dp_soc_detach_be(soc);
1343 return qdf_status;
1344 }
1345
dp_soc_deinit_be(struct dp_soc * soc)1346 static QDF_STATUS dp_soc_deinit_be(struct dp_soc *soc)
1347 {
1348 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
1349 int i = 0;
1350
1351 qdf_atomic_set(&soc->cmn_init_done, 0);
1352
1353 dp_ppeds_stop_soc_be(soc);
1354
1355 dp_tx_deinit_bank_profiles(be_soc);
1356 dp_soc_tx_cookie_deinit_be(soc);
1357
1358 for (i = 0; i < MAX_RXDESC_POOLS; i++)
1359 dp_hw_cookie_conversion_deinit(be_soc,
1360 &be_soc->rx_cc_ctx[i]);
1361
1362 dp_ppeds_deinit_soc_be(soc);
1363
1364 return QDF_STATUS_SUCCESS;
1365 }
1366
dp_soc_deinit_be_wrapper(struct dp_soc * soc)1367 static QDF_STATUS dp_soc_deinit_be_wrapper(struct dp_soc *soc)
1368 {
1369 QDF_STATUS qdf_status;
1370
1371 qdf_status = dp_soc_deinit_be(soc);
1372 if (QDF_IS_STATUS_ERROR(qdf_status))
1373 return qdf_status;
1374
1375 dp_soc_deinit(soc);
1376
1377 return QDF_STATUS_SUCCESS;
1378 }
1379
dp_soc_init_be(struct dp_soc * soc,HTC_HANDLE htc_handle,struct hif_opaque_softc * hif_handle)1380 static void *dp_soc_init_be(struct dp_soc *soc, HTC_HANDLE htc_handle,
1381 struct hif_opaque_softc *hif_handle)
1382 {
1383 QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
1384 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
1385 int i = 0;
1386 void *ret_addr;
1387
1388 wlan_minidump_log(soc, sizeof(*soc), soc->ctrl_psoc,
1389 WLAN_MD_DP_SOC, "dp_soc");
1390
1391 soc->hif_handle = hif_handle;
1392
1393 soc->hal_soc = hif_get_hal_handle(soc->hif_handle);
1394 if (!soc->hal_soc)
1395 return NULL;
1396
1397 dp_ppeds_init_soc_be(soc);
1398
1399 qdf_status = dp_soc_tx_cookie_init_be(soc);
1400 if (!QDF_IS_STATUS_SUCCESS(qdf_status))
1401 goto fail;
1402
1403 for (i = 0; i < MAX_RXDESC_POOLS; i++) {
1404 qdf_status =
1405 dp_hw_cookie_conversion_init(be_soc,
1406 &be_soc->rx_cc_ctx[i]);
1407 if (!QDF_IS_STATUS_SUCCESS(qdf_status))
1408 goto fail;
1409 }
1410
1411 /* route vdev_id mismatch notification via FW completion */
1412 hal_tx_vdev_mismatch_routing_set(soc->hal_soc,
1413 HAL_TX_VDEV_MISMATCH_FW_NOTIFY);
1414
1415 qdf_status = dp_tx_init_bank_profiles(be_soc);
1416 if (!QDF_IS_STATUS_SUCCESS(qdf_status))
1417 goto fail;
1418
1419 /* write WBM/REO cookie conversion CFG register */
1420 dp_cc_reg_cfg_init(soc, true);
1421
1422 ret_addr = dp_soc_init(soc, htc_handle, hif_handle);
1423 if (!ret_addr)
1424 goto fail;
1425
1426 return ret_addr;
1427 fail:
1428 dp_soc_deinit_be(soc);
1429 return NULL;
1430 }
1431
dp_pdev_attach_be(struct dp_pdev * pdev,struct cdp_pdev_attach_params * params)1432 static QDF_STATUS dp_pdev_attach_be(struct dp_pdev *pdev,
1433 struct cdp_pdev_attach_params *params)
1434 {
1435 dp_pdev_mlo_fill_params(pdev, params);
1436
1437 return QDF_STATUS_SUCCESS;
1438 }
1439
dp_pdev_detach_be(struct dp_pdev * pdev)1440 static QDF_STATUS dp_pdev_detach_be(struct dp_pdev *pdev)
1441 {
1442 dp_mlo_update_link_to_pdev_unmap(pdev->soc, pdev);
1443
1444 return QDF_STATUS_SUCCESS;
1445 }
1446
1447 #ifdef INTRA_BSS_FWD_OFFLOAD
1448 static
dp_vdev_set_intra_bss(struct dp_soc * soc,uint16_t vdev_id,bool enable)1449 void dp_vdev_set_intra_bss(struct dp_soc *soc, uint16_t vdev_id, bool enable)
1450 {
1451 soc->cdp_soc.ol_ops->vdev_set_intra_bss(soc->ctrl_psoc, vdev_id,
1452 enable);
1453 }
1454 #else
1455 static
dp_vdev_set_intra_bss(struct dp_soc * soc,uint16_t vdev_id,bool enable)1456 void dp_vdev_set_intra_bss(struct dp_soc *soc, uint16_t vdev_id, bool enable)
1457 {
1458 }
1459 #endif
1460
dp_vdev_attach_be(struct dp_soc * soc,struct dp_vdev * vdev)1461 static QDF_STATUS dp_vdev_attach_be(struct dp_soc *soc, struct dp_vdev *vdev)
1462 {
1463 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
1464 struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
1465 struct dp_pdev *pdev = vdev->pdev;
1466
1467 if (vdev->opmode == wlan_op_mode_monitor)
1468 return QDF_STATUS_SUCCESS;
1469
1470 be_vdev->vdev_id_check_en = DP_TX_VDEV_ID_CHECK_ENABLE;
1471
1472 be_vdev->bank_id = dp_tx_get_bank_profile(be_soc, be_vdev);
1473 vdev->bank_id = be_vdev->bank_id;
1474
1475 if (be_vdev->bank_id == DP_BE_INVALID_BANK_ID) {
1476 QDF_BUG(0);
1477 return QDF_STATUS_E_FAULT;
1478 }
1479
1480 if (vdev->opmode == wlan_op_mode_sta) {
1481 if (soc->cdp_soc.ol_ops->set_mec_timer)
1482 soc->cdp_soc.ol_ops->set_mec_timer(
1483 soc->ctrl_psoc,
1484 vdev->vdev_id,
1485 DP_AST_AGING_TIMER_DEFAULT_MS);
1486
1487 if (pdev->isolation)
1488 hal_tx_vdev_mcast_ctrl_set(soc->hal_soc, vdev->vdev_id,
1489 HAL_TX_MCAST_CTRL_FW_EXCEPTION);
1490 else
1491 hal_tx_vdev_mcast_ctrl_set(soc->hal_soc, vdev->vdev_id,
1492 HAL_TX_MCAST_CTRL_MEC_NOTIFY);
1493 } else if (vdev->ap_bridge_enabled) {
1494 dp_vdev_set_intra_bss(soc, vdev->vdev_id, true);
1495 }
1496
1497 dp_mlo_mcast_init(soc, vdev);
1498
1499 return QDF_STATUS_SUCCESS;
1500 }
1501
dp_vdev_detach_be(struct dp_soc * soc,struct dp_vdev * vdev)1502 static QDF_STATUS dp_vdev_detach_be(struct dp_soc *soc, struct dp_vdev *vdev)
1503 {
1504 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
1505 struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
1506
1507 if (vdev->opmode == wlan_op_mode_monitor)
1508 return QDF_STATUS_SUCCESS;
1509
1510 if (vdev->opmode == wlan_op_mode_ap)
1511 dp_mlo_mcast_deinit(soc, vdev);
1512
1513 dp_tx_put_bank_profile(be_soc, be_vdev);
1514
1515 return QDF_STATUS_SUCCESS;
1516 }
1517
1518 #ifdef WLAN_SUPPORT_PPEDS
dp_soc_txrx_peer_setup_be(struct dp_soc * soc,uint8_t vdev_id,uint8_t * peer_mac)1519 static void dp_soc_txrx_peer_setup_be(struct dp_soc *soc, uint8_t vdev_id,
1520 uint8_t *peer_mac)
1521 {
1522 struct dp_vdev_be *be_vdev;
1523 QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
1524 struct dp_soc_be *be_soc;
1525 struct cdp_ds_vp_params vp_params = {0};
1526 struct cdp_soc_t *cdp_soc;
1527 enum wlan_op_mode vdev_opmode;
1528 struct dp_peer *peer;
1529 struct dp_peer *tgt_peer = NULL;
1530 struct dp_soc *tgt_soc = NULL;
1531
1532 peer = dp_peer_find_hash_find(soc, peer_mac, 0, vdev_id, DP_MOD_ID_CDP);
1533 if (!peer)
1534 return;
1535 vdev_opmode = peer->vdev->opmode;
1536
1537 if (vdev_opmode != wlan_op_mode_ap &&
1538 vdev_opmode != wlan_op_mode_sta) {
1539 dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
1540 return;
1541 }
1542
1543 tgt_peer = dp_get_tgt_peer_from_peer(peer);
1544 tgt_soc = tgt_peer->vdev->pdev->soc;
1545 be_soc = dp_get_be_soc_from_dp_soc(tgt_soc);
1546 cdp_soc = &tgt_soc->cdp_soc;
1547
1548 be_vdev = dp_get_be_vdev_from_dp_vdev(tgt_peer->vdev);
1549 if (!be_vdev) {
1550 qdf_err("BE vap is null");
1551 qdf_status = QDF_STATUS_E_NULL_VALUE;
1552 goto fail;
1553 }
1554
1555 /*
1556 * Extract the VP profile from the VAP
1557 */
1558 if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
1559 dp_err("%pK: Register get ppeds profile info first", cdp_soc);
1560 qdf_status = QDF_STATUS_E_NULL_VALUE;
1561 goto fail;
1562 }
1563
1564 /*
1565 * Check if PPE DS routing is enabled on the associated vap.
1566 */
1567 qdf_status =
1568 cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(tgt_soc->ctrl_psoc,
1569 tgt_peer->vdev->vdev_id,
1570 &vp_params);
1571 if (qdf_status == QDF_STATUS_E_NULL_VALUE) {
1572 dp_err("%pK: Could not find ppeds profile info vdev", be_vdev);
1573 qdf_status = QDF_STATUS_E_NULL_VALUE;
1574 goto fail;
1575 }
1576
1577 if (vp_params.ppe_vp_type == PPE_VP_USER_TYPE_DS) {
1578 qdf_status = dp_peer_setup_ppeds_be(tgt_soc, tgt_peer, be_vdev,
1579 (void *)&be_soc->ppe_vp_profile[vp_params.ppe_vp_profile_idx]);
1580 }
1581
1582 fail:
1583 dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
1584 if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
1585 dp_err("Unable to do ppeds peer setup");
1586 qdf_assert_always(0);
1587 }
1588 }
1589
1590 static inline
dp_tx_update_vp_profile(struct dp_soc_be * soc,struct dp_vdev_be * vdev)1591 void dp_tx_update_vp_profile(struct dp_soc_be *soc,
1592 struct dp_vdev_be *vdev)
1593 {
1594 dp_tx_ppeds_vp_profile_update(soc, vdev);
1595 }
1596 #else
1597 static inline
dp_soc_txrx_peer_setup_be(struct dp_soc * soc,uint8_t vdev_id,uint8_t * peer_mac)1598 void dp_soc_txrx_peer_setup_be(struct dp_soc *soc, uint8_t vdev_id,
1599 uint8_t *peer_mac)
1600 {
1601 }
1602
1603 static inline
dp_tx_update_vp_profile(struct dp_soc_be * soc,struct dp_vdev_be * vdev)1604 void dp_tx_update_vp_profile(struct dp_soc_be *soc,
1605 struct dp_vdev_be *vdev)
1606 {
1607 }
1608 #endif
1609
dp_peer_setup_be(struct cdp_soc_t * soc_hdl,uint8_t vdev_id,uint8_t * peer_mac,struct cdp_peer_setup_info * setup_info)1610 static QDF_STATUS dp_peer_setup_be(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
1611 uint8_t *peer_mac,
1612 struct cdp_peer_setup_info *setup_info)
1613 {
1614 struct dp_soc *soc = (struct dp_soc *)soc_hdl;
1615 QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
1616
1617 qdf_status = dp_peer_setup_wifi3(soc_hdl, vdev_id, peer_mac,
1618 setup_info);
1619 if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
1620 dp_err("Unable to dp peer setup");
1621 return qdf_status;
1622 }
1623
1624 dp_soc_txrx_peer_setup_be(soc, vdev_id, peer_mac);
1625
1626 return QDF_STATUS_SUCCESS;
1627 }
1628
dp_get_soc_context_size_be(void)1629 qdf_size_t dp_get_soc_context_size_be(void)
1630 {
1631 return sizeof(struct dp_soc_be);
1632 }
1633
1634 #ifdef CONFIG_WORD_BASED_TLV
1635 /**
1636 * dp_rxdma_ring_wmask_cfg_be() - Setup RXDMA ring word mask config
1637 * @soc: Common DP soc handle
1638 * @htt_tlv_filter: Rx SRNG TLV and filter setting
1639 *
1640 * Return: none
1641 */
1642 static inline void
dp_rxdma_ring_wmask_cfg_be(struct dp_soc * soc,struct htt_rx_ring_tlv_filter * htt_tlv_filter)1643 dp_rxdma_ring_wmask_cfg_be(struct dp_soc *soc,
1644 struct htt_rx_ring_tlv_filter *htt_tlv_filter)
1645 {
1646 htt_tlv_filter->rx_msdu_end_wmask =
1647 hal_rx_msdu_end_wmask_get(soc->hal_soc);
1648 htt_tlv_filter->rx_mpdu_start_wmask =
1649 hal_rx_mpdu_start_wmask_get(soc->hal_soc);
1650 }
1651 #else
1652 static inline void
dp_rxdma_ring_wmask_cfg_be(struct dp_soc * soc,struct htt_rx_ring_tlv_filter * htt_tlv_filter)1653 dp_rxdma_ring_wmask_cfg_be(struct dp_soc *soc,
1654 struct htt_rx_ring_tlv_filter *htt_tlv_filter)
1655 {
1656 }
1657 #endif
1658 #ifdef WLAN_SUPPORT_PPEDS
1659 static
dp_free_ppeds_interrupts(struct dp_soc * soc,struct dp_srng * srng,int ring_type,int ring_num)1660 void dp_free_ppeds_interrupts(struct dp_soc *soc, struct dp_srng *srng,
1661 int ring_type, int ring_num)
1662 {
1663 if (srng->irq >= 0) {
1664 qdf_dev_clear_irq_status_flags(srng->irq, IRQ_DISABLE_UNLAZY);
1665 if (ring_type == WBM2SW_RELEASE &&
1666 ring_num == WBM2_SW_PPE_REL_RING_ID)
1667 pld_pfrm_free_irq(soc->osdev->dev, srng->irq, soc);
1668 else if (ring_type == REO2PPE || ring_type == PPE2TCL)
1669 pld_pfrm_free_irq(soc->osdev->dev, srng->irq,
1670 dp_get_ppe_ds_ctxt(soc));
1671 }
1672 }
1673
1674 static
dp_register_ppeds_interrupts(struct dp_soc * soc,struct dp_srng * srng,int vector,int ring_type,int ring_num)1675 int dp_register_ppeds_interrupts(struct dp_soc *soc, struct dp_srng *srng,
1676 int vector, int ring_type, int ring_num)
1677 {
1678 int irq = -1, ret = 0;
1679 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
1680 int pci_slot = pld_get_pci_slot(soc->osdev->dev);
1681
1682 srng->irq = -1;
1683 irq = pld_get_msi_irq(soc->osdev->dev, vector);
1684 qdf_dev_set_irq_status_flags(irq, IRQ_DISABLE_UNLAZY);
1685
1686 if (ring_type == WBM2SW_RELEASE &&
1687 ring_num == WBM2_SW_PPE_REL_RING_ID) {
1688 snprintf(be_soc->irq_name[2], DP_PPE_INTR_STRNG_LEN,
1689 "pci%d_ppe_wbm_rel", pci_slot);
1690
1691 ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
1692 dp_ppeds_handle_tx_comp,
1693 IRQF_SHARED | IRQF_NO_SUSPEND,
1694 be_soc->irq_name[2], (void *)soc);
1695
1696 if (ret)
1697 goto fail;
1698 } else if (ring_type == REO2PPE && be_soc->ppeds_int_mode_enabled) {
1699 snprintf(be_soc->irq_name[0], DP_PPE_INTR_STRNG_LEN,
1700 "pci%d_reo2ppe", pci_slot);
1701 ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
1702 dp_ppe_ds_reo2ppe_irq_handler,
1703 IRQF_SHARED | IRQF_NO_SUSPEND,
1704 be_soc->irq_name[0],
1705 dp_get_ppe_ds_ctxt(soc));
1706
1707 if (ret)
1708 goto fail;
1709 } else if (ring_type == PPE2TCL && be_soc->ppeds_int_mode_enabled) {
1710 snprintf(be_soc->irq_name[1], DP_PPE_INTR_STRNG_LEN,
1711 "pci%d_ppe2tcl", pci_slot);
1712 ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
1713 dp_ppe_ds_ppe2tcl_irq_handler,
1714 IRQF_NO_SUSPEND,
1715 be_soc->irq_name[1],
1716 dp_get_ppe_ds_ctxt(soc));
1717 if (ret)
1718 goto fail;
1719
1720 pld_pfrm_disable_irq_nosync(soc->osdev->dev, irq);
1721 } else {
1722 return 0;
1723 }
1724
1725 srng->irq = irq;
1726
1727 dp_info("Registered irq %d for soc %pK ring type %d",
1728 irq, soc, ring_type);
1729
1730 return 0;
1731 fail:
1732 dp_err("Unable to config irq : ring type %d irq %d vector %d",
1733 ring_type, irq, vector);
1734 qdf_dev_clear_irq_status_flags(irq, IRQ_DISABLE_UNLAZY);
1735
1736 return ret;
1737 }
1738
dp_ppeds_disable_irq(struct dp_soc * soc,struct dp_srng * srng)1739 void dp_ppeds_disable_irq(struct dp_soc *soc, struct dp_srng *srng)
1740 {
1741 if (srng->irq >= 0)
1742 pld_pfrm_disable_irq_nosync(soc->osdev->dev, srng->irq);
1743 }
1744
dp_ppeds_enable_irq(struct dp_soc * soc,struct dp_srng * srng)1745 void dp_ppeds_enable_irq(struct dp_soc *soc, struct dp_srng *srng)
1746 {
1747 if (srng->irq >= 0)
1748 pld_pfrm_enable_irq(soc->osdev->dev, srng->irq);
1749 }
1750 #endif
1751
1752 #ifdef NO_RX_PKT_HDR_TLV
1753 /**
1754 * dp_rxdma_ring_sel_cfg_be() - Setup RXDMA ring config
1755 * @soc: Common DP soc handle
1756 *
1757 * Return: QDF_STATUS
1758 */
1759 static QDF_STATUS
dp_rxdma_ring_sel_cfg_be(struct dp_soc * soc)1760 dp_rxdma_ring_sel_cfg_be(struct dp_soc *soc)
1761 {
1762 int i;
1763 int mac_id;
1764 struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
1765 struct dp_srng *rx_mac_srng;
1766 QDF_STATUS status = QDF_STATUS_SUCCESS;
1767 uint16_t buf_size;
1768
1769 buf_size = wlan_cfg_rx_buffer_size(soc->wlan_cfg_ctx);
1770
1771 /*
1772 * In Beryllium chipset msdu_start, mpdu_end
1773 * and rx_attn are part of msdu_end/mpdu_start
1774 */
1775 htt_tlv_filter.msdu_start = 0;
1776 htt_tlv_filter.mpdu_end = 0;
1777 htt_tlv_filter.attention = 0;
1778 htt_tlv_filter.mpdu_start = 1;
1779 htt_tlv_filter.msdu_end = 1;
1780 htt_tlv_filter.packet = 1;
1781 htt_tlv_filter.packet_header = 0;
1782
1783 htt_tlv_filter.ppdu_start = 0;
1784 htt_tlv_filter.ppdu_end = 0;
1785 htt_tlv_filter.ppdu_end_user_stats = 0;
1786 htt_tlv_filter.ppdu_end_user_stats_ext = 0;
1787 htt_tlv_filter.ppdu_end_status_done = 0;
1788 htt_tlv_filter.enable_fp = 1;
1789 htt_tlv_filter.enable_md = 0;
1790 htt_tlv_filter.enable_md = 0;
1791 htt_tlv_filter.enable_mo = 0;
1792
1793 htt_tlv_filter.fp_mgmt_filter = 0;
1794 htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
1795 htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
1796 FILTER_DATA_DATA);
1797 htt_tlv_filter.fp_data_filter |=
1798 hal_rx_en_mcast_fp_data_filter(soc->hal_soc) ?
1799 FILTER_DATA_MCAST : 0;
1800 htt_tlv_filter.mo_mgmt_filter = 0;
1801 htt_tlv_filter.mo_ctrl_filter = 0;
1802 htt_tlv_filter.mo_data_filter = 0;
1803 htt_tlv_filter.md_data_filter = 0;
1804
1805 htt_tlv_filter.offset_valid = true;
1806
1807 /* Not subscribing to mpdu_end, msdu_start and rx_attn */
1808 htt_tlv_filter.rx_mpdu_end_offset = 0;
1809 htt_tlv_filter.rx_msdu_start_offset = 0;
1810 htt_tlv_filter.rx_attn_offset = 0;
1811
1812 /*
1813 * For monitor mode, the packet hdr tlv is enabled later during
1814 * filter update
1815 */
1816 if (soc->cdp_soc.ol_ops->get_con_mode &&
1817 soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_MONITOR_MODE)
1818 htt_tlv_filter.rx_packet_offset = soc->rx_mon_pkt_tlv_size;
1819 else
1820 htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size;
1821
1822 /*Not subscribing rx_pkt_header*/
1823 htt_tlv_filter.rx_header_offset = 0;
1824 htt_tlv_filter.rx_mpdu_start_offset =
1825 hal_rx_mpdu_start_offset_get(soc->hal_soc);
1826 htt_tlv_filter.rx_msdu_end_offset =
1827 hal_rx_msdu_end_offset_get(soc->hal_soc);
1828
1829 dp_rxdma_ring_wmask_cfg_be(soc, &htt_tlv_filter);
1830
1831 for (i = 0; i < MAX_PDEV_CNT; i++) {
1832 struct dp_pdev *pdev = soc->pdev_list[i];
1833
1834 if (!pdev)
1835 continue;
1836
1837 for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
1838 int mac_for_pdev =
1839 dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
1840 /*
1841 * Obtain lmac id from pdev to access the LMAC ring
1842 * in soc context
1843 */
1844 int lmac_id =
1845 dp_get_lmac_id_for_pdev_id(soc, mac_id,
1846 pdev->pdev_id);
1847
1848 rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
1849
1850 if (!rx_mac_srng->hal_srng)
1851 continue;
1852
1853 htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
1854 rx_mac_srng->hal_srng,
1855 RXDMA_BUF, buf_size,
1856 &htt_tlv_filter);
1857 }
1858 }
1859 return status;
1860 }
1861 #else
1862 /**
1863 * dp_rxdma_ring_sel_cfg_be() - Setup RXDMA ring config
1864 * @soc: Common DP soc handle
1865 *
1866 * Return: QDF_STATUS
1867 */
1868 static QDF_STATUS
dp_rxdma_ring_sel_cfg_be(struct dp_soc * soc)1869 dp_rxdma_ring_sel_cfg_be(struct dp_soc *soc)
1870 {
1871 int i;
1872 int mac_id;
1873 struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
1874 struct dp_srng *rx_mac_srng;
1875 QDF_STATUS status = QDF_STATUS_SUCCESS;
1876 uint16_t buf_size;
1877
1878 buf_size = wlan_cfg_rx_buffer_size(soc->wlan_cfg_ctx);
1879
1880 /*
1881 * In Beryllium chipset msdu_start, mpdu_end
1882 * and rx_attn are part of msdu_end/mpdu_start
1883 */
1884 htt_tlv_filter.msdu_start = 0;
1885 htt_tlv_filter.mpdu_end = 0;
1886 htt_tlv_filter.attention = 0;
1887 htt_tlv_filter.mpdu_start = 1;
1888 htt_tlv_filter.msdu_end = 1;
1889 htt_tlv_filter.packet = 1;
1890 htt_tlv_filter.packet_header = 1;
1891
1892 htt_tlv_filter.ppdu_start = 0;
1893 htt_tlv_filter.ppdu_end = 0;
1894 htt_tlv_filter.ppdu_end_user_stats = 0;
1895 htt_tlv_filter.ppdu_end_user_stats_ext = 0;
1896 htt_tlv_filter.ppdu_end_status_done = 0;
1897 htt_tlv_filter.enable_fp = 1;
1898 htt_tlv_filter.enable_md = 0;
1899 htt_tlv_filter.enable_md = 0;
1900 htt_tlv_filter.enable_mo = 0;
1901
1902 htt_tlv_filter.fp_mgmt_filter = 0;
1903 htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
1904 htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
1905 FILTER_DATA_DATA);
1906 htt_tlv_filter.fp_data_filter |=
1907 hal_rx_en_mcast_fp_data_filter(soc->hal_soc) ?
1908 FILTER_DATA_MCAST : 0;
1909 htt_tlv_filter.mo_mgmt_filter = 0;
1910 htt_tlv_filter.mo_ctrl_filter = 0;
1911 htt_tlv_filter.mo_data_filter = 0;
1912 htt_tlv_filter.md_data_filter = 0;
1913
1914 htt_tlv_filter.offset_valid = true;
1915
1916 /* Not subscribing to mpdu_end, msdu_start and rx_attn */
1917 htt_tlv_filter.rx_mpdu_end_offset = 0;
1918 htt_tlv_filter.rx_msdu_start_offset = 0;
1919 htt_tlv_filter.rx_attn_offset = 0;
1920
1921 /*
1922 * For monitor mode, the packet hdr tlv is enabled later during
1923 * filter update
1924 */
1925 if (soc->cdp_soc.ol_ops->get_con_mode &&
1926 soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_MONITOR_MODE)
1927 htt_tlv_filter.rx_packet_offset = soc->rx_mon_pkt_tlv_size;
1928 else
1929 htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size;
1930
1931 htt_tlv_filter.rx_header_offset =
1932 hal_rx_pkt_tlv_offset_get(soc->hal_soc);
1933 htt_tlv_filter.rx_mpdu_start_offset =
1934 hal_rx_mpdu_start_offset_get(soc->hal_soc);
1935 htt_tlv_filter.rx_msdu_end_offset =
1936 hal_rx_msdu_end_offset_get(soc->hal_soc);
1937
1938 dp_info("TLV subscription\n"
1939 "msdu_start %d, mpdu_end %d, attention %d"
1940 "mpdu_start %d, msdu_end %d, pkt_hdr %d, pkt %d\n"
1941 "TLV offsets\n"
1942 "msdu_start %d, mpdu_end %d, attention %d"
1943 "mpdu_start %d, msdu_end %d, pkt_hdr %d, pkt %d\n",
1944 htt_tlv_filter.msdu_start,
1945 htt_tlv_filter.mpdu_end,
1946 htt_tlv_filter.attention,
1947 htt_tlv_filter.mpdu_start,
1948 htt_tlv_filter.msdu_end,
1949 htt_tlv_filter.packet_header,
1950 htt_tlv_filter.packet,
1951 htt_tlv_filter.rx_msdu_start_offset,
1952 htt_tlv_filter.rx_mpdu_end_offset,
1953 htt_tlv_filter.rx_attn_offset,
1954 htt_tlv_filter.rx_mpdu_start_offset,
1955 htt_tlv_filter.rx_msdu_end_offset,
1956 htt_tlv_filter.rx_header_offset,
1957 htt_tlv_filter.rx_packet_offset);
1958
1959 dp_rxdma_ring_wmask_cfg_be(soc, &htt_tlv_filter);
1960 for (i = 0; i < MAX_PDEV_CNT; i++) {
1961 struct dp_pdev *pdev = soc->pdev_list[i];
1962
1963 if (!pdev)
1964 continue;
1965
1966 for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
1967 int mac_for_pdev =
1968 dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
1969 /*
1970 * Obtain lmac id from pdev to access the LMAC ring
1971 * in soc context
1972 */
1973 int lmac_id =
1974 dp_get_lmac_id_for_pdev_id(soc, mac_id,
1975 pdev->pdev_id);
1976
1977 rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
1978
1979 if (!rx_mac_srng->hal_srng)
1980 continue;
1981
1982 htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
1983 rx_mac_srng->hal_srng,
1984 RXDMA_BUF, buf_size,
1985 &htt_tlv_filter);
1986 }
1987 }
1988 return status;
1989
1990 }
1991 #endif
1992
1993 #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
1994 /**
1995 * dp_service_near_full_srngs_be() - Main bottom half callback for the
1996 * near-full IRQs.
1997 * @soc: Datapath SoC handle
1998 * @int_ctx: Interrupt context
1999 * @dp_budget: Budget of the work that can be done in the bottom half
2000 *
2001 * Return: work done in the handler
2002 */
2003 static uint32_t
dp_service_near_full_srngs_be(struct dp_soc * soc,struct dp_intr * int_ctx,uint32_t dp_budget)2004 dp_service_near_full_srngs_be(struct dp_soc *soc, struct dp_intr *int_ctx,
2005 uint32_t dp_budget)
2006 {
2007 int ring = 0;
2008 int budget = dp_budget;
2009 uint32_t work_done = 0;
2010 uint32_t remaining_quota = dp_budget;
2011 struct dp_intr_stats *intr_stats = &int_ctx->intr_stats;
2012 int tx_ring_near_full_mask = int_ctx->tx_ring_near_full_mask;
2013 int rx_near_full_grp_1_mask = int_ctx->rx_near_full_grp_1_mask;
2014 int rx_near_full_grp_2_mask = int_ctx->rx_near_full_grp_2_mask;
2015 int rx_near_full_mask = rx_near_full_grp_1_mask |
2016 rx_near_full_grp_2_mask;
2017
2018 dp_verbose_debug("rx_ring_near_full 0x%x tx_ring_near_full 0x%x",
2019 rx_near_full_mask,
2020 tx_ring_near_full_mask);
2021
2022 if (rx_near_full_mask) {
2023 for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
2024 if (!(rx_near_full_mask & (1 << ring)))
2025 continue;
2026
2027 work_done = dp_rx_nf_process(int_ctx,
2028 soc->reo_dest_ring[ring].hal_srng,
2029 ring, remaining_quota);
2030 if (work_done) {
2031 intr_stats->num_rx_ring_near_full_masks[ring]++;
2032 dp_verbose_debug("rx NF mask 0x%x ring %d, work_done %d budget %d",
2033 rx_near_full_mask, ring,
2034 work_done,
2035 budget);
2036 budget -= work_done;
2037 if (budget <= 0)
2038 goto budget_done;
2039 remaining_quota = budget;
2040 }
2041 }
2042 }
2043
2044 if (tx_ring_near_full_mask) {
2045 for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
2046 if (!(tx_ring_near_full_mask & (1 << ring)))
2047 continue;
2048
2049 work_done = dp_tx_comp_nf_handler(int_ctx, soc,
2050 soc->tx_comp_ring[ring].hal_srng,
2051 ring, remaining_quota);
2052 if (work_done) {
2053 intr_stats->num_tx_comp_ring_near_full_masks[ring]++;
2054 dp_verbose_debug("tx NF mask 0x%x ring %d, work_done %d budget %d",
2055 tx_ring_near_full_mask, ring,
2056 work_done, budget);
2057 budget -= work_done;
2058 if (budget <= 0)
2059 break;
2060 remaining_quota = budget;
2061 }
2062 }
2063 }
2064
2065 intr_stats->num_near_full_masks++;
2066
2067 budget_done:
2068 return dp_budget - budget;
2069 }
2070
2071 /**
2072 * dp_srng_test_and_update_nf_params_be() - Check if the srng is in near full
2073 * state and set the reap_limit appropriately
2074 * as per the near full state
2075 * @soc: Datapath soc handle
2076 * @dp_srng: Datapath handle for SRNG
2077 * @max_reap_limit: [Output Buffer] Buffer to set the max reap limit as per
2078 * the srng near-full state
2079 *
2080 * Return: 1, if the srng is in near-full state
2081 * 0, if the srng is not in near-full state
2082 */
2083 static int
dp_srng_test_and_update_nf_params_be(struct dp_soc * soc,struct dp_srng * dp_srng,int * max_reap_limit)2084 dp_srng_test_and_update_nf_params_be(struct dp_soc *soc,
2085 struct dp_srng *dp_srng,
2086 int *max_reap_limit)
2087 {
2088 return _dp_srng_test_and_update_nf_params(soc, dp_srng, max_reap_limit);
2089 }
2090
2091 /**
2092 * dp_init_near_full_arch_ops_be() - Initialize the arch ops handler for the
2093 * near full IRQ handling operations.
2094 * @arch_ops: arch ops handle
2095 *
2096 * Return: none
2097 */
2098 static inline void
dp_init_near_full_arch_ops_be(struct dp_arch_ops * arch_ops)2099 dp_init_near_full_arch_ops_be(struct dp_arch_ops *arch_ops)
2100 {
2101 arch_ops->dp_service_near_full_srngs = dp_service_near_full_srngs_be;
2102 arch_ops->dp_srng_test_and_update_nf_params =
2103 dp_srng_test_and_update_nf_params_be;
2104 }
2105
2106 #else
2107 static inline void
dp_init_near_full_arch_ops_be(struct dp_arch_ops * arch_ops)2108 dp_init_near_full_arch_ops_be(struct dp_arch_ops *arch_ops)
2109 {
2110 }
2111 #endif
2112
2113 static inline
dp_srng_init_be(struct dp_soc * soc,struct dp_srng * srng,int ring_type,int ring_num,int mac_id)2114 QDF_STATUS dp_srng_init_be(struct dp_soc *soc, struct dp_srng *srng,
2115 int ring_type, int ring_num, int mac_id)
2116 {
2117 return dp_srng_init_idx(soc, srng, ring_type, ring_num, mac_id, 0);
2118 }
2119
dp_soc_interrupt_attach_be(struct cdp_soc_t * txrx_soc)2120 static QDF_STATUS dp_soc_interrupt_attach_be(struct cdp_soc_t *txrx_soc)
2121 {
2122 return dp_soc_interrupt_attach(txrx_soc);
2123 }
2124
dp_soc_attach_poll_be(struct cdp_soc_t * txrx_soc)2125 static QDF_STATUS dp_soc_attach_poll_be(struct cdp_soc_t *txrx_soc)
2126 {
2127 return dp_soc_attach_poll(txrx_soc);
2128 }
2129
dp_soc_interrupt_detach_be(struct cdp_soc_t * txrx_soc)2130 static void dp_soc_interrupt_detach_be(struct cdp_soc_t *txrx_soc)
2131 {
2132 return dp_soc_interrupt_detach(txrx_soc);
2133 }
2134
dp_service_srngs_be(void * dp_ctx,uint32_t dp_budget,int cpu)2135 static uint32_t dp_service_srngs_be(void *dp_ctx, uint32_t dp_budget, int cpu)
2136 {
2137 return dp_service_srngs(dp_ctx, dp_budget, cpu);
2138 }
2139
2140 #ifdef WLAN_SUPPORT_PPEDS
dp_soc_ppeds_srng_deinit(struct dp_soc * soc)2141 static void dp_soc_ppeds_srng_deinit(struct dp_soc *soc)
2142 {
2143 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
2144 struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
2145
2146 soc_cfg_ctx = soc->wlan_cfg_ctx;
2147
2148 if (!be_soc->ppeds_handle)
2149 return;
2150
2151 dp_srng_deinit(soc, &be_soc->ppe2tcl_ring, PPE2TCL, 0);
2152 wlan_minidump_remove(be_soc->ppe2tcl_ring.base_vaddr_unaligned,
2153 be_soc->ppe2tcl_ring.alloc_size,
2154 soc->ctrl_psoc,
2155 WLAN_MD_DP_SRNG_PPE2TCL,
2156 "ppe2tcl_ring");
2157
2158 dp_srng_deinit(soc, &be_soc->reo2ppe_ring, REO2PPE, 0);
2159 wlan_minidump_remove(be_soc->reo2ppe_ring.base_vaddr_unaligned,
2160 be_soc->reo2ppe_ring.alloc_size,
2161 soc->ctrl_psoc,
2162 WLAN_MD_DP_SRNG_REO2PPE,
2163 "reo2ppe_ring");
2164
2165 dp_srng_deinit(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
2166 WBM2_SW_PPE_REL_RING_ID);
2167 wlan_minidump_remove(be_soc->ppeds_wbm_release_ring.base_vaddr_unaligned,
2168 be_soc->ppeds_wbm_release_ring.alloc_size,
2169 soc->ctrl_psoc,
2170 WLAN_MD_DP_SRNG_PPE_WBM2SW_RELEASE,
2171 "ppeds_wbm_release_ring");
2172
2173 }
2174
dp_soc_ppeds_srng_free(struct dp_soc * soc)2175 static void dp_soc_ppeds_srng_free(struct dp_soc *soc)
2176 {
2177 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
2178 struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
2179
2180 soc_cfg_ctx = soc->wlan_cfg_ctx;
2181
2182 dp_srng_free(soc, &be_soc->ppeds_wbm_release_ring);
2183
2184 dp_srng_free(soc, &be_soc->ppe2tcl_ring);
2185
2186 dp_srng_free(soc, &be_soc->reo2ppe_ring);
2187 }
2188
dp_soc_ppeds_srng_alloc(struct dp_soc * soc)2189 static QDF_STATUS dp_soc_ppeds_srng_alloc(struct dp_soc *soc)
2190 {
2191 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
2192 uint32_t entries;
2193 struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
2194
2195 soc_cfg_ctx = soc->wlan_cfg_ctx;
2196
2197 if (!be_soc->ppeds_handle)
2198 return QDF_STATUS_SUCCESS;
2199
2200 entries = wlan_cfg_get_dp_soc_reo2ppe_ring_size(soc_cfg_ctx);
2201
2202 if (dp_srng_alloc(soc, &be_soc->reo2ppe_ring, REO2PPE,
2203 entries, 0)) {
2204 dp_err("%pK: dp_srng_alloc failed for reo2ppe", soc);
2205 goto fail;
2206 }
2207
2208 entries = wlan_cfg_get_dp_soc_ppe2tcl_ring_size(soc_cfg_ctx);
2209 if (dp_srng_alloc(soc, &be_soc->ppe2tcl_ring, PPE2TCL,
2210 entries, 0)) {
2211 dp_err("%pK: dp_srng_alloc failed for ppe2tcl_ring", soc);
2212 goto fail;
2213 }
2214
2215 entries = wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
2216 if (dp_srng_alloc(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
2217 entries, 1)) {
2218 dp_err("%pK: dp_srng_alloc failed for ppeds_wbm_release_ring",
2219 soc);
2220 goto fail;
2221 }
2222
2223 return QDF_STATUS_SUCCESS;
2224 fail:
2225 dp_soc_ppeds_srng_free(soc);
2226 return QDF_STATUS_E_NOMEM;
2227 }
2228
dp_soc_ppeds_srng_init(struct dp_soc * soc)2229 static QDF_STATUS dp_soc_ppeds_srng_init(struct dp_soc *soc)
2230 {
2231 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
2232 struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
2233 hal_soc_handle_t hal_soc = soc->hal_soc;
2234
2235 struct dp_ppe_ds_idxs idx = {0};
2236
2237 soc_cfg_ctx = soc->wlan_cfg_ctx;
2238
2239 if (!be_soc->ppeds_handle)
2240 return QDF_STATUS_SUCCESS;
2241
2242 if (dp_ppeds_register_soc_be(be_soc, &idx)) {
2243 dp_err("%pK: ppeds registration failed", soc);
2244 goto fail;
2245 }
2246
2247 if (dp_srng_init_idx(soc, &be_soc->reo2ppe_ring, REO2PPE, 0, 0,
2248 idx.reo2ppe_start_idx)) {
2249 dp_err("%pK: dp_srng_init failed for reo2ppe", soc);
2250 goto fail;
2251 }
2252
2253 wlan_minidump_log(be_soc->reo2ppe_ring.base_vaddr_unaligned,
2254 be_soc->reo2ppe_ring.alloc_size,
2255 soc->ctrl_psoc,
2256 WLAN_MD_DP_SRNG_REO2PPE,
2257 "reo2ppe_ring");
2258
2259 hal_reo_config_reo2ppe_dest_info(hal_soc);
2260
2261 if (dp_srng_init_idx(soc, &be_soc->ppe2tcl_ring, PPE2TCL, 0, 0,
2262 idx.ppe2tcl_start_idx)) {
2263 dp_err("%pK: dp_srng_init failed for ppe2tcl_ring", soc);
2264 goto fail;
2265 }
2266
2267 wlan_minidump_log(be_soc->ppe2tcl_ring.base_vaddr_unaligned,
2268 be_soc->ppe2tcl_ring.alloc_size,
2269 soc->ctrl_psoc,
2270 WLAN_MD_DP_SRNG_PPE2TCL,
2271 "ppe2tcl_ring");
2272
2273 hal_tx_config_rbm_mapping_be(soc->hal_soc,
2274 be_soc->ppe2tcl_ring.hal_srng,
2275 WBM2_SW_PPE_REL_MAP_ID);
2276
2277 if (dp_srng_init(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
2278 WBM2_SW_PPE_REL_RING_ID, 0)) {
2279 dp_err("%pK: dp_srng_init failed for ppeds_wbm_release_ring",
2280 soc);
2281 goto fail;
2282 }
2283
2284 wlan_minidump_log(be_soc->ppeds_wbm_release_ring.base_vaddr_unaligned,
2285 be_soc->ppeds_wbm_release_ring.alloc_size,
2286 soc->ctrl_psoc, WLAN_MD_DP_SRNG_PPE_WBM2SW_RELEASE,
2287 "ppeds_wbm_release_ring");
2288
2289 return QDF_STATUS_SUCCESS;
2290 fail:
2291 dp_soc_ppeds_srng_deinit(soc);
2292 return QDF_STATUS_E_NOMEM;
2293 }
2294 #else
dp_soc_ppeds_srng_deinit(struct dp_soc * soc)2295 static void dp_soc_ppeds_srng_deinit(struct dp_soc *soc)
2296 {
2297 }
2298
dp_soc_ppeds_srng_free(struct dp_soc * soc)2299 static void dp_soc_ppeds_srng_free(struct dp_soc *soc)
2300 {
2301 }
2302
dp_soc_ppeds_srng_alloc(struct dp_soc * soc)2303 static QDF_STATUS dp_soc_ppeds_srng_alloc(struct dp_soc *soc)
2304 {
2305 return QDF_STATUS_SUCCESS;
2306 }
2307
dp_soc_ppeds_srng_init(struct dp_soc * soc)2308 static QDF_STATUS dp_soc_ppeds_srng_init(struct dp_soc *soc)
2309 {
2310 return QDF_STATUS_SUCCESS;
2311 }
2312 #endif
2313
dp_soc_srng_deinit_be(struct dp_soc * soc)2314 static void dp_soc_srng_deinit_be(struct dp_soc *soc)
2315 {
2316 uint32_t i;
2317
2318 dp_soc_ppeds_srng_deinit(soc);
2319
2320 if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
2321 for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
2322 dp_ssr_dump_srng_unregister("rx_refill_buf_ring", i);
2323 dp_srng_deinit(soc, &soc->rx_refill_buf_ring[i],
2324 RXDMA_BUF, 0);
2325 }
2326 }
2327 }
2328
dp_soc_srng_free_be(struct dp_soc * soc)2329 static void dp_soc_srng_free_be(struct dp_soc *soc)
2330 {
2331 uint32_t i;
2332
2333 dp_soc_ppeds_srng_free(soc);
2334
2335 if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
2336 for (i = 0; i < soc->num_rx_refill_buf_rings; i++)
2337 dp_srng_free(soc, &soc->rx_refill_buf_ring[i]);
2338 }
2339 }
2340
dp_soc_srng_alloc_be(struct dp_soc * soc)2341 static QDF_STATUS dp_soc_srng_alloc_be(struct dp_soc *soc)
2342 {
2343 struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
2344 uint32_t ring_size;
2345 uint32_t i;
2346
2347 soc_cfg_ctx = soc->wlan_cfg_ctx;
2348
2349 ring_size = wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx);
2350 if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
2351 for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
2352 if (dp_srng_alloc(soc, &soc->rx_refill_buf_ring[i],
2353 RXDMA_BUF, ring_size, 0)) {
2354 dp_err("%pK: dp_srng_alloc failed refill ring",
2355 soc);
2356 goto fail;
2357 }
2358 }
2359 }
2360
2361 if (dp_soc_ppeds_srng_alloc(soc)) {
2362 dp_err("%pK: ppe rings alloc failed",
2363 soc);
2364 goto fail;
2365 }
2366
2367 return QDF_STATUS_SUCCESS;
2368 fail:
2369 dp_soc_srng_free_be(soc);
2370 return QDF_STATUS_E_NOMEM;
2371 }
2372
dp_soc_srng_init_be(struct dp_soc * soc)2373 static QDF_STATUS dp_soc_srng_init_be(struct dp_soc *soc)
2374 {
2375 int i = 0;
2376
2377 if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
2378 for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
2379 if (dp_srng_init(soc, &soc->rx_refill_buf_ring[i],
2380 RXDMA_BUF, 0, 0)) {
2381 dp_err("%pK: dp_srng_init failed refill ring",
2382 soc);
2383 goto fail;
2384 }
2385 dp_ssr_dump_srng_register("rx_refill_buf_ring",
2386 &soc->rx_refill_buf_ring[i],
2387 i);
2388 }
2389 }
2390
2391 if (dp_soc_ppeds_srng_init(soc)) {
2392 dp_err("%pK: ppe ds rings init failed",
2393 soc);
2394 goto fail;
2395 }
2396
2397 return QDF_STATUS_SUCCESS;
2398 fail:
2399 dp_soc_srng_deinit_be(soc);
2400 return QDF_STATUS_E_NOMEM;
2401 }
2402
2403 #ifdef WLAN_FEATURE_11BE_MLO
2404 static inline unsigned
dp_mlo_peer_find_hash_index(dp_mld_peer_hash_obj_t mld_hash_obj,union dp_align_mac_addr * mac_addr)2405 dp_mlo_peer_find_hash_index(dp_mld_peer_hash_obj_t mld_hash_obj,
2406 union dp_align_mac_addr *mac_addr)
2407 {
2408 uint32_t index;
2409
2410 index =
2411 mac_addr->align2.bytes_ab ^
2412 mac_addr->align2.bytes_cd ^
2413 mac_addr->align2.bytes_ef;
2414
2415 index ^= index >> mld_hash_obj->mld_peer_hash.idx_bits;
2416 index &= mld_hash_obj->mld_peer_hash.mask;
2417
2418 return index;
2419 }
2420
2421 QDF_STATUS
dp_mlo_peer_find_hash_attach_be(dp_mld_peer_hash_obj_t mld_hash_obj,int hash_elems)2422 dp_mlo_peer_find_hash_attach_be(dp_mld_peer_hash_obj_t mld_hash_obj,
2423 int hash_elems)
2424 {
2425 int i, log2;
2426
2427 if (!mld_hash_obj)
2428 return QDF_STATUS_E_FAILURE;
2429
2430 hash_elems *= DP_PEER_HASH_LOAD_MULT;
2431 hash_elems >>= DP_PEER_HASH_LOAD_SHIFT;
2432 log2 = dp_log2_ceil(hash_elems);
2433 hash_elems = 1 << log2;
2434
2435 mld_hash_obj->mld_peer_hash.mask = hash_elems - 1;
2436 mld_hash_obj->mld_peer_hash.idx_bits = log2;
2437 /* allocate an array of TAILQ peer object lists */
2438 mld_hash_obj->mld_peer_hash.bins = qdf_mem_malloc(
2439 hash_elems * sizeof(TAILQ_HEAD(anonymous_tail_q, dp_peer)));
2440 if (!mld_hash_obj->mld_peer_hash.bins)
2441 return QDF_STATUS_E_NOMEM;
2442
2443 for (i = 0; i < hash_elems; i++)
2444 TAILQ_INIT(&mld_hash_obj->mld_peer_hash.bins[i]);
2445
2446 qdf_spinlock_create(&mld_hash_obj->mld_peer_hash_lock);
2447
2448 return QDF_STATUS_SUCCESS;
2449 }
2450
2451 void
dp_mlo_peer_find_hash_detach_be(dp_mld_peer_hash_obj_t mld_hash_obj)2452 dp_mlo_peer_find_hash_detach_be(dp_mld_peer_hash_obj_t mld_hash_obj)
2453 {
2454 if (!mld_hash_obj)
2455 return;
2456
2457 if (mld_hash_obj->mld_peer_hash.bins) {
2458 qdf_mem_free(mld_hash_obj->mld_peer_hash.bins);
2459 mld_hash_obj->mld_peer_hash.bins = NULL;
2460 qdf_spinlock_destroy(&mld_hash_obj->mld_peer_hash_lock);
2461 }
2462 }
2463
2464 #ifdef WLAN_MLO_MULTI_CHIP
dp_mlo_peer_find_hash_attach_wrapper(struct dp_soc * soc)2465 static QDF_STATUS dp_mlo_peer_find_hash_attach_wrapper(struct dp_soc *soc)
2466 {
2467 /* In case of MULTI chip MLO peer hash table when MLO global object
2468 * is created, avoid from SOC attach path
2469 */
2470 return QDF_STATUS_SUCCESS;
2471 }
2472
dp_mlo_peer_find_hash_detach_wrapper(struct dp_soc * soc)2473 static void dp_mlo_peer_find_hash_detach_wrapper(struct dp_soc *soc)
2474 {
2475 }
2476
dp_mlo_dev_ctxt_list_attach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)2477 void dp_mlo_dev_ctxt_list_attach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
2478 {
2479 }
2480
dp_mlo_dev_ctxt_list_detach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)2481 void dp_mlo_dev_ctxt_list_detach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
2482 {
2483 }
2484 #else
dp_mlo_peer_find_hash_attach_wrapper(struct dp_soc * soc)2485 static QDF_STATUS dp_mlo_peer_find_hash_attach_wrapper(struct dp_soc *soc)
2486 {
2487 dp_mld_peer_hash_obj_t mld_hash_obj;
2488
2489 mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
2490
2491 if (!mld_hash_obj)
2492 return QDF_STATUS_E_FAILURE;
2493
2494 return dp_mlo_peer_find_hash_attach_be(mld_hash_obj, soc->max_peers);
2495 }
2496
dp_mlo_peer_find_hash_detach_wrapper(struct dp_soc * soc)2497 static void dp_mlo_peer_find_hash_detach_wrapper(struct dp_soc *soc)
2498 {
2499 dp_mld_peer_hash_obj_t mld_hash_obj;
2500
2501 mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
2502
2503 if (!mld_hash_obj)
2504 return;
2505
2506 return dp_mlo_peer_find_hash_detach_be(mld_hash_obj);
2507 }
2508
dp_mlo_dev_ctxt_list_attach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)2509 void dp_mlo_dev_ctxt_list_attach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
2510 {
2511 dp_mlo_dev_ctxt_list_attach(mlo_dev_obj);
2512 }
2513
dp_mlo_dev_ctxt_list_detach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)2514 void dp_mlo_dev_ctxt_list_detach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
2515 {
2516 dp_mlo_dev_ctxt_list_detach(mlo_dev_obj);
2517 }
2518 #endif
2519
2520 #ifdef QCA_ENHANCED_STATS_SUPPORT
2521 static uint8_t
dp_get_hw_link_id_be(struct dp_pdev * pdev)2522 dp_get_hw_link_id_be(struct dp_pdev *pdev)
2523 {
2524 struct dp_pdev_be *be_pdev = dp_get_be_pdev_from_dp_pdev(pdev);
2525
2526 return be_pdev->mlo_link_id;
2527 }
2528 #else
2529 static uint8_t
dp_get_hw_link_id_be(struct dp_pdev * pdev)2530 dp_get_hw_link_id_be(struct dp_pdev *pdev)
2531 {
2532 return 0;
2533 }
2534 #endif /* QCA_ENHANCED_STATS_SUPPORT */
2535
2536 static struct dp_peer *
dp_mlo_peer_find_hash_find_be(struct dp_soc * soc,uint8_t * peer_mac_addr,int mac_addr_is_aligned,enum dp_mod_id mod_id,uint8_t vdev_id)2537 dp_mlo_peer_find_hash_find_be(struct dp_soc *soc,
2538 uint8_t *peer_mac_addr,
2539 int mac_addr_is_aligned,
2540 enum dp_mod_id mod_id,
2541 uint8_t vdev_id)
2542 {
2543 union dp_align_mac_addr local_mac_addr_aligned, *mac_addr;
2544 uint32_t index;
2545 struct dp_peer *peer;
2546 struct dp_vdev *vdev;
2547 dp_mld_peer_hash_obj_t mld_hash_obj;
2548
2549 mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
2550 if (!mld_hash_obj)
2551 return NULL;
2552
2553 if (!mld_hash_obj->mld_peer_hash.bins)
2554 return NULL;
2555
2556 if (mac_addr_is_aligned) {
2557 mac_addr = (union dp_align_mac_addr *)peer_mac_addr;
2558 } else {
2559 qdf_mem_copy(
2560 &local_mac_addr_aligned.raw[0],
2561 peer_mac_addr, QDF_MAC_ADDR_SIZE);
2562 mac_addr = &local_mac_addr_aligned;
2563 }
2564
2565 if (vdev_id != DP_VDEV_ALL) {
2566 vdev = dp_vdev_get_ref_by_id(soc, vdev_id, mod_id);
2567 if (!vdev) {
2568 dp_err("vdev is null");
2569 return NULL;
2570 }
2571 } else {
2572 vdev = NULL;
2573 }
2574
2575 /* search mld peer table if no link peer for given mac address */
2576 index = dp_mlo_peer_find_hash_index(mld_hash_obj, mac_addr);
2577 qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
2578 TAILQ_FOREACH(peer, &mld_hash_obj->mld_peer_hash.bins[index],
2579 hash_list_elem) {
2580 if (dp_peer_find_mac_addr_cmp(mac_addr, &peer->mac_addr) == 0) {
2581 if ((vdev_id == DP_VDEV_ALL) || (
2582 dp_peer_find_mac_addr_cmp(
2583 &peer->vdev->mld_mac_addr,
2584 &vdev->mld_mac_addr) == 0)) {
2585 /* take peer reference before returning */
2586 if (dp_peer_get_ref(NULL, peer, mod_id) !=
2587 QDF_STATUS_SUCCESS)
2588 peer = NULL;
2589
2590 if (vdev)
2591 dp_vdev_unref_delete(soc, vdev, mod_id);
2592
2593 qdf_spin_unlock_bh(
2594 &mld_hash_obj->mld_peer_hash_lock);
2595 return peer;
2596 }
2597 }
2598 }
2599
2600 if (vdev)
2601 dp_vdev_unref_delete(soc, vdev, mod_id);
2602
2603 qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
2604
2605 return NULL; /* failure */
2606 }
2607
2608 static void
dp_mlo_peer_find_hash_remove_be(struct dp_soc * soc,struct dp_peer * peer)2609 dp_mlo_peer_find_hash_remove_be(struct dp_soc *soc, struct dp_peer *peer)
2610 {
2611 uint32_t index;
2612 struct dp_peer *tmppeer = NULL;
2613 int found = 0;
2614 dp_mld_peer_hash_obj_t mld_hash_obj;
2615
2616 mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
2617
2618 if (!mld_hash_obj)
2619 return;
2620
2621 index = dp_mlo_peer_find_hash_index(mld_hash_obj, &peer->mac_addr);
2622 QDF_ASSERT(!TAILQ_EMPTY(&mld_hash_obj->mld_peer_hash.bins[index]));
2623
2624 qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
2625 TAILQ_FOREACH(tmppeer, &mld_hash_obj->mld_peer_hash.bins[index],
2626 hash_list_elem) {
2627 if (tmppeer == peer) {
2628 found = 1;
2629 break;
2630 }
2631 }
2632 QDF_ASSERT(found);
2633 TAILQ_REMOVE(&mld_hash_obj->mld_peer_hash.bins[index], peer,
2634 hash_list_elem);
2635
2636 dp_info("Peer %pK (" QDF_MAC_ADDR_FMT ") removed. (found %u)",
2637 peer, QDF_MAC_ADDR_REF(peer->mac_addr.raw), found);
2638 dp_peer_unref_delete(peer, DP_MOD_ID_CONFIG);
2639 qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
2640
2641 }
2642
2643 static void
dp_mlo_peer_find_hash_add_be(struct dp_soc * soc,struct dp_peer * peer)2644 dp_mlo_peer_find_hash_add_be(struct dp_soc *soc, struct dp_peer *peer)
2645 {
2646 uint32_t index;
2647 dp_mld_peer_hash_obj_t mld_hash_obj;
2648
2649 mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
2650
2651 if (!mld_hash_obj)
2652 return;
2653
2654 index = dp_mlo_peer_find_hash_index(mld_hash_obj, &peer->mac_addr);
2655
2656 qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
2657
2658 if (QDF_IS_STATUS_ERROR(dp_peer_get_ref(NULL, peer,
2659 DP_MOD_ID_CONFIG))) {
2660 dp_err("fail to get peer ref:" QDF_MAC_ADDR_FMT,
2661 QDF_MAC_ADDR_REF(peer->mac_addr.raw));
2662 qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
2663 return;
2664 }
2665 TAILQ_INSERT_TAIL(&mld_hash_obj->mld_peer_hash.bins[index], peer,
2666 hash_list_elem);
2667 qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
2668
2669 dp_info("Peer %pK (" QDF_MAC_ADDR_FMT ") added",
2670 peer, QDF_MAC_ADDR_REF(peer->mac_addr.raw));
2671 }
2672
dp_print_mlo_ast_stats_be(struct dp_soc * soc)2673 void dp_print_mlo_ast_stats_be(struct dp_soc *soc)
2674 {
2675 uint32_t index;
2676 struct dp_peer *peer;
2677 dp_mld_peer_hash_obj_t mld_hash_obj;
2678
2679 mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
2680
2681 if (!mld_hash_obj)
2682 return;
2683
2684 qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
2685 for (index = 0; index < mld_hash_obj->mld_peer_hash.mask; index++) {
2686 TAILQ_FOREACH(peer, &mld_hash_obj->mld_peer_hash.bins[index],
2687 hash_list_elem) {
2688 dp_print_peer_ast_entries(soc, peer, NULL);
2689 }
2690 }
2691 qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
2692 }
2693 #else /* WLAN_FEATURE_11BE_MLO */
dp_mlo_dev_ctxt_list_attach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)2694 void dp_mlo_dev_ctxt_list_attach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
2695 {
2696 }
2697
dp_mlo_dev_ctxt_list_detach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)2698 void dp_mlo_dev_ctxt_list_detach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
2699 {
2700 }
2701 #endif /* WLAN_FEATURE_11BE_MLO */
2702
2703 #if defined(DP_UMAC_HW_HARD_RESET) && defined(DP_UMAC_HW_RESET_SUPPORT)
dp_reconfig_tx_vdev_mcast_ctrl_be(struct dp_soc * soc,struct dp_vdev * vdev)2704 static void dp_reconfig_tx_vdev_mcast_ctrl_be(struct dp_soc *soc,
2705 struct dp_vdev *vdev)
2706 {
2707 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
2708 struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
2709 hal_soc_handle_t hal_soc = soc->hal_soc;
2710 uint8_t vdev_id = vdev->vdev_id;
2711
2712 if (vdev->opmode == wlan_op_mode_sta) {
2713 if (vdev->pdev->isolation)
2714 hal_tx_vdev_mcast_ctrl_set(hal_soc, vdev_id,
2715 HAL_TX_MCAST_CTRL_FW_EXCEPTION);
2716 else
2717 hal_tx_vdev_mcast_ctrl_set(hal_soc, vdev_id,
2718 HAL_TX_MCAST_CTRL_MEC_NOTIFY);
2719 } else if (vdev->opmode == wlan_op_mode_ap) {
2720 hal_tx_mcast_mlo_reinject_routing_set(
2721 hal_soc,
2722 HAL_TX_MCAST_MLO_REINJECT_TQM_NOTIFY);
2723 if (vdev->mlo_vdev) {
2724 hal_tx_vdev_mcast_ctrl_set(
2725 hal_soc,
2726 vdev_id,
2727 HAL_TX_MCAST_CTRL_NO_SPECIAL);
2728 } else {
2729 hal_tx_vdev_mcast_ctrl_set(hal_soc,
2730 vdev_id,
2731 HAL_TX_MCAST_CTRL_FW_EXCEPTION);
2732 }
2733 }
2734 }
2735
dp_bank_reconfig_be(struct dp_soc * soc,struct dp_vdev * vdev)2736 static void dp_bank_reconfig_be(struct dp_soc *soc, struct dp_vdev *vdev)
2737 {
2738 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
2739 struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
2740 union hal_tx_bank_config *bank_config;
2741
2742 if (!be_vdev || be_vdev->bank_id == DP_BE_INVALID_BANK_ID)
2743 return;
2744
2745 bank_config = &be_soc->bank_profiles[be_vdev->bank_id].bank_config;
2746
2747 hal_tx_populate_bank_register(be_soc->soc.hal_soc, bank_config,
2748 be_vdev->bank_id);
2749 }
2750
2751 #endif
2752
2753 #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
2754 defined(WLAN_MCAST_MLO)
dp_mlo_mcast_reset_pri_mcast(struct dp_vdev_be * be_vdev,struct dp_vdev * ptnr_vdev,void * arg)2755 static void dp_mlo_mcast_reset_pri_mcast(struct dp_vdev_be *be_vdev,
2756 struct dp_vdev *ptnr_vdev,
2757 void *arg)
2758 {
2759 struct dp_vdev_be *be_ptnr_vdev =
2760 dp_get_be_vdev_from_dp_vdev(ptnr_vdev);
2761
2762 be_ptnr_vdev->mcast_primary = false;
2763 }
2764
2765 #if defined(CONFIG_MLO_SINGLE_DEV)
dp_txrx_set_mlo_mcast_primary_vdev_param_be(struct dp_vdev * vdev,cdp_config_param_type val)2766 static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
2767 struct dp_vdev *vdev,
2768 cdp_config_param_type val)
2769 {
2770 struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
2771 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(
2772 be_vdev->vdev.pdev->soc);
2773
2774 be_vdev->mcast_primary = val.cdp_vdev_param_mcast_vdev;
2775 vdev->mlo_vdev = 1;
2776
2777 if (be_vdev->mcast_primary) {
2778 struct cdp_txrx_peer_params_update params = {0};
2779
2780 dp_mlo_iter_ptnr_vdev(be_soc, be_vdev,
2781 dp_mlo_mcast_reset_pri_mcast,
2782 (void *)&be_vdev->mcast_primary,
2783 DP_MOD_ID_TX_MCAST,
2784 DP_LINK_VDEV_ITER,
2785 DP_VDEV_ITERATE_SKIP_SELF);
2786
2787 params.chip_id = be_soc->mlo_chip_id;
2788 params.pdev_id = be_vdev->vdev.pdev->pdev_id;
2789 params.vdev_id = vdev->vdev_id;
2790 dp_wdi_event_handler(
2791 WDI_EVENT_MCAST_PRIMARY_UPDATE,
2792 be_vdev->vdev.pdev->soc,
2793 (void *)¶ms, CDP_INVALID_PEER,
2794 WDI_NO_VAL, params.pdev_id);
2795 }
2796 }
2797
dp_get_vdev_stats_for_unmap_peer_mlo(struct dp_vdev * vdev,struct dp_peer * peer)2798 static void dp_get_vdev_stats_for_unmap_peer_mlo(struct dp_vdev *vdev,
2799 struct dp_peer *peer)
2800 {
2801 struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
2802 struct cdp_vdev_stats *vdev_stats = &be_vdev->mlo_stats;
2803 struct dp_txrx_peer *txrx_peer = dp_get_txrx_peer(peer);
2804 struct dp_pdev *pdev = vdev->pdev;
2805 struct dp_soc *soc = vdev->pdev->soc;
2806 uint8_t link_id = dp_get_peer_hw_link_id(soc, pdev);
2807 struct dp_peer_per_pkt_stats *per_pkt_stats;
2808
2809 if (!txrx_peer)
2810 goto link_stats;
2811
2812 dp_peer_aggregate_tid_stats(peer);
2813
2814 if (!IS_MLO_DP_LINK_PEER(peer)) {
2815 per_pkt_stats = &txrx_peer->stats[0].per_pkt_stats;
2816 dp_update_vdev_basic_stats(txrx_peer, vdev_stats);
2817 DP_UPDATE_PER_PKT_STATS(vdev_stats, per_pkt_stats);
2818 }
2819
2820 if (IS_MLO_DP_LINK_PEER(peer)) {
2821 link_id = dp_get_peer_hw_link_id(soc, pdev);
2822 if (link_id > 0) {
2823 per_pkt_stats =
2824 &txrx_peer->stats[link_id].per_pkt_stats;
2825 DP_UPDATE_PER_PKT_STATS(vdev_stats, per_pkt_stats);
2826 }
2827 }
2828
2829 link_stats:
2830 dp_monitor_peer_get_stats(soc, peer, vdev_stats, UPDATE_VDEV_STATS_MLD);
2831 }
2832
2833 static
dp_get_vdev_stats_for_unmap_peer_be(struct dp_vdev * vdev,struct dp_peer * peer)2834 void dp_get_vdev_stats_for_unmap_peer_be(struct dp_vdev *vdev,
2835 struct dp_peer *peer)
2836 {
2837
2838 if (IS_DP_LEGACY_PEER(peer))
2839 dp_get_vdev_stats_for_unmap_peer_legacy(vdev, peer);
2840 else
2841 dp_get_vdev_stats_for_unmap_peer_mlo(vdev, peer);
2842 }
2843 #else
dp_txrx_set_mlo_mcast_primary_vdev_param_be(struct dp_vdev * vdev,cdp_config_param_type val)2844 static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
2845 struct dp_vdev *vdev,
2846 cdp_config_param_type val)
2847 {
2848 struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
2849 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(
2850 be_vdev->vdev.pdev->soc);
2851
2852 be_vdev->mcast_primary = val.cdp_vdev_param_mcast_vdev;
2853 vdev->mlo_vdev = 1;
2854 hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
2855 vdev->vdev_id,
2856 HAL_TX_MCAST_CTRL_NO_SPECIAL);
2857
2858 if (be_vdev->mcast_primary) {
2859 struct cdp_txrx_peer_params_update params = {0};
2860
2861 dp_mlo_iter_ptnr_vdev(be_soc, be_vdev,
2862 dp_mlo_mcast_reset_pri_mcast,
2863 (void *)&be_vdev->mcast_primary,
2864 DP_MOD_ID_TX_MCAST,
2865 DP_LINK_VDEV_ITER,
2866 DP_VDEV_ITERATE_SKIP_SELF);
2867
2868 params.chip_id = be_soc->mlo_chip_id;
2869 params.pdev_id = vdev->pdev->pdev_id;
2870 params.vdev_id = vdev->vdev_id;
2871 dp_wdi_event_handler(
2872 WDI_EVENT_MCAST_PRIMARY_UPDATE,
2873 vdev->pdev->soc,
2874 (void *)¶ms, CDP_INVALID_PEER,
2875 WDI_NO_VAL, params.pdev_id);
2876 }
2877 }
2878 #endif
2879
dp_txrx_reset_mlo_mcast_primary_vdev_param_be(struct dp_vdev * vdev,cdp_config_param_type val)2880 static void dp_txrx_reset_mlo_mcast_primary_vdev_param_be(
2881 struct dp_vdev *vdev,
2882 cdp_config_param_type val)
2883 {
2884 struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
2885
2886 be_vdev->mcast_primary = false;
2887 vdev->mlo_vdev = 0;
2888 hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
2889 vdev->vdev_id,
2890 HAL_TX_MCAST_CTRL_FW_EXCEPTION);
2891 }
2892
2893 /**
2894 * dp_txrx_get_vdev_mcast_param_be() - Target specific ops for getting vdev
2895 * params related to multicast
2896 * @soc: DP soc handle
2897 * @vdev: pointer to vdev structure
2898 * @val: buffer address
2899 *
2900 * Return: QDF_STATUS
2901 */
2902 static
dp_txrx_get_vdev_mcast_param_be(struct dp_soc * soc,struct dp_vdev * vdev,cdp_config_param_type * val)2903 QDF_STATUS dp_txrx_get_vdev_mcast_param_be(struct dp_soc *soc,
2904 struct dp_vdev *vdev,
2905 cdp_config_param_type *val)
2906 {
2907 struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
2908
2909 if (be_vdev->mcast_primary)
2910 val->cdp_vdev_param_mcast_vdev = true;
2911 else
2912 val->cdp_vdev_param_mcast_vdev = false;
2913
2914 return QDF_STATUS_SUCCESS;
2915 }
2916 #else
dp_txrx_set_mlo_mcast_primary_vdev_param_be(struct dp_vdev * vdev,cdp_config_param_type val)2917 static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
2918 struct dp_vdev *vdev,
2919 cdp_config_param_type val)
2920 {
2921 }
2922
dp_txrx_reset_mlo_mcast_primary_vdev_param_be(struct dp_vdev * vdev,cdp_config_param_type val)2923 static void dp_txrx_reset_mlo_mcast_primary_vdev_param_be(
2924 struct dp_vdev *vdev,
2925 cdp_config_param_type val)
2926 {
2927 }
2928
2929 static
dp_txrx_get_vdev_mcast_param_be(struct dp_soc * soc,struct dp_vdev * vdev,cdp_config_param_type * val)2930 QDF_STATUS dp_txrx_get_vdev_mcast_param_be(struct dp_soc *soc,
2931 struct dp_vdev *vdev,
2932 cdp_config_param_type *val)
2933 {
2934 return QDF_STATUS_SUCCESS;
2935 }
2936
2937 static
dp_get_vdev_stats_for_unmap_peer_be(struct dp_vdev * vdev,struct dp_peer * peer)2938 void dp_get_vdev_stats_for_unmap_peer_be(struct dp_vdev *vdev,
2939 struct dp_peer *peer)
2940 {
2941 }
2942 #endif
2943
2944 #ifdef DP_TX_IMPLICIT_RBM_MAPPING
dp_tx_implicit_rbm_set_be(struct dp_soc * soc,uint8_t tx_ring_id,uint8_t bm_id)2945 static void dp_tx_implicit_rbm_set_be(struct dp_soc *soc,
2946 uint8_t tx_ring_id,
2947 uint8_t bm_id)
2948 {
2949 hal_tx_config_rbm_mapping_be(soc->hal_soc,
2950 soc->tcl_data_ring[tx_ring_id].hal_srng,
2951 bm_id);
2952 }
2953 #else
dp_tx_implicit_rbm_set_be(struct dp_soc * soc,uint8_t tx_ring_id,uint8_t bm_id)2954 static void dp_tx_implicit_rbm_set_be(struct dp_soc *soc,
2955 uint8_t tx_ring_id,
2956 uint8_t bm_id)
2957 {
2958 }
2959 #endif
2960
2961 /**
2962 * dp_txrx_set_vdev_param_be() - Target specific ops while setting vdev params
2963 * @soc: DP soc handle
2964 * @vdev: pointer to vdev structure
2965 * @param: parameter type to get value
2966 * @val: value
2967 *
2968 * Return: QDF_STATUS
2969 */
2970 static
dp_txrx_set_vdev_param_be(struct dp_soc * soc,struct dp_vdev * vdev,enum cdp_vdev_param_type param,cdp_config_param_type val)2971 QDF_STATUS dp_txrx_set_vdev_param_be(struct dp_soc *soc,
2972 struct dp_vdev *vdev,
2973 enum cdp_vdev_param_type param,
2974 cdp_config_param_type val)
2975 {
2976 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
2977 struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
2978
2979 switch (param) {
2980 case CDP_TX_ENCAP_TYPE:
2981 case CDP_UPDATE_DSCP_TO_TID_MAP:
2982 case CDP_UPDATE_TDLS_FLAGS:
2983 dp_tx_update_bank_profile(be_soc, be_vdev);
2984 dp_tx_update_vp_profile(be_soc, be_vdev);
2985 break;
2986 case CDP_ENABLE_CIPHER:
2987 if (vdev->tx_encap_type == htt_cmn_pkt_type_raw)
2988 dp_tx_update_bank_profile(be_soc, be_vdev);
2989 break;
2990 case CDP_SET_MCAST_VDEV:
2991 dp_txrx_set_mlo_mcast_primary_vdev_param_be(vdev, val);
2992 break;
2993 case CDP_RESET_MLO_MCAST_VDEV:
2994 dp_txrx_reset_mlo_mcast_primary_vdev_param_be(vdev, val);
2995 break;
2996 default:
2997 dp_warn("invalid param %d", param);
2998 break;
2999 }
3000
3001 return QDF_STATUS_SUCCESS;
3002 }
3003
3004 #ifdef WLAN_FEATURE_11BE_MLO
3005 #ifdef DP_USE_REDUCED_PEER_ID_FIELD_WIDTH
3006 static inline void
dp_soc_max_peer_id_set(struct dp_soc * soc)3007 dp_soc_max_peer_id_set(struct dp_soc *soc)
3008 {
3009 soc->peer_id_shift = dp_log2_ceil(soc->max_peers);
3010 soc->peer_id_mask = (1 << soc->peer_id_shift) - 1;
3011 /*
3012 * Double the peers since we use ML indication bit
3013 * alongwith peer_id to find peers.
3014 */
3015 soc->max_peer_id = 1 << (soc->peer_id_shift + 1);
3016 }
3017 #else
3018 static inline void
dp_soc_max_peer_id_set(struct dp_soc * soc)3019 dp_soc_max_peer_id_set(struct dp_soc *soc)
3020 {
3021 soc->max_peer_id =
3022 (1 << (HTT_RX_PEER_META_DATA_V1_ML_PEER_VALID_S + 1)) - 1;
3023 }
3024 #endif /* DP_USE_REDUCED_PEER_ID_FIELD_WIDTH */
3025 #else
3026 static inline void
dp_soc_max_peer_id_set(struct dp_soc * soc)3027 dp_soc_max_peer_id_set(struct dp_soc *soc)
3028 {
3029 soc->max_peer_id = soc->max_peers;
3030 }
3031 #endif /* WLAN_FEATURE_11BE_MLO */
3032
dp_peer_map_detach_be(struct dp_soc * soc)3033 static void dp_peer_map_detach_be(struct dp_soc *soc)
3034 {
3035 if (soc->host_ast_db_enable)
3036 dp_peer_ast_hash_detach(soc);
3037 }
3038
dp_peer_map_attach_be(struct dp_soc * soc)3039 static QDF_STATUS dp_peer_map_attach_be(struct dp_soc *soc)
3040 {
3041 QDF_STATUS status;
3042
3043 if (soc->host_ast_db_enable) {
3044 status = dp_peer_ast_hash_attach(soc);
3045 if (QDF_IS_STATUS_ERROR(status))
3046 return status;
3047 }
3048
3049 dp_soc_max_peer_id_set(soc);
3050
3051 return QDF_STATUS_SUCCESS;
3052 }
3053
3054 #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_DP_MLO_DEV_CTX)
3055
dp_mlo_dev_ctxt_list_attach(dp_mlo_dev_obj_t mlo_dev_obj)3056 void dp_mlo_dev_ctxt_list_attach(dp_mlo_dev_obj_t mlo_dev_obj)
3057 {
3058 TAILQ_INIT(&mlo_dev_obj->mlo_dev_list);
3059 qdf_spinlock_create(&mlo_dev_obj->mlo_dev_list_lock);
3060 }
3061
dp_mlo_dev_ctxt_list_detach(dp_mlo_dev_obj_t mlo_dev_obj)3062 void dp_mlo_dev_ctxt_list_detach(dp_mlo_dev_obj_t mlo_dev_obj)
3063 {
3064 struct dp_mlo_dev_ctxt *mld_ctxt = NULL;
3065 struct dp_mlo_dev_ctxt *tmp_mld_ctxt = NULL;
3066
3067 if (!TAILQ_EMPTY(&mlo_dev_obj->mlo_dev_list)) {
3068 dp_alert("DP MLO dev list is not empty");
3069 qdf_spin_lock_bh(&mlo_dev_obj->mlo_dev_list_lock);
3070 TAILQ_FOREACH_SAFE(mld_ctxt, &mlo_dev_obj->mlo_dev_list,
3071 ml_dev_list_elem, tmp_mld_ctxt) {
3072 if (mld_ctxt) {
3073 dp_alert("MLD MAC " QDF_MAC_ADDR_FMT " ",
3074 QDF_MAC_ADDR_REF(
3075 &mld_ctxt->mld_mac_addr.raw));
3076 qdf_mem_free(mld_ctxt);
3077 }
3078 }
3079 qdf_spin_unlock_bh(&mlo_dev_obj->mlo_dev_list_lock);
3080 }
3081
3082 qdf_spinlock_destroy(&mlo_dev_obj->mlo_dev_list_lock);
3083 }
3084
dp_mlo_dev_ctxt_unref_delete(struct dp_mlo_dev_ctxt * mlo_dev_ctxt,enum dp_mod_id mod_id)3085 void dp_mlo_dev_ctxt_unref_delete(struct dp_mlo_dev_ctxt *mlo_dev_ctxt,
3086 enum dp_mod_id mod_id)
3087 {
3088 QDF_ASSERT(qdf_atomic_dec_return(&mlo_dev_ctxt->mod_refs[mod_id]) >= 0);
3089
3090 /* Return if this is not the last reference*/
3091 if (!qdf_atomic_dec_and_test(&mlo_dev_ctxt->ref_cnt))
3092 return;
3093
3094 QDF_ASSERT(mlo_dev_ctxt->ref_delete_pending);
3095 qdf_spinlock_destroy(&mlo_dev_ctxt->vdev_list_lock);
3096 qdf_mem_free(mlo_dev_ctxt);
3097 }
3098
dp_mlo_dev_get_ref(struct dp_mlo_dev_ctxt * mlo_dev_ctxt,enum dp_mod_id mod_id)3099 QDF_STATUS dp_mlo_dev_get_ref(struct dp_mlo_dev_ctxt *mlo_dev_ctxt,
3100 enum dp_mod_id mod_id)
3101 {
3102 if (!qdf_atomic_inc_return(&mlo_dev_ctxt->ref_cnt))
3103 return QDF_STATUS_E_INVAL;
3104
3105 qdf_atomic_inc(&mlo_dev_ctxt->mod_refs[mod_id]);
3106
3107 return QDF_STATUS_SUCCESS;
3108 }
3109
3110 struct dp_mlo_dev_ctxt *
dp_get_mlo_dev_ctx_by_mld_mac_addr(struct dp_soc_be * be_soc,uint8_t * mldaddr,enum dp_mod_id mod_id)3111 dp_get_mlo_dev_ctx_by_mld_mac_addr(struct dp_soc_be *be_soc,
3112 uint8_t *mldaddr,
3113 enum dp_mod_id mod_id)
3114 {
3115 struct dp_mlo_dev_ctxt *mld_cur = NULL;
3116 struct dp_mlo_dev_ctxt *tmp_mld_cur = NULL;
3117 dp_mlo_dev_obj_t mlo_dev_obj;
3118
3119 mlo_dev_obj = dp_get_mlo_dev_list_obj(be_soc);
3120 if (!mlo_dev_obj) {
3121 dp_err("DP Global MLO Context is NULL");
3122 return NULL;
3123 }
3124
3125 /*
3126 * Iterate through ml dev list, till mldaddr matches with
3127 * entry of list
3128 */
3129 qdf_spin_lock_bh(&mlo_dev_obj->mlo_dev_list_lock);
3130 TAILQ_FOREACH_SAFE(mld_cur, &mlo_dev_obj->mlo_dev_list,
3131 ml_dev_list_elem, tmp_mld_cur) {
3132 if (!qdf_mem_cmp(&mld_cur->mld_mac_addr.raw, mldaddr,
3133 QDF_MAC_ADDR_SIZE)) {
3134 if (dp_mlo_dev_get_ref(mld_cur, mod_id)
3135 == QDF_STATUS_SUCCESS) {
3136 qdf_spin_unlock_bh(&mlo_dev_obj->mlo_dev_list_lock);
3137 return mld_cur;
3138 }
3139 }
3140 }
3141 qdf_spin_unlock_bh(&mlo_dev_obj->mlo_dev_list_lock);
3142 return NULL;
3143 }
3144
3145 /**
3146 * dp_mlo_dev_ctxt_create() - Allocate DP MLO dev context
3147 * @soc_hdl: SOC handle
3148 * @mld_mac_addr: MLD MAC address
3149 *
3150 * Return: QDF_STATUS
3151 */
3152 static inline
dp_mlo_dev_ctxt_create(struct cdp_soc_t * soc_hdl,uint8_t * mld_mac_addr)3153 QDF_STATUS dp_mlo_dev_ctxt_create(struct cdp_soc_t *soc_hdl,
3154 uint8_t *mld_mac_addr)
3155 {
3156 struct dp_mlo_dev_ctxt *mlo_dev_ctxt = NULL;
3157 struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
3158 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
3159 dp_mlo_dev_obj_t mlo_dev_obj;
3160
3161 mlo_dev_obj = dp_get_mlo_dev_list_obj(be_soc);
3162 if (!mlo_dev_obj) {
3163 dp_err("DP Global MLO Context is NULL");
3164 return QDF_STATUS_E_FAILURE;
3165 }
3166
3167 /* check if MLO dev ctx already available */
3168 mlo_dev_ctxt = dp_get_mlo_dev_ctx_by_mld_mac_addr(be_soc,
3169 mld_mac_addr,
3170 DP_MOD_ID_MLO_DEV);
3171 if (mlo_dev_ctxt) {
3172 dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
3173 /* assert if we get two create request for same MLD MAC */
3174 qdf_assert_always(0);
3175 }
3176
3177 /* Allocate MLO dev ctx */
3178 mlo_dev_ctxt = qdf_mem_malloc(sizeof(struct dp_mlo_dev_ctxt));
3179
3180 if (!mlo_dev_ctxt) {
3181 dp_err("Failed to allocate DP MLO Dev Context");
3182 return QDF_STATUS_E_NOMEM;
3183 }
3184
3185 qdf_copy_macaddr((struct qdf_mac_addr *)&mlo_dev_ctxt->mld_mac_addr.raw[0],
3186 (struct qdf_mac_addr *)mld_mac_addr);
3187
3188 qdf_mem_set(mlo_dev_ctxt->vdev_list,
3189 WLAN_MAX_MLO_CHIPS * WLAN_MAX_MLO_LINKS_PER_SOC,
3190 CDP_INVALID_VDEV_ID);
3191 qdf_mem_set(mlo_dev_ctxt->bridge_vdev,
3192 WLAN_MAX_MLO_CHIPS * WLAN_MAX_MLO_LINKS_PER_SOC,
3193 CDP_INVALID_VDEV_ID);
3194 mlo_dev_ctxt->seq_num = 0;
3195
3196 /* Add mlo_dev_ctxt to the global DP MLO list */
3197 qdf_spin_lock_bh(&mlo_dev_obj->mlo_dev_list_lock);
3198 TAILQ_INSERT_TAIL(&mlo_dev_obj->mlo_dev_list,
3199 mlo_dev_ctxt, ml_dev_list_elem);
3200 qdf_spin_unlock_bh(&mlo_dev_obj->mlo_dev_list_lock);
3201
3202 /* Ref for MLO ctxt saved in global list */
3203 dp_mlo_dev_get_ref(mlo_dev_ctxt, DP_MOD_ID_CONFIG);
3204
3205 mlo_dev_ctxt->ref_delete_pending = 0;
3206 qdf_spinlock_create(&mlo_dev_ctxt->vdev_list_lock);
3207 return QDF_STATUS_SUCCESS;
3208 }
3209
3210 /**
3211 * dp_mlo_dev_ctxt_destroy() - Destroy DP MLO dev context
3212 * @soc_hdl: SOC handle
3213 * @mld_mac_addr: MLD MAC address
3214 *
3215 * Return: QDF_STATUS
3216 */
3217 static inline
dp_mlo_dev_ctxt_destroy(struct cdp_soc_t * soc_hdl,uint8_t * mld_mac_addr)3218 QDF_STATUS dp_mlo_dev_ctxt_destroy(struct cdp_soc_t *soc_hdl,
3219 uint8_t *mld_mac_addr)
3220 {
3221 struct dp_mlo_dev_ctxt *mlo_dev_ctxt = NULL;
3222 struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
3223 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
3224 dp_mlo_dev_obj_t mlo_dev_obj;
3225
3226 mlo_dev_obj = dp_get_mlo_dev_list_obj(be_soc);
3227 if (!mlo_dev_obj) {
3228 dp_err("DP Global MLO Context is NULL");
3229 return QDF_STATUS_E_INVAL;
3230 }
3231
3232 /* GET mlo_dev_ctxt from the global list */
3233 mlo_dev_ctxt = dp_get_mlo_dev_ctx_by_mld_mac_addr(be_soc,
3234 mld_mac_addr,
3235 DP_MOD_ID_MLO_DEV);
3236 if (!mlo_dev_ctxt) {
3237 dp_err("Failed to get DP MLO Dev Context by MLD mac addr");
3238 return QDF_STATUS_E_INVAL;
3239 }
3240
3241 if (mlo_dev_ctxt->vdev_count)
3242 dp_alert("deleting MLO dev ctxt with non zero vdev count");
3243
3244 qdf_spin_lock_bh(&mlo_dev_obj->mlo_dev_list_lock);
3245 TAILQ_REMOVE(&mlo_dev_obj->mlo_dev_list,
3246 mlo_dev_ctxt, ml_dev_list_elem);
3247 qdf_spin_unlock_bh(&mlo_dev_obj->mlo_dev_list_lock);
3248
3249 /* unref for MLO ctxt ref released from Global list */
3250 dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_CONFIG);
3251
3252 mlo_dev_ctxt->ref_delete_pending = 1;
3253 dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
3254 return QDF_STATUS_SUCCESS;
3255 }
3256
3257 /**
3258 * dp_mlo_dev_ctxt_vdev_attach() - Attach vdev to DP MLO dev context
3259 * @soc_hdl: SOC handle
3260 * @vdev_id: vdev id for the vdev to be attached
3261 * @mld_mac_addr: MLD MAC address
3262 *
3263 * Return: QDF_STATUS
3264 */
3265 static inline
dp_mlo_dev_ctxt_vdev_attach(struct cdp_soc_t * soc_hdl,uint8_t vdev_id,uint8_t * mld_mac_addr)3266 QDF_STATUS dp_mlo_dev_ctxt_vdev_attach(struct cdp_soc_t *soc_hdl,
3267 uint8_t vdev_id,
3268 uint8_t *mld_mac_addr)
3269 {
3270 struct dp_mlo_dev_ctxt *mlo_dev_ctxt = NULL;
3271 struct dp_vdev *vdev = NULL;
3272 struct dp_vdev_be *be_vdev = NULL;
3273 struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
3274 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
3275
3276 vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_CDP);
3277 if (!vdev)
3278 return QDF_STATUS_E_FAILURE;
3279 be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
3280
3281 /* GET mlo_dev_ctxt from the global list */
3282 mlo_dev_ctxt = dp_get_mlo_dev_ctx_by_mld_mac_addr(be_soc,
3283 mld_mac_addr,
3284 DP_MOD_ID_MLO_DEV);
3285 if (!mlo_dev_ctxt) {
3286 dp_err("Failed to get MLO ctxt for " QDF_MAC_ADDR_FMT "",
3287 QDF_MAC_ADDR_REF(mld_mac_addr));
3288 dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
3289 return QDF_STATUS_E_INVAL;
3290 }
3291
3292 dp_attach_vdev_list_in_mlo_dev_ctxt(be_soc, vdev, mlo_dev_ctxt);
3293 be_vdev->mlo_dev_ctxt = mlo_dev_ctxt;
3294
3295 /* ref for holding MLO ctxt in be_vdev */
3296 dp_mlo_dev_get_ref(mlo_dev_ctxt, DP_MOD_ID_CHILD);
3297
3298 /* unref for mlo ctxt taken at the start of this function */
3299 dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
3300 dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
3301
3302 return QDF_STATUS_SUCCESS;
3303 }
3304
3305 /**
3306 * dp_mlo_dev_ctxt_vdev_detach() - Detach vdev from DP MLO dev context
3307 * @soc_hdl: SOC handle
3308 * @vdev_id: vdev id for the vdev to be attached
3309 * @mld_mac_addr: MLD MAC address
3310 *
3311 * Return: QDF_STATUS
3312 */
3313 static inline
dp_mlo_dev_ctxt_vdev_detach(struct cdp_soc_t * soc_hdl,uint8_t vdev_id,uint8_t * mld_mac_addr)3314 QDF_STATUS dp_mlo_dev_ctxt_vdev_detach(struct cdp_soc_t *soc_hdl,
3315 uint8_t vdev_id,
3316 uint8_t *mld_mac_addr)
3317 {
3318 struct dp_vdev *vdev = NULL;
3319 struct dp_vdev_be *be_vdev = NULL;
3320 struct dp_mlo_dev_ctxt *mlo_dev_ctxt = NULL;
3321 struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
3322 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
3323
3324 vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_CDP);
3325 if (!vdev)
3326 return QDF_STATUS_E_FAILURE;
3327
3328 be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
3329
3330 /* GET mlo_dev_ctxt from the global list */
3331 mlo_dev_ctxt = dp_get_mlo_dev_ctx_by_mld_mac_addr(be_soc,
3332 mld_mac_addr,
3333 DP_MOD_ID_MLO_DEV);
3334
3335 if (!mlo_dev_ctxt) {
3336 dp_err("Failed to get DP MLO Dev Context by MLD mac addr");
3337 if (!be_vdev->mlo_dev_ctxt) {
3338 dp_err("Failed to get DP MLO Dev Context from vdev");
3339 dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
3340 return QDF_STATUS_E_INVAL;
3341 }
3342 mlo_dev_ctxt = be_vdev->mlo_dev_ctxt;
3343 dp_mlo_dev_get_ref(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
3344 }
3345
3346 if (dp_detach_vdev_list_in_mlo_dev_ctxt(be_soc, vdev, mlo_dev_ctxt)
3347 != QDF_STATUS_SUCCESS) {
3348 dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
3349 dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
3350 return QDF_STATUS_SUCCESS;
3351 }
3352
3353 be_vdev->mlo_dev_ctxt = NULL;
3354
3355 /* Save vdev stats in MLO dev ctx */
3356 dp_update_mlo_mld_vdev_ctxt_stats(&mlo_dev_ctxt->stats, &vdev->stats);
3357
3358 /* reset vdev stats to zero */
3359 qdf_mem_set(&vdev->stats, sizeof(struct dp_vdev_stats), 0);
3360
3361 /* unref for mlo ctxt removed from be_vdev*/
3362 dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_CHILD);
3363
3364 /* unref for mlo ctxt taken at the start of this function */
3365 dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
3366
3367 dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
3368 return QDF_STATUS_SUCCESS;
3369 }
3370 #else
dp_mlo_dev_ctxt_list_attach(dp_mlo_dev_obj_t mlo_dev_obj)3371 void dp_mlo_dev_ctxt_list_attach(dp_mlo_dev_obj_t mlo_dev_obj)
3372 {
3373 }
3374
dp_mlo_dev_ctxt_list_detach(dp_mlo_dev_obj_t mlo_dev_obj)3375 void dp_mlo_dev_ctxt_list_detach(dp_mlo_dev_obj_t mlo_dev_obj)
3376 {
3377 }
3378
3379 static inline
dp_mlo_dev_ctxt_create(struct cdp_soc_t * soc_hdl,uint8_t * mld_mac_addr)3380 QDF_STATUS dp_mlo_dev_ctxt_create(struct cdp_soc_t *soc_hdl,
3381 uint8_t *mld_mac_addr)
3382 {
3383 return QDF_STATUS_SUCCESS;
3384 }
3385
3386 static inline
dp_mlo_dev_ctxt_destroy(struct cdp_soc_t * soc_hdl,uint8_t * mld_mac_addr)3387 QDF_STATUS dp_mlo_dev_ctxt_destroy(struct cdp_soc_t *soc_hdl,
3388 uint8_t *mld_mac_addr)
3389 {
3390 return QDF_STATUS_SUCCESS;
3391 }
3392
3393 static inline
dp_mlo_dev_ctxt_vdev_attach(struct cdp_soc_t * soc_hdl,uint8_t vdev_id,uint8_t * mld_mac_addr)3394 QDF_STATUS dp_mlo_dev_ctxt_vdev_attach(struct cdp_soc_t *soc_hdl,
3395 uint8_t vdev_id,
3396 uint8_t *mld_mac_addr)
3397 {
3398 return QDF_STATUS_SUCCESS;
3399 }
3400
3401 static inline
dp_mlo_dev_ctxt_vdev_detach(struct cdp_soc_t * soc_hdl,uint8_t vdev_id,uint8_t * mld_mac_addr)3402 QDF_STATUS dp_mlo_dev_ctxt_vdev_detach(struct cdp_soc_t *soc_hdl,
3403 uint8_t vdev_id,
3404 uint8_t *mld_mac_addr)
3405 {
3406 return QDF_STATUS_SUCCESS;
3407 }
3408 #endif /* WLAN_DP_MLO_DEV_CTX */
3409
3410 #ifdef WLAN_FEATURE_11BE_MLO
3411 #ifdef WLAN_MCAST_MLO
3412 static inline void
dp_initialize_arch_ops_be_mcast_mlo(struct dp_arch_ops * arch_ops)3413 dp_initialize_arch_ops_be_mcast_mlo(struct dp_arch_ops *arch_ops)
3414 {
3415 arch_ops->dp_tx_mcast_handler = dp_tx_mlo_mcast_handler_be;
3416 arch_ops->dp_rx_mcast_handler = dp_rx_mlo_igmp_handler;
3417 arch_ops->dp_tx_is_mcast_primary = dp_tx_mlo_is_mcast_primary_be;
3418 }
3419 #else /* WLAN_MCAST_MLO */
3420 static inline void
dp_initialize_arch_ops_be_mcast_mlo(struct dp_arch_ops * arch_ops)3421 dp_initialize_arch_ops_be_mcast_mlo(struct dp_arch_ops *arch_ops)
3422 {
3423 }
3424 #endif /* WLAN_MCAST_MLO */
3425
3426 #ifdef WLAN_MLO_MULTI_CHIP
3427 static inline void
dp_initialize_arch_ops_be_mlo_multi_chip(struct dp_arch_ops * arch_ops)3428 dp_initialize_arch_ops_be_mlo_multi_chip(struct dp_arch_ops *arch_ops)
3429 {
3430 arch_ops->dp_partner_chips_map = dp_mlo_partner_chips_map;
3431 arch_ops->dp_partner_chips_unmap = dp_mlo_partner_chips_unmap;
3432 arch_ops->dp_soc_get_by_idle_bm_id = dp_soc_get_by_idle_bm_id;
3433 arch_ops->dp_get_soc_by_chip_id = dp_get_soc_by_chip_id_be;
3434 arch_ops->dp_mlo_print_ptnr_info = dp_mlo_debug_print_ptnr_info;
3435 arch_ops->dp_get_interface_stats = dp_get_interface_stats_be;
3436 arch_ops->mlo_get_chip_id = dp_mlo_get_chip_id;
3437 arch_ops->mlo_link_peer_find_hash_find_by_chip_id =
3438 dp_mlo_link_peer_hash_find_by_chip_id;
3439 }
3440 #else
3441 static inline void
dp_initialize_arch_ops_be_mlo_multi_chip(struct dp_arch_ops * arch_ops)3442 dp_initialize_arch_ops_be_mlo_multi_chip(struct dp_arch_ops *arch_ops)
3443 {
3444 }
3445 #endif
3446
3447 static inline void
dp_initialize_arch_ops_be_mlo(struct dp_arch_ops * arch_ops)3448 dp_initialize_arch_ops_be_mlo(struct dp_arch_ops *arch_ops)
3449 {
3450 dp_initialize_arch_ops_be_mcast_mlo(arch_ops);
3451 dp_initialize_arch_ops_be_mlo_multi_chip(arch_ops);
3452 arch_ops->mlo_peer_find_hash_detach =
3453 dp_mlo_peer_find_hash_detach_wrapper;
3454 arch_ops->mlo_peer_find_hash_attach =
3455 dp_mlo_peer_find_hash_attach_wrapper;
3456 arch_ops->mlo_peer_find_hash_add = dp_mlo_peer_find_hash_add_be;
3457 arch_ops->mlo_peer_find_hash_remove = dp_mlo_peer_find_hash_remove_be;
3458 arch_ops->mlo_peer_find_hash_find = dp_mlo_peer_find_hash_find_be;
3459 arch_ops->get_hw_link_id = dp_get_hw_link_id_be;
3460 }
3461
3462 static struct cdp_cmn_mlo_ops dp_cmn_mlo_ops = {
3463 .mlo_dev_ctxt_create = dp_mlo_dev_ctxt_create,
3464 .mlo_dev_ctxt_attach = dp_mlo_dev_ctxt_vdev_attach,
3465 .mlo_dev_ctxt_detach = dp_mlo_dev_ctxt_vdev_detach,
3466 .mlo_dev_ctxt_destroy = dp_mlo_dev_ctxt_destroy,
3467 };
3468
dp_soc_initialize_cdp_cmn_mlo_ops(struct dp_soc * soc)3469 void dp_soc_initialize_cdp_cmn_mlo_ops(struct dp_soc *soc)
3470 {
3471 soc->cdp_soc.ops->cmn_mlo_ops = &dp_cmn_mlo_ops;
3472 }
3473 #else /* WLAN_FEATURE_11BE_MLO */
3474 static inline void
dp_initialize_arch_ops_be_mlo(struct dp_arch_ops * arch_ops)3475 dp_initialize_arch_ops_be_mlo(struct dp_arch_ops *arch_ops)
3476 {
3477 }
3478
dp_soc_initialize_cdp_cmn_mlo_ops(struct dp_soc * soc)3479 void dp_soc_initialize_cdp_cmn_mlo_ops(struct dp_soc *soc)
3480 {
3481 }
3482 #endif /* WLAN_FEATURE_11BE_MLO */
3483
3484 #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
3485 #define DP_LMAC_PEER_ID_MSB_LEGACY 2
3486 #define DP_LMAC_PEER_ID_MSB_MLO 3
3487
dp_peer_get_reo_hash_be(struct dp_vdev * vdev,struct cdp_peer_setup_info * setup_info,enum cdp_host_reo_dest_ring * reo_dest,bool * hash_based,uint8_t * lmac_peer_id_msb)3488 static void dp_peer_get_reo_hash_be(struct dp_vdev *vdev,
3489 struct cdp_peer_setup_info *setup_info,
3490 enum cdp_host_reo_dest_ring *reo_dest,
3491 bool *hash_based,
3492 uint8_t *lmac_peer_id_msb)
3493 {
3494 struct dp_soc *soc = vdev->pdev->soc;
3495 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
3496
3497 if (!be_soc->mlo_enabled)
3498 return dp_vdev_get_default_reo_hash(vdev, reo_dest,
3499 hash_based);
3500
3501 *hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
3502 *reo_dest = vdev->pdev->reo_dest;
3503
3504 /* Not a ML link peer use non-mlo */
3505 if (!setup_info) {
3506 *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_LEGACY;
3507 return;
3508 }
3509
3510 /* For STA ML VAP we do not have num links info at this point
3511 * use MLO case always
3512 */
3513 if (vdev->opmode == wlan_op_mode_sta) {
3514 *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_MLO;
3515 return;
3516 }
3517
3518 /* For AP ML VAP consider the peer as ML only it associates with
3519 * multiple links
3520 */
3521 if (setup_info->num_links == 1) {
3522 *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_LEGACY;
3523 return;
3524 }
3525
3526 *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_MLO;
3527 }
3528
dp_reo_remap_config_be(struct dp_soc * soc,uint32_t * remap0,uint32_t * remap1,uint32_t * remap2)3529 static bool dp_reo_remap_config_be(struct dp_soc *soc,
3530 uint32_t *remap0,
3531 uint32_t *remap1,
3532 uint32_t *remap2)
3533 {
3534 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
3535 uint32_t reo_config = wlan_cfg_get_reo_rings_mapping(soc->wlan_cfg_ctx);
3536 uint32_t reo_mlo_config =
3537 wlan_cfg_mlo_rx_ring_map_get(soc->wlan_cfg_ctx);
3538
3539 if (!be_soc->mlo_enabled)
3540 return dp_reo_remap_config(soc, remap0, remap1, remap2);
3541
3542 *remap0 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_mlo_config);
3543 *remap1 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_config);
3544 *remap2 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_mlo_config);
3545
3546 return true;
3547 }
3548 #else
dp_peer_get_reo_hash_be(struct dp_vdev * vdev,struct cdp_peer_setup_info * setup_info,enum cdp_host_reo_dest_ring * reo_dest,bool * hash_based,uint8_t * lmac_peer_id_msb)3549 static void dp_peer_get_reo_hash_be(struct dp_vdev *vdev,
3550 struct cdp_peer_setup_info *setup_info,
3551 enum cdp_host_reo_dest_ring *reo_dest,
3552 bool *hash_based,
3553 uint8_t *lmac_peer_id_msb)
3554 {
3555 dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
3556 }
3557
dp_reo_remap_config_be(struct dp_soc * soc,uint32_t * remap0,uint32_t * remap1,uint32_t * remap2)3558 static bool dp_reo_remap_config_be(struct dp_soc *soc,
3559 uint32_t *remap0,
3560 uint32_t *remap1,
3561 uint32_t *remap2)
3562 {
3563 return dp_reo_remap_config(soc, remap0, remap1, remap2);
3564 }
3565 #endif
3566
3567 #ifdef CONFIG_MLO_SINGLE_DEV
3568 static inline
dp_initialize_arch_ops_be_single_dev(struct dp_arch_ops * arch_ops)3569 void dp_initialize_arch_ops_be_single_dev(struct dp_arch_ops *arch_ops)
3570 {
3571 arch_ops->dp_tx_mlo_mcast_send = dp_tx_mlo_mcast_send_be;
3572 }
3573 #else
3574 static inline
dp_initialize_arch_ops_be_single_dev(struct dp_arch_ops * arch_ops)3575 void dp_initialize_arch_ops_be_single_dev(struct dp_arch_ops *arch_ops)
3576 {
3577 }
3578 #endif
3579
3580 #ifdef IPA_OFFLOAD
dp_ipa_get_bank_id_be(struct dp_soc * soc)3581 static int8_t dp_ipa_get_bank_id_be(struct dp_soc *soc)
3582 {
3583 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
3584
3585 return be_soc->ipa_bank_id;
3586 }
3587
3588 #ifdef QCA_IPA_LL_TX_FLOW_CONTROL
dp_ipa_get_wdi_version_be(uint8_t * wdi_ver)3589 static void dp_ipa_get_wdi_version_be(uint8_t *wdi_ver)
3590 {
3591 *wdi_ver = IPA_WDI_4;
3592 }
3593 #else
dp_ipa_get_wdi_version_be(uint8_t * wdi_ver)3594 static inline void dp_ipa_get_wdi_version_be(uint8_t *wdi_ver)
3595 {
3596 }
3597 #endif
3598
dp_initialize_arch_ops_be_ipa(struct dp_arch_ops * arch_ops)3599 static inline void dp_initialize_arch_ops_be_ipa(struct dp_arch_ops *arch_ops)
3600 {
3601 arch_ops->ipa_get_bank_id = dp_ipa_get_bank_id_be;
3602 arch_ops->ipa_get_wdi_ver = dp_ipa_get_wdi_version_be;
3603 }
3604 #else /* !IPA_OFFLOAD */
dp_initialize_arch_ops_be_ipa(struct dp_arch_ops * arch_ops)3605 static inline void dp_initialize_arch_ops_be_ipa(struct dp_arch_ops *arch_ops)
3606 {
3607 }
3608 #endif /* IPA_OFFLOAD */
3609
dp_initialize_arch_ops_be(struct dp_arch_ops * arch_ops)3610 void dp_initialize_arch_ops_be(struct dp_arch_ops *arch_ops)
3611 {
3612 #ifndef QCA_HOST_MODE_WIFI_DISABLED
3613 arch_ops->tx_hw_enqueue = dp_tx_hw_enqueue_be;
3614 arch_ops->dp_rx_process = dp_rx_process_be;
3615 arch_ops->dp_tx_send_fast = dp_tx_fast_send_be;
3616 arch_ops->tx_comp_get_params_from_hal_desc =
3617 dp_tx_comp_get_params_from_hal_desc_be;
3618 arch_ops->dp_tx_process_htt_completion =
3619 dp_tx_process_htt_completion_be;
3620 arch_ops->dp_tx_desc_pool_alloc = dp_tx_desc_pool_alloc_be;
3621 arch_ops->dp_tx_desc_pool_free = dp_tx_desc_pool_free_be;
3622 arch_ops->dp_tx_desc_pool_init = dp_tx_desc_pool_init_be;
3623 arch_ops->dp_tx_desc_pool_deinit = dp_tx_desc_pool_deinit_be;
3624 arch_ops->dp_rx_desc_pool_init = dp_rx_desc_pool_init_be;
3625 arch_ops->dp_rx_desc_pool_deinit = dp_rx_desc_pool_deinit_be;
3626 arch_ops->dp_wbm_get_rx_desc_from_hal_desc =
3627 dp_wbm_get_rx_desc_from_hal_desc_be;
3628 arch_ops->dp_tx_compute_hw_delay = dp_tx_compute_tx_delay_be;
3629 arch_ops->dp_rx_wbm_err_reap_desc = dp_rx_wbm_err_reap_desc_be;
3630 arch_ops->dp_rx_null_q_desc_handle = dp_rx_null_q_desc_handle_be;
3631 #endif
3632 arch_ops->txrx_get_context_size = dp_get_context_size_be;
3633 #ifdef WIFI_MONITOR_SUPPORT
3634 arch_ops->txrx_get_mon_context_size = dp_mon_get_context_size_be;
3635 #endif
3636 arch_ops->dp_rx_desc_cookie_2_va =
3637 dp_rx_desc_cookie_2_va_be;
3638 arch_ops->dp_rx_intrabss_mcast_handler =
3639 dp_rx_intrabss_mcast_handler_be;
3640 arch_ops->dp_rx_word_mask_subscribe = dp_rx_word_mask_subscribe_be;
3641
3642 arch_ops->txrx_soc_attach = dp_soc_attach_be;
3643 arch_ops->txrx_soc_detach = dp_soc_detach_be;
3644 arch_ops->txrx_soc_init = dp_soc_init_be;
3645 arch_ops->txrx_soc_deinit = dp_soc_deinit_be_wrapper;
3646 arch_ops->txrx_soc_srng_alloc = dp_soc_srng_alloc_be;
3647 arch_ops->txrx_soc_srng_init = dp_soc_srng_init_be;
3648 arch_ops->txrx_soc_srng_deinit = dp_soc_srng_deinit_be;
3649 arch_ops->txrx_soc_srng_free = dp_soc_srng_free_be;
3650 arch_ops->txrx_pdev_attach = dp_pdev_attach_be;
3651 arch_ops->txrx_pdev_detach = dp_pdev_detach_be;
3652 arch_ops->txrx_vdev_attach = dp_vdev_attach_be;
3653 arch_ops->txrx_vdev_detach = dp_vdev_detach_be;
3654 arch_ops->txrx_peer_setup = dp_peer_setup_be;
3655 arch_ops->txrx_peer_map_attach = dp_peer_map_attach_be;
3656 arch_ops->txrx_peer_map_detach = dp_peer_map_detach_be;
3657 arch_ops->dp_rxdma_ring_sel_cfg = dp_rxdma_ring_sel_cfg_be;
3658 arch_ops->dp_rx_peer_metadata_peer_id_get =
3659 dp_rx_peer_metadata_peer_id_get_be;
3660 arch_ops->soc_cfg_attach = dp_soc_cfg_attach_be;
3661 arch_ops->tx_implicit_rbm_set = dp_tx_implicit_rbm_set_be;
3662 arch_ops->txrx_set_vdev_param = dp_txrx_set_vdev_param_be;
3663 dp_initialize_arch_ops_be_mlo(arch_ops);
3664 arch_ops->dp_soc_get_num_soc = dp_soc_get_num_soc_be;
3665 arch_ops->dp_peer_rx_reorder_queue_setup =
3666 dp_peer_rx_reorder_queue_setup_be;
3667 arch_ops->dp_rx_peer_set_link_id = dp_rx_set_link_id_be;
3668 arch_ops->txrx_print_peer_stats = dp_print_peer_txrx_stats_be;
3669 #if defined(DP_UMAC_HW_HARD_RESET) && defined(DP_UMAC_HW_RESET_SUPPORT)
3670 arch_ops->dp_bank_reconfig = dp_bank_reconfig_be;
3671 arch_ops->dp_reconfig_tx_vdev_mcast_ctrl =
3672 dp_reconfig_tx_vdev_mcast_ctrl_be;
3673 arch_ops->dp_cc_reg_cfg_init = dp_cc_reg_cfg_init;
3674 #endif
3675
3676 #ifdef WLAN_SUPPORT_PPEDS
3677 arch_ops->ppeds_handle_attached = dp_ppeds_handle_attached;
3678 arch_ops->dp_txrx_ppeds_rings_status = dp_ppeds_rings_status;
3679 arch_ops->txrx_soc_ppeds_start = dp_ppeds_start_soc_be;
3680 arch_ops->txrx_soc_ppeds_stop = dp_ppeds_stop_soc_be;
3681 arch_ops->dp_register_ppeds_interrupts = dp_register_ppeds_interrupts;
3682 arch_ops->dp_free_ppeds_interrupts = dp_free_ppeds_interrupts;
3683 arch_ops->dp_tx_ppeds_inuse_desc = dp_ppeds_inuse_desc;
3684 arch_ops->dp_ppeds_clear_stats = dp_ppeds_clear_stats;
3685 arch_ops->dp_txrx_ppeds_rings_stats = dp_ppeds_rings_stats;
3686 arch_ops->dp_txrx_ppeds_clear_rings_stats = dp_ppeds_clear_rings_stats;
3687 arch_ops->dp_tx_ppeds_cfg_astidx_cache_mapping =
3688 dp_tx_ppeds_cfg_astidx_cache_mapping;
3689 #ifdef DP_UMAC_HW_RESET_SUPPORT
3690 arch_ops->txrx_soc_ppeds_interrupt_stop = dp_ppeds_interrupt_stop_be;
3691 arch_ops->txrx_soc_ppeds_interrupt_start = dp_ppeds_interrupt_start_be;
3692 arch_ops->txrx_soc_ppeds_service_status_update =
3693 dp_ppeds_service_status_update_be;
3694 arch_ops->txrx_soc_ppeds_enabled_check = dp_ppeds_is_enabled_on_soc;
3695 arch_ops->txrx_soc_ppeds_txdesc_pool_reset =
3696 dp_ppeds_tx_desc_pool_reset;
3697 #endif
3698 #endif
3699 dp_init_near_full_arch_ops_be(arch_ops);
3700 arch_ops->get_reo_qdesc_addr = dp_rx_get_reo_qdesc_addr_be;
3701 arch_ops->get_rx_hash_key = dp_get_rx_hash_key_be;
3702 arch_ops->dp_set_rx_fst = dp_set_rx_fst_be;
3703 arch_ops->dp_get_rx_fst = dp_get_rx_fst_be;
3704 arch_ops->dp_rx_fst_deref = dp_rx_fst_release_ref_be;
3705 arch_ops->dp_rx_fst_ref = dp_rx_fst_get_ref_be;
3706 arch_ops->print_mlo_ast_stats = dp_print_mlo_ast_stats_be;
3707 arch_ops->peer_get_reo_hash = dp_peer_get_reo_hash_be;
3708 arch_ops->reo_remap_config = dp_reo_remap_config_be;
3709 arch_ops->txrx_get_vdev_mcast_param = dp_txrx_get_vdev_mcast_param_be;
3710 arch_ops->txrx_srng_init = dp_srng_init_be;
3711 arch_ops->dp_get_vdev_stats_for_unmap_peer =
3712 dp_get_vdev_stats_for_unmap_peer_be;
3713 #if defined(DP_POWER_SAVE) || defined(FEATURE_RUNTIME_PM)
3714 arch_ops->dp_update_ring_hptp = dp_update_ring_hptp;
3715 #endif
3716 arch_ops->dp_flush_tx_ring = dp_flush_tcl_ring;
3717 arch_ops->dp_soc_interrupt_attach = dp_soc_interrupt_attach_be;
3718 arch_ops->dp_soc_attach_poll = dp_soc_attach_poll_be;
3719 arch_ops->dp_soc_interrupt_detach = dp_soc_interrupt_detach_be;
3720 arch_ops->dp_service_srngs = dp_service_srngs_be;
3721 dp_initialize_arch_ops_be_ipa(arch_ops);
3722 dp_initialize_arch_ops_be_single_dev(arch_ops);
3723 dp_initialize_arch_ops_be_fisa(arch_ops);
3724 }
3725
3726 #ifdef QCA_SUPPORT_PRIMARY_LINK_MIGRATE
3727 static void
dp_primary_link_migration(struct dp_soc * soc,void * cb_ctxt,union hal_reo_status * reo_status)3728 dp_primary_link_migration(struct dp_soc *soc, void *cb_ctxt,
3729 union hal_reo_status *reo_status)
3730 {
3731 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
3732 struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
3733 struct dp_soc *pr_soc = NULL;
3734 struct dp_peer_info *pr_peer_info = (struct dp_peer_info *)cb_ctxt;
3735 struct dp_peer *new_primary_peer = NULL;
3736 struct dp_peer *mld_peer = NULL;
3737 uint8_t primary_vdev_id;
3738 struct cdp_txrx_peer_params_update params = {0};
3739 uint8_t tid;
3740 uint8_t is_wds = 0;
3741 uint16_t hw_peer_id;
3742 uint16_t ast_hash;
3743
3744 pr_soc = dp_mlo_get_soc_ref_by_chip_id(dp_mlo, pr_peer_info->chip_id);
3745 if (!pr_soc) {
3746 dp_htt_err("Invalid soc");
3747 qdf_mem_free(pr_peer_info);
3748 return;
3749 }
3750
3751 new_primary_peer = pr_soc->peer_id_to_obj_map[
3752 pr_peer_info->primary_peer_id];
3753 if (!new_primary_peer) {
3754 dp_htt_err("New primary peer is NULL");
3755 qdf_mem_free(pr_peer_info);
3756 return;
3757 }
3758
3759 mld_peer = DP_GET_MLD_PEER_FROM_PEER(new_primary_peer);
3760 if (!mld_peer) {
3761 dp_htt_err("MLD peer is NULL");
3762 qdf_mem_free(pr_peer_info);
3763 return;
3764 }
3765
3766 new_primary_peer->primary_link = 1;
3767
3768 hw_peer_id = pr_peer_info->hw_peer_id;
3769 ast_hash = pr_peer_info->ast_hash;
3770 /* Add ast enteries for new primary peer */
3771 if (pr_soc->ast_offload_support && pr_soc->host_ast_db_enable) {
3772 dp_peer_host_add_map_ast(pr_soc, mld_peer->peer_id, mld_peer->mac_addr.raw,
3773 hw_peer_id, new_primary_peer->vdev->vdev_id,
3774 ast_hash, is_wds);
3775 }
3776
3777 /*
3778 * Check if reo_qref_table_en is set and if
3779 * rx_tid qdesc for tid 0 is already setup and perform
3780 * qref write to LUT for Tid 0 and 16.
3781 *
3782 */
3783 if (hal_reo_shared_qaddr_is_enable(pr_soc->hal_soc) &&
3784 mld_peer->rx_tid[0].hw_qdesc_vaddr_unaligned) {
3785 for (tid = 0; tid < DP_MAX_TIDS; tid++)
3786 hal_reo_shared_qaddr_write(pr_soc->hal_soc,
3787 mld_peer->peer_id,
3788 tid,
3789 mld_peer->rx_tid[tid].hw_qdesc_paddr);
3790 }
3791
3792 if (pr_soc && pr_soc->cdp_soc.ol_ops->update_primary_link)
3793 pr_soc->cdp_soc.ol_ops->update_primary_link(pr_soc->ctrl_psoc,
3794 new_primary_peer->mac_addr.raw);
3795
3796 primary_vdev_id = new_primary_peer->vdev->vdev_id;
3797
3798 dp_vdev_unref_delete(soc, mld_peer->vdev, DP_MOD_ID_CHILD);
3799 mld_peer->vdev = dp_vdev_get_ref_by_id(pr_soc, primary_vdev_id,
3800 DP_MOD_ID_CHILD);
3801 mld_peer->txrx_peer->vdev = mld_peer->vdev;
3802
3803 params.vdev_id = new_primary_peer->vdev->vdev_id;
3804 params.peer_mac = mld_peer->mac_addr.raw;
3805 params.chip_id = pr_peer_info->chip_id;
3806 params.pdev_id = new_primary_peer->vdev->pdev->pdev_id;
3807
3808 if (new_primary_peer->vdev->opmode == wlan_op_mode_sta) {
3809 dp_wdi_event_handler(
3810 WDI_EVENT_STA_PRIMARY_UMAC_UPDATE,
3811 pr_soc, (void *)¶ms,
3812 new_primary_peer->peer_id,
3813 WDI_NO_VAL, params.pdev_id);
3814 } else {
3815 dp_wdi_event_handler(
3816 WDI_EVENT_PEER_PRIMARY_UMAC_UPDATE,
3817 pr_soc, (void *)¶ms,
3818 new_primary_peer->peer_id,
3819 WDI_NO_VAL, params.pdev_id);
3820 }
3821 qdf_mem_free(pr_peer_info);
3822 }
3823
3824 #ifdef WLAN_SUPPORT_PPEDS
dp_get_ppe_info_for_vap(struct dp_soc * pr_soc,struct dp_peer * pr_peer,uint16_t * src_info)3825 static QDF_STATUS dp_get_ppe_info_for_vap(struct dp_soc *pr_soc,
3826 struct dp_peer *pr_peer,
3827 uint16_t *src_info)
3828 {
3829 struct dp_soc_be *be_soc_mld = NULL;
3830 struct cdp_ds_vp_params vp_params = {0};
3831 struct dp_ppe_vp_profile *ppe_vp_profile;
3832 QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
3833 struct cdp_soc_t *cdp_soc = &pr_soc->cdp_soc;
3834
3835 /*
3836 * Extract the VP profile from the VAP
3837 */
3838 if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
3839 dp_err("%pK: Register get ppeds profile info first", cdp_soc);
3840 return QDF_STATUS_E_NULL_VALUE;
3841 }
3842
3843 /*
3844 * Check if PPE DS routing is enabled on the associated vap.
3845 */
3846 qdf_status = cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(
3847 pr_soc->ctrl_psoc,
3848 pr_peer->vdev->vdev_id,
3849 &vp_params);
3850
3851 if (QDF_IS_STATUS_ERROR(qdf_status)) {
3852 dp_err("Could not find ppeds profile info");
3853 return QDF_STATUS_E_NULL_VALUE;
3854 }
3855
3856 /* Check if PPE DS routing is enabled on
3857 * the associated vap.
3858 */
3859 if (vp_params.ppe_vp_type != PPE_VP_USER_TYPE_DS)
3860 return qdf_status;
3861
3862 be_soc_mld = dp_get_be_soc_from_dp_soc(pr_soc);
3863 ppe_vp_profile = &be_soc_mld->ppe_vp_profile[
3864 vp_params.ppe_vp_profile_idx];
3865 *src_info = ppe_vp_profile->vp_num;
3866
3867 return qdf_status;
3868 }
3869 #else
dp_get_ppe_info_for_vap(struct dp_soc * pr_soc,struct dp_peer * pr_peer,uint16_t * src_info)3870 static QDF_STATUS dp_get_ppe_info_for_vap(struct dp_soc *pr_soc,
3871 struct dp_peer *pr_peer,
3872 uint16_t *src_info)
3873 {
3874 return QDF_STATUS_E_NOSUPPORT;
3875 }
3876 #endif
3877
dp_htt_reo_migration(struct dp_soc * soc,uint16_t peer_id,uint16_t ml_peer_id,uint16_t vdev_id,uint8_t pdev_id,uint8_t chip_id)3878 QDF_STATUS dp_htt_reo_migration(struct dp_soc *soc, uint16_t peer_id,
3879 uint16_t ml_peer_id, uint16_t vdev_id,
3880 uint8_t pdev_id, uint8_t chip_id)
3881 {
3882 struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
3883 struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
3884 uint16_t mld_peer_id = dp_gen_ml_peer_id(soc, ml_peer_id);
3885 struct dp_soc *pr_soc = NULL;
3886 struct dp_soc *current_pr_soc = NULL;
3887 struct hal_reo_cmd_params params;
3888 struct dp_rx_tid *rx_tid;
3889 struct dp_peer *pr_peer = NULL;
3890 struct dp_peer *mld_peer = NULL;
3891 struct dp_soc *mld_soc = NULL;
3892 struct dp_peer *current_pr_peer = NULL;
3893 struct dp_peer_info *peer_info;
3894 struct dp_vdev_be *be_vdev;
3895 uint16_t src_info = 0;
3896 QDF_STATUS status;
3897 struct dp_ast_entry *ast_entry;
3898 uint16_t hw_peer_id;
3899 uint16_t ast_hash;
3900 int i = 0;
3901
3902 if (!dp_mlo) {
3903 dp_htt_err("Invalid dp_mlo ctxt");
3904 return QDF_STATUS_E_FAILURE;
3905 }
3906
3907 pr_soc = dp_mlo_get_soc_ref_by_chip_id(dp_mlo, chip_id);
3908 if (!pr_soc) {
3909 dp_htt_err("Invalid soc");
3910 return QDF_STATUS_E_FAILURE;
3911 }
3912
3913 pr_peer = pr_soc->peer_id_to_obj_map[peer_id];
3914 if (!pr_peer || !(IS_MLO_DP_LINK_PEER(pr_peer))) {
3915 dp_htt_err("Invalid peer");
3916 return QDF_STATUS_E_FAILURE;
3917 }
3918
3919 mld_peer = DP_GET_MLD_PEER_FROM_PEER(pr_peer);
3920
3921 if (!mld_peer || (mld_peer->peer_id != mld_peer_id)) {
3922 dp_htt_err("Invalid mld peer");
3923 return QDF_STATUS_E_FAILURE;
3924 }
3925
3926 be_vdev = dp_get_be_vdev_from_dp_vdev(pr_peer->vdev);
3927 if (!be_vdev) {
3928 dp_htt_err("Invalid be vdev");
3929 return QDF_STATUS_E_FAILURE;
3930 }
3931
3932 mld_soc = mld_peer->vdev->pdev->soc;
3933 status = dp_get_ppe_info_for_vap(pr_soc, pr_peer, &src_info);
3934 if (status == QDF_STATUS_E_NULL_VALUE) {
3935 dp_htt_err("Invalid ppe info for the vdev");
3936 return QDF_STATUS_E_FAILURE;
3937 }
3938
3939 current_pr_peer = dp_get_primary_link_peer_by_id(
3940 pr_soc,
3941 mld_peer->peer_id,
3942 DP_MOD_ID_HTT);
3943 /* Making existing primary peer as non primary */
3944 if (current_pr_peer) {
3945 current_pr_peer->primary_link = 0;
3946 dp_peer_unref_delete(current_pr_peer, DP_MOD_ID_HTT);
3947 }
3948
3949 current_pr_soc = mld_peer->vdev->pdev->soc;
3950 dp_peer_rx_reo_shared_qaddr_delete(current_pr_soc, mld_peer);
3951
3952 /* delete ast entry for current primary peer */
3953 qdf_spin_lock_bh(¤t_pr_soc->ast_lock);
3954 ast_entry = dp_peer_ast_hash_find_soc_by_type(
3955 current_pr_soc,
3956 mld_peer->mac_addr.raw,
3957 CDP_TXRX_AST_TYPE_MLD);
3958 if (!ast_entry) {
3959 dp_htt_err("Invalid ast entry");
3960 qdf_spin_unlock_bh(¤t_pr_soc->ast_lock);
3961 return QDF_STATUS_E_FAILURE;
3962 }
3963
3964 hw_peer_id = ast_entry->ast_idx;
3965 ast_hash = ast_entry->ast_hash_value;
3966 dp_peer_unlink_ast_entry(current_pr_soc, ast_entry, mld_peer);
3967
3968 if (ast_entry->is_mapped)
3969 current_pr_soc->ast_table[ast_entry->ast_idx] = NULL;
3970
3971 dp_peer_free_ast_entry(current_pr_soc, ast_entry);
3972
3973 mld_peer->self_ast_entry = NULL;
3974 qdf_spin_unlock_bh(¤t_pr_soc->ast_lock);
3975
3976 peer_info = qdf_mem_malloc(sizeof(struct dp_peer_info));
3977 if (!peer_info) {
3978 dp_htt_err("Malloc failed");
3979 return QDF_STATUS_E_FAILURE;
3980 }
3981
3982 peer_info->primary_peer_id = peer_id;
3983 peer_info->chip_id = chip_id;
3984 peer_info->hw_peer_id = hw_peer_id;
3985 peer_info->ast_hash = ast_hash;
3986
3987
3988 for (i = 0; i < DP_MAX_TIDS; i++) {
3989 rx_tid = &mld_peer->rx_tid[i];
3990 if (!rx_tid)
3991 continue;
3992
3993 qdf_mem_zero(¶ms, sizeof(params));
3994 params.std.need_status = 1;
3995 params.std.addr_lo = rx_tid->hw_qdesc_paddr & 0xffffffff;
3996 params.std.addr_hi = (uint64_t)(rx_tid->hw_qdesc_paddr) >> 32;
3997
3998 status = dp_reo_send_cmd(current_pr_soc, CMD_FLUSH_QUEUE, ¶ms,
3999 NULL,NULL);
4000 }
4001
4002 qdf_mem_zero(¶ms, sizeof(params));
4003
4004 rx_tid = &mld_peer->rx_tid[0];
4005 params.std.need_status = 1;
4006 params.std.addr_lo = rx_tid->hw_qdesc_paddr & 0xffffffff;
4007 params.std.addr_hi = (uint64_t)(rx_tid->hw_qdesc_paddr) >> 32;
4008 params.u.fl_cache_params.flush_no_inval = 0;
4009 params.u.fl_cache_params.flush_entire_cache = 1;
4010 status = dp_reo_send_cmd(current_pr_soc, CMD_FLUSH_CACHE, ¶ms,
4011 dp_primary_link_migration,
4012 (void *)peer_info);
4013
4014 if (status != QDF_STATUS_SUCCESS) {
4015 dp_htt_err("Reo flush failed");
4016 qdf_mem_free(peer_info);
4017 dp_h2t_ptqm_migration_msg_send(pr_soc, vdev_id, pdev_id,
4018 chip_id, peer_id, ml_peer_id,
4019 src_info, QDF_STATUS_E_FAILURE);
4020 }
4021
4022 qdf_mem_zero(¶ms, sizeof(params));
4023 params.std.need_status = 0;
4024 params.std.addr_lo = rx_tid->hw_qdesc_paddr & 0xffffffff;
4025 params.std.addr_hi = (uint64_t)(rx_tid->hw_qdesc_paddr) >> 32;
4026 params.u.unblk_cache_params.type = UNBLOCK_CACHE;
4027 dp_reo_send_cmd(current_pr_soc, CMD_UNBLOCK_CACHE, ¶ms, NULL, NULL);
4028
4029 dp_h2t_ptqm_migration_msg_send(pr_soc, vdev_id, pdev_id,
4030 chip_id, peer_id, ml_peer_id,
4031 src_info, QDF_STATUS_SUCCESS);
4032 return QDF_STATUS_SUCCESS;
4033 }
4034 #endif
4035