1 /* SPDX-License-Identifier: GPL-2.0 */
2 /**
3  * PCI Endpoint *Controller* (EPC) header file
4  *
5  * Copyright (C) 2017 Texas Instruments
6  * Author: Kishon Vijay Abraham I <kishon@ti.com>
7  */
8 
9 #ifndef __LINUX_PCI_EPC_H
10 #define __LINUX_PCI_EPC_H
11 
12 #include <linux/pci-epf.h>
13 
14 struct pci_epc;
15 
16 enum pci_epc_irq_type {
17 	PCI_EPC_IRQ_UNKNOWN,
18 	PCI_EPC_IRQ_LEGACY,
19 	PCI_EPC_IRQ_MSI,
20 	PCI_EPC_IRQ_MSIX,
21 };
22 
23 /**
24  * struct pci_epc_ops - set of function pointers for performing EPC operations
25  * @write_header: ops to populate configuration space header
26  * @set_bar: ops to configure the BAR
27  * @clear_bar: ops to reset the BAR
28  * @map_addr: ops to map CPU address to PCI address
29  * @unmap_addr: ops to unmap CPU address and PCI address
30  * @set_msi: ops to set the requested number of MSI interrupts in the MSI
31  *	     capability register
32  * @get_msi: ops to get the number of MSI interrupts allocated by the RC from
33  *	     the MSI capability register
34  * @set_msix: ops to set the requested number of MSI-X interrupts in the
35  *	     MSI-X capability register
36  * @get_msix: ops to get the number of MSI-X interrupts allocated by the RC
37  *	     from the MSI-X capability register
38  * @raise_irq: ops to raise a legacy, MSI or MSI-X interrupt
39  * @start: ops to start the PCI link
40  * @stop: ops to stop the PCI link
41  * @owner: the module owner containing the ops
42  */
43 struct pci_epc_ops {
44 	int	(*write_header)(struct pci_epc *epc, u8 func_no,
45 				struct pci_epf_header *hdr);
46 	int	(*set_bar)(struct pci_epc *epc, u8 func_no,
47 			   struct pci_epf_bar *epf_bar);
48 	void	(*clear_bar)(struct pci_epc *epc, u8 func_no,
49 			     struct pci_epf_bar *epf_bar);
50 	int	(*map_addr)(struct pci_epc *epc, u8 func_no,
51 			    phys_addr_t addr, u64 pci_addr, size_t size);
52 	void	(*unmap_addr)(struct pci_epc *epc, u8 func_no,
53 			      phys_addr_t addr);
54 	int	(*set_msi)(struct pci_epc *epc, u8 func_no, u8 interrupts);
55 	int	(*get_msi)(struct pci_epc *epc, u8 func_no);
56 	int	(*set_msix)(struct pci_epc *epc, u8 func_no, u16 interrupts);
57 	int	(*get_msix)(struct pci_epc *epc, u8 func_no);
58 	int	(*raise_irq)(struct pci_epc *epc, u8 func_no,
59 			     enum pci_epc_irq_type type, u16 interrupt_num);
60 	int	(*start)(struct pci_epc *epc);
61 	void	(*stop)(struct pci_epc *epc);
62 	struct module *owner;
63 };
64 
65 /**
66  * struct pci_epc_mem - address space of the endpoint controller
67  * @phys_base: physical base address of the PCI address space
68  * @size: the size of the PCI address space
69  * @bitmap: bitmap to manage the PCI address space
70  * @pages: number of bits representing the address region
71  * @page_size: size of each page
72  * @lock: mutex to protect bitmap
73  */
74 struct pci_epc_mem {
75 	phys_addr_t	phys_base;
76 	size_t		size;
77 	unsigned long	*bitmap;
78 	size_t		page_size;
79 	int		pages;
80 	/* mutex to protect against concurrent access for memory allocation*/
81 	struct mutex	lock;
82 };
83 
84 /**
85  * struct pci_epc - represents the PCI EPC device
86  * @dev: PCI EPC device
87  * @pci_epf: list of endpoint functions present in this EPC device
88  * @ops: function pointers for performing endpoint operations
89  * @mem: address space of the endpoint controller
90  * @max_functions: max number of functions that can be configured in this EPC
91  * @group: configfs group representing the PCI EPC device
92  * @lock: spinlock to protect pci_epc ops
93  */
94 struct pci_epc {
95 	struct device			dev;
96 	struct list_head		pci_epf;
97 	const struct pci_epc_ops	*ops;
98 	struct pci_epc_mem		*mem;
99 	u8				max_functions;
100 	struct config_group		*group;
101 	/* spinlock to protect against concurrent access of EP controller */
102 	spinlock_t			lock;
103 	unsigned int			features;
104 };
105 
106 #define EPC_FEATURE_NO_LINKUP_NOTIFIER		BIT(0)
107 #define EPC_FEATURE_BAR_MASK			(BIT(1) | BIT(2) | BIT(3))
108 #define EPC_FEATURE_MSIX_AVAILABLE		BIT(4)
109 #define EPC_FEATURE_SET_BAR(features, bar)	\
110 		(features |= (EPC_FEATURE_BAR_MASK & (bar << 1)))
111 #define EPC_FEATURE_GET_BAR(features)		\
112 		((features & EPC_FEATURE_BAR_MASK) >> 1)
113 
114 #define to_pci_epc(device) container_of((device), struct pci_epc, dev)
115 
116 #define pci_epc_create(dev, ops)    \
117 		__pci_epc_create((dev), (ops), THIS_MODULE)
118 #define devm_pci_epc_create(dev, ops)    \
119 		__devm_pci_epc_create((dev), (ops), THIS_MODULE)
120 
121 #define pci_epc_mem_init(epc, phys_addr, size)	\
122 		__pci_epc_mem_init((epc), (phys_addr), (size), PAGE_SIZE)
123 
epc_set_drvdata(struct pci_epc * epc,void * data)124 static inline void epc_set_drvdata(struct pci_epc *epc, void *data)
125 {
126 	dev_set_drvdata(&epc->dev, data);
127 }
128 
epc_get_drvdata(struct pci_epc * epc)129 static inline void *epc_get_drvdata(struct pci_epc *epc)
130 {
131 	return dev_get_drvdata(&epc->dev);
132 }
133 
134 struct pci_epc *
135 __devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
136 		      struct module *owner);
137 struct pci_epc *
138 __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
139 		 struct module *owner);
140 void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc);
141 void pci_epc_destroy(struct pci_epc *epc);
142 int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf);
143 void pci_epc_linkup(struct pci_epc *epc);
144 void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf);
145 int pci_epc_write_header(struct pci_epc *epc, u8 func_no,
146 			 struct pci_epf_header *hdr);
147 int pci_epc_set_bar(struct pci_epc *epc, u8 func_no,
148 		    struct pci_epf_bar *epf_bar);
149 void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no,
150 		       struct pci_epf_bar *epf_bar);
151 int pci_epc_map_addr(struct pci_epc *epc, u8 func_no,
152 		     phys_addr_t phys_addr,
153 		     u64 pci_addr, size_t size);
154 void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no,
155 			phys_addr_t phys_addr);
156 int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 interrupts);
157 int pci_epc_get_msi(struct pci_epc *epc, u8 func_no);
158 int pci_epc_set_msix(struct pci_epc *epc, u8 func_no, u16 interrupts);
159 int pci_epc_get_msix(struct pci_epc *epc, u8 func_no);
160 int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no,
161 		      enum pci_epc_irq_type type, u16 interrupt_num);
162 int pci_epc_start(struct pci_epc *epc);
163 void pci_epc_stop(struct pci_epc *epc);
164 struct pci_epc *pci_epc_get(const char *epc_name);
165 void pci_epc_put(struct pci_epc *epc);
166 
167 int __pci_epc_mem_init(struct pci_epc *epc, phys_addr_t phys_addr, size_t size,
168 		       size_t page_size);
169 void pci_epc_mem_exit(struct pci_epc *epc);
170 void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc,
171 				     phys_addr_t *phys_addr, size_t size);
172 void pci_epc_mem_free_addr(struct pci_epc *epc, phys_addr_t phys_addr,
173 			   void __iomem *virt_addr, size_t size);
174 #endif /* __LINUX_PCI_EPC_H */
175