1 /*
2 * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
3 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for
6 * any purpose with or without fee is hereby granted, provided that the
7 * above copyright notice and this permission notice appear in all
8 * copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17 * PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 #include "hal_rh_api.h"
21 #include "hal_rx.h"
22 #include "hal_rh_rx.h"
23 #include "hal_tx.h"
24 #include <hal_api_mon.h>
25
hal_get_reo_qdesc_size_rh(uint32_t ba_window_size,int tid)26 static uint32_t hal_get_reo_qdesc_size_rh(uint32_t ba_window_size,
27 int tid)
28 {
29 return 0;
30 }
31
hal_get_rx_max_ba_window_rh(int tid)32 static uint16_t hal_get_rx_max_ba_window_rh(int tid)
33 {
34 return 0;
35 }
36
hal_set_link_desc_addr_rh(void * desc,uint32_t cookie,qdf_dma_addr_t link_desc_paddr,uint8_t bm_id)37 static void hal_set_link_desc_addr_rh(void *desc, uint32_t cookie,
38 qdf_dma_addr_t link_desc_paddr,
39 uint8_t bm_id)
40 {
41 uint32_t *buf_addr = (uint32_t *)desc;
42
43 HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_0, BUFFER_ADDR_31_0,
44 link_desc_paddr & 0xffffffff);
45 HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, BUFFER_ADDR_39_32,
46 (uint64_t)link_desc_paddr >> 32);
47 HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, RETURN_BUFFER_MANAGER,
48 bm_id);
49 HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, SW_BUFFER_COOKIE,
50 cookie);
51 }
52
hal_tx_init_data_ring_rh(hal_soc_handle_t hal_soc_hdl,hal_ring_handle_t hal_ring_hdl)53 static void hal_tx_init_data_ring_rh(hal_soc_handle_t hal_soc_hdl,
54 hal_ring_handle_t hal_ring_hdl)
55 {
56 }
57
hal_get_ba_aging_timeout_rh(hal_soc_handle_t hal_soc_hdl,uint8_t ac,uint32_t * value)58 static void hal_get_ba_aging_timeout_rh(hal_soc_handle_t hal_soc_hdl,
59 uint8_t ac, uint32_t *value)
60 {
61 }
62
hal_set_ba_aging_timeout_rh(hal_soc_handle_t hal_soc_hdl,uint8_t ac,uint32_t value)63 static void hal_set_ba_aging_timeout_rh(hal_soc_handle_t hal_soc_hdl,
64 uint8_t ac, uint32_t value)
65 {
66 }
67
hal_get_reo_reg_base_offset_rh(void)68 static uint32_t hal_get_reo_reg_base_offset_rh(void)
69 {
70 return 0;
71 }
72
hal_rx_reo_buf_paddr_get_rh(hal_ring_desc_t rx_desc,struct hal_buf_info * buf_info)73 static void hal_rx_reo_buf_paddr_get_rh(hal_ring_desc_t rx_desc,
74 struct hal_buf_info *buf_info)
75 {
76 }
77
78 static void
hal_rx_msdu_link_desc_set_rh(hal_soc_handle_t hal_soc_hdl,void * src_srng_desc,hal_buff_addrinfo_t buf_addr_info,uint8_t bm_action)79 hal_rx_msdu_link_desc_set_rh(hal_soc_handle_t hal_soc_hdl,
80 void *src_srng_desc,
81 hal_buff_addrinfo_t buf_addr_info,
82 uint8_t bm_action)
83 {
84 }
85
hal_rx_ret_buf_manager_get_rh(hal_ring_desc_t ring_desc)86 static uint8_t hal_rx_ret_buf_manager_get_rh(hal_ring_desc_t ring_desc)
87 {
88 return HAL_RX_BUF_RBM_GET(ring_desc);
89 }
90
91 static
hal_rx_buf_cookie_rbm_get_rh(uint32_t * buf_addr_info_hdl,hal_buf_info_t buf_info_hdl)92 void hal_rx_buf_cookie_rbm_get_rh(uint32_t *buf_addr_info_hdl,
93 hal_buf_info_t buf_info_hdl)
94 {
95 struct hal_buf_info *buf_info =
96 (struct hal_buf_info *)buf_info_hdl;
97 struct buffer_addr_info *buf_addr_info =
98 (struct buffer_addr_info *)buf_addr_info_hdl;
99
100 buf_info->sw_cookie = HAL_RX_BUF_COOKIE_GET(buf_addr_info);
101 /*
102 * buffer addr info is the first member of ring desc, so the typecast
103 * can be done.
104 */
105 buf_info->rbm =
106 hal_rx_ret_buf_manager_get_rh((hal_ring_desc_t)buf_addr_info);
107 }
108
hal_rx_get_reo_error_code_rh(hal_ring_desc_t rx_desc)109 static uint32_t hal_rx_get_reo_error_code_rh(hal_ring_desc_t rx_desc)
110 {
111 return 0;
112 }
113
114 static uint32_t
hal_gen_reo_remap_val_generic_rh(enum hal_reo_remap_reg remap_reg,uint8_t * ix0_map)115 hal_gen_reo_remap_val_generic_rh(enum hal_reo_remap_reg remap_reg,
116 uint8_t *ix0_map)
117 {
118 return 0;
119 }
120
hal_rx_mpdu_desc_info_get_rh(void * desc_addr,void * mpdu_desc_info_hdl)121 static void hal_rx_mpdu_desc_info_get_rh(void *desc_addr,
122 void *mpdu_desc_info_hdl)
123 {
124 }
125
hal_rx_err_status_get_rh(hal_ring_desc_t rx_desc)126 static uint8_t hal_rx_err_status_get_rh(hal_ring_desc_t rx_desc)
127 {
128 return 0;
129 }
130
hal_rx_reo_buf_type_get_rh(hal_ring_desc_t rx_desc)131 static uint8_t hal_rx_reo_buf_type_get_rh(hal_ring_desc_t rx_desc)
132 {
133 return 0;
134 }
135
hal_rx_wbm_err_src_get_rh(hal_ring_desc_t ring_desc)136 static uint32_t hal_rx_wbm_err_src_get_rh(hal_ring_desc_t ring_desc)
137 {
138 return 0;
139 }
140
141 static void
hal_rx_wbm_rel_buf_paddr_get_rh(hal_ring_desc_t rx_desc,struct hal_buf_info * buf_info)142 hal_rx_wbm_rel_buf_paddr_get_rh(hal_ring_desc_t rx_desc,
143 struct hal_buf_info *buf_info)
144 {
145 }
146
hal_reo_send_cmd_rh(hal_soc_handle_t hal_soc_hdl,hal_ring_handle_t hal_ring_hdl,enum hal_reo_cmd_type cmd,void * params)147 static int hal_reo_send_cmd_rh(hal_soc_handle_t hal_soc_hdl,
148 hal_ring_handle_t hal_ring_hdl,
149 enum hal_reo_cmd_type cmd,
150 void *params)
151 {
152 return 0;
153 }
154
155 static void
hal_reo_qdesc_setup_rh(hal_soc_handle_t hal_soc_hdl,int tid,uint32_t ba_window_size,uint32_t start_seq,void * hw_qdesc_vaddr,qdf_dma_addr_t hw_qdesc_paddr,int pn_type,uint8_t vdev_stats_id)156 hal_reo_qdesc_setup_rh(hal_soc_handle_t hal_soc_hdl, int tid,
157 uint32_t ba_window_size,
158 uint32_t start_seq, void *hw_qdesc_vaddr,
159 qdf_dma_addr_t hw_qdesc_paddr,
160 int pn_type, uint8_t vdev_stats_id)
161 {
162 }
163
164 static inline uint32_t
hal_rx_msdu_reo_dst_ind_get_rh(hal_soc_handle_t hal_soc_hdl,void * msdu_link_desc)165 hal_rx_msdu_reo_dst_ind_get_rh(hal_soc_handle_t hal_soc_hdl,
166 void *msdu_link_desc)
167 {
168 return 0;
169 }
170
171 static inline void
hal_msdu_desc_info_set_rh(hal_soc_handle_t hal_soc_hdl,void * msdu_desc,uint32_t dst_ind,uint32_t nbuf_len)172 hal_msdu_desc_info_set_rh(hal_soc_handle_t hal_soc_hdl,
173 void *msdu_desc, uint32_t dst_ind,
174 uint32_t nbuf_len)
175 {
176 }
177
178 static inline void
hal_mpdu_desc_info_set_rh(hal_soc_handle_t hal_soc_hdl,void * ent_desc,void * mpdu_desc,uint32_t seq_no)179 hal_mpdu_desc_info_set_rh(hal_soc_handle_t hal_soc_hdl, void *ent_desc,
180 void *mpdu_desc, uint32_t seq_no)
181 {
182 }
183
hal_reo_status_update_rh(hal_soc_handle_t hal_soc_hdl,hal_ring_desc_t reo_desc,void * st_handle,uint32_t tlv,int * num_ref)184 static QDF_STATUS hal_reo_status_update_rh(hal_soc_handle_t hal_soc_hdl,
185 hal_ring_desc_t reo_desc,
186 void *st_handle,
187 uint32_t tlv, int *num_ref)
188 {
189 return QDF_STATUS_SUCCESS;
190 }
191
hal_get_tlv_hdr_size_rh(void)192 static uint8_t hal_get_tlv_hdr_size_rh(void)
193 {
194 return sizeof(struct tlv_32_hdr);
195 }
196
197 static inline
hal_get_reo_ent_desc_qdesc_addr_rh(uint8_t * desc)198 uint8_t *hal_get_reo_ent_desc_qdesc_addr_rh(uint8_t *desc)
199 {
200 return 0;
201 }
202
203 static inline
hal_set_reo_ent_desc_reo_dest_ind_rh(uint8_t * desc,uint32_t dst_ind)204 void hal_set_reo_ent_desc_reo_dest_ind_rh(uint8_t *desc,
205 uint32_t dst_ind)
206 {
207 }
208
hal_rx_get_qdesc_addr_rh(uint8_t * dst_ring_desc,uint8_t * buf)209 static uint64_t hal_rx_get_qdesc_addr_rh(uint8_t *dst_ring_desc,
210 uint8_t *buf)
211 {
212 return 0;
213 }
214
hal_get_idle_link_bm_id_rh(uint8_t chip_id)215 static uint8_t hal_get_idle_link_bm_id_rh(uint8_t chip_id)
216 {
217 return 0;
218 }
219 /*
220 * hal_rx_msdu_is_wlan_mcast_generic_rh(): Check if the buffer is for multicast
221 * address
222 * @nbuf: Network buffer
223 *
224 * Returns: flag to indicate whether the nbuf has MC/BC address
225 */
hal_rx_msdu_is_wlan_mcast_generic_rh(qdf_nbuf_t nbuf)226 static uint32_t hal_rx_msdu_is_wlan_mcast_generic_rh(qdf_nbuf_t nbuf)
227 {
228 uint8_t *buf = qdf_nbuf_data(nbuf);
229
230 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
231 struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
232
233 return rx_attn->mcast_bcast;
234 }
235
236 /**
237 * hal_rx_tlv_decap_format_get_rh() - Get packet decap format from the TLV
238 * @hw_desc_addr: rx tlv desc
239 *
240 * Return: pkt decap format
241 */
hal_rx_tlv_decap_format_get_rh(void * hw_desc_addr)242 static uint32_t hal_rx_tlv_decap_format_get_rh(void *hw_desc_addr)
243 {
244 struct rx_msdu_start *rx_msdu_start;
245 struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr;
246
247 rx_msdu_start = &rx_desc->msdu_start_tlv.rx_msdu_start;
248
249 return HAL_RX_GET(rx_msdu_start, RX_MSDU_START_2, DECAP_FORMAT);
250 }
251
252 /**
253 * hal_rx_dump_pkt_tlvs_rh(): API to print all member elements of
254 * RX TLVs
255 * @hal_soc_hdl: HAL SOC handle
256 * @buf: pointer the pkt buffer
257 * @dbg_level: log level
258 *
259 * Return: void
260 */
hal_rx_dump_pkt_tlvs_rh(hal_soc_handle_t hal_soc_hdl,uint8_t * buf,uint8_t dbg_level)261 static void hal_rx_dump_pkt_tlvs_rh(hal_soc_handle_t hal_soc_hdl,
262 uint8_t *buf, uint8_t dbg_level)
263 {
264 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
265 struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
266
267 hal_rx_dump_msdu_end_tlv(hal_soc, pkt_tlvs, dbg_level);
268 hal_rx_dump_rx_attention_tlv(hal_soc, pkt_tlvs, dbg_level);
269 hal_rx_dump_msdu_start_tlv(hal_soc, pkt_tlvs, dbg_level);
270 hal_rx_dump_mpdu_start_tlv(hal_soc, pkt_tlvs, dbg_level);
271 hal_rx_dump_mpdu_end_tlv(hal_soc, pkt_tlvs, dbg_level);
272 hal_rx_dump_pkt_hdr_tlv(hal_soc, pkt_tlvs, dbg_level);
273 }
274
275 /**
276 * hal_rx_tlv_get_offload_info_rh() - Get the offload info from TLV
277 * @rx_tlv: RX tlv start address in buffer
278 * @offload_info: Buffer to store the offload info
279 *
280 * Return: 0 on success, -EINVAL on failure.
281 */
282 static int
hal_rx_tlv_get_offload_info_rh(uint8_t * rx_tlv,struct hal_offload_info * offload_info)283 hal_rx_tlv_get_offload_info_rh(uint8_t *rx_tlv,
284 struct hal_offload_info *offload_info)
285 {
286 offload_info->flow_id = HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
287 offload_info->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_tlv);
288 offload_info->lro_eligible = HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
289 offload_info->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
290
291 if (offload_info->tcp_proto) {
292 offload_info->tcp_pure_ack =
293 HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
294 offload_info->tcp_offset = HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
295 offload_info->tcp_win = HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
296 offload_info->tcp_seq_num = HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
297 offload_info->tcp_ack_num = HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
298 }
299 return 0;
300 }
301
302 /*
303 * hal_rx_attn_phy_ppdu_id_get_rh(): get phy_ppdu_id value
304 * from rx attention
305 * @buf: pointer to rx_pkt_tlvs
306 *
307 * Return: phy_ppdu_id
308 */
hal_rx_attn_phy_ppdu_id_get_rh(uint8_t * buf)309 static uint16_t hal_rx_attn_phy_ppdu_id_get_rh(uint8_t *buf)
310 {
311 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
312 struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
313 uint16_t phy_ppdu_id;
314
315 phy_ppdu_id = HAL_RX_ATTN_PHY_PPDU_ID_GET(rx_attn);
316
317 return phy_ppdu_id;
318 }
319
320 /**
321 * hal_rx_msdu_start_msdu_len_get_rh(): API to get the MSDU length
322 * from rx_msdu_start TLV
323 *
324 * @buf: pointer to the start of RX PKT TLV headers
325 *
326 * Return: msdu length
327 */
hal_rx_msdu_start_msdu_len_get_rh(uint8_t * buf)328 static uint32_t hal_rx_msdu_start_msdu_len_get_rh(uint8_t *buf)
329 {
330 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
331 struct rx_msdu_start *msdu_start =
332 &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
333 uint32_t msdu_len;
334
335 msdu_len = HAL_RX_MSDU_START_MSDU_LEN_GET(msdu_start);
336
337 return msdu_len;
338 }
339
340 /**
341 * hal_rx_get_proto_params_rh() - Get l4 proto values from TLV
342 * @buf: rx tlv address
343 * @proto_params: Buffer to store proto parameters
344 *
345 * Return: 0 on success.
346 */
hal_rx_get_proto_params_rh(uint8_t * buf,void * proto_params)347 static int hal_rx_get_proto_params_rh(uint8_t *buf, void *proto_params)
348 {
349 struct hal_proto_params *param =
350 (struct hal_proto_params *)proto_params;
351
352 param->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(buf);
353 param->udp_proto = HAL_RX_TLV_GET_UDP_PROTO(buf);
354 param->ipv6_proto = HAL_RX_TLV_GET_IPV6(buf);
355
356 return 0;
357 }
358
359 /**
360 * hal_rx_get_l3_l4_offsets_rh() - Get l3/l4 header offset from TLV
361 * @buf: rx tlv start address
362 * @l3_hdr_offset: buffer to store l3 offset
363 * @l4_hdr_offset: buffer to store l4 offset
364 *
365 * Return: 0 on success.
366 */
hal_rx_get_l3_l4_offsets_rh(uint8_t * buf,uint32_t * l3_hdr_offset,uint32_t * l4_hdr_offset)367 static int hal_rx_get_l3_l4_offsets_rh(uint8_t *buf, uint32_t *l3_hdr_offset,
368 uint32_t *l4_hdr_offset)
369 {
370 *l3_hdr_offset = HAL_RX_TLV_GET_IP_OFFSET(buf);
371 *l4_hdr_offset = HAL_RX_TLV_GET_TCP_OFFSET(buf);
372
373 return 0;
374 }
375
376 /**
377 * hal_rx_tlv_get_pn_num_rh() - Get packet number from RX TLV
378 * @buf: rx tlv address
379 * @pn_num: buffer to store packet number
380 *
381 * Return: None
382 */
hal_rx_tlv_get_pn_num_rh(uint8_t * buf,uint64_t * pn_num)383 static inline void hal_rx_tlv_get_pn_num_rh(uint8_t *buf, uint64_t *pn_num)
384 {
385 struct rx_pkt_tlvs *rx_pkt_tlv =
386 (struct rx_pkt_tlvs *)buf;
387 struct rx_mpdu_info *rx_mpdu_info_details =
388 &rx_pkt_tlv->mpdu_start_tlv.rx_mpdu_start.rx_mpdu_info_details;
389
390 pn_num[0] = rx_mpdu_info_details->pn_31_0;
391 pn_num[0] |=
392 ((uint64_t)rx_mpdu_info_details->pn_63_32 << 32);
393 pn_num[1] = rx_mpdu_info_details->pn_95_64;
394 pn_num[1] |=
395 ((uint64_t)rx_mpdu_info_details->pn_127_96 << 32);
396 }
397
398 #ifdef NO_RX_PKT_HDR_TLV
399 /**
400 * hal_rx_pkt_hdr_get_rh() - Get rx packet header start address.
401 * @buf: packet start address
402 *
403 * Return: packet data start address.
404 */
hal_rx_pkt_hdr_get_rh(uint8_t * buf)405 static inline uint8_t *hal_rx_pkt_hdr_get_rh(uint8_t *buf)
406 {
407 return buf + RX_PKT_TLVS_LEN;
408 }
409 #else
hal_rx_pkt_hdr_get_rh(uint8_t * buf)410 static inline uint8_t *hal_rx_pkt_hdr_get_rh(uint8_t *buf)
411 {
412 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
413
414 return pkt_tlvs->pkt_hdr_tlv.rx_pkt_hdr;
415 }
416 #endif
417
418 /**
419 * hal_rx_priv_info_set_in_tlv_rh(): Save the private info to
420 * the reserved bytes of rx_tlv_hdr
421 * @buf: start of rx_tlv_hdr
422 * @priv_data: hal_wbm_err_desc_info structure
423 * @len: length of the private data
424 * Return: void
425 */
426 static inline void
hal_rx_priv_info_set_in_tlv_rh(uint8_t * buf,uint8_t * priv_data,uint32_t len)427 hal_rx_priv_info_set_in_tlv_rh(uint8_t *buf, uint8_t *priv_data,
428 uint32_t len)
429 {
430 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
431 uint32_t copy_len = (len > RX_PADDING0_BYTES) ?
432 RX_PADDING0_BYTES : len;
433
434 qdf_mem_copy(pkt_tlvs->rx_padding0, priv_data, copy_len);
435 }
436
437 /**
438 * hal_rx_priv_info_get_from_tlv_rh(): retrieve the private data from
439 * the reserved bytes of rx_tlv_hdr.
440 * @buf: start of rx_tlv_hdr
441 * @priv_data: hal_wbm_err_desc_info structure
442 * @len: length of the private data
443 * Return: void
444 */
445 static inline void
hal_rx_priv_info_get_from_tlv_rh(uint8_t * buf,uint8_t * priv_data,uint32_t len)446 hal_rx_priv_info_get_from_tlv_rh(uint8_t *buf, uint8_t *priv_data,
447 uint32_t len)
448 {
449 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
450 uint32_t copy_len = (len > RX_PADDING0_BYTES) ?
451 RX_PADDING0_BYTES : len;
452
453 qdf_mem_copy(priv_data, pkt_tlvs->rx_padding0, copy_len);
454 }
455
456 /**
457 * hal_rx_get_tlv_size_generic_rh() - Get rx packet tlv size
458 * @rx_pkt_tlv_size: TLV size for regular RX packets
459 * @rx_mon_pkt_tlv_size: TLV size for monitor mode packets
460 *
461 * Return: size of rx pkt tlv before the actual data
462 */
hal_rx_get_tlv_size_generic_rh(uint16_t * rx_pkt_tlv_size,uint16_t * rx_mon_pkt_tlv_size)463 static void hal_rx_get_tlv_size_generic_rh(uint16_t *rx_pkt_tlv_size,
464 uint16_t *rx_mon_pkt_tlv_size)
465 {
466 *rx_pkt_tlv_size = RX_PKT_TLVS_LEN;
467 *rx_mon_pkt_tlv_size = SIZE_OF_MONITOR_TLV;
468 }
469
470 /*
471 * hal_rxdma_buff_addr_info_set() - set the buffer_addr_info of the
472 * rxdma ring entry.
473 * @rxdma_entry: descriptor entry
474 * @paddr: physical address of nbuf data pointer.
475 * @cookie: SW cookie used as a index to SW rx desc.
476 * @manager: who owns the nbuf (host, NSS, etc...).
477 *
478 */
479 static void
hal_rxdma_buff_addr_info_set_rh(void * rxdma_entry,qdf_dma_addr_t paddr,uint32_t cookie,uint8_t manager)480 hal_rxdma_buff_addr_info_set_rh(void *rxdma_entry, qdf_dma_addr_t paddr,
481 uint32_t cookie, uint8_t manager)
482 {
483 uint32_t paddr_lo = ((u64)paddr & 0x00000000ffffffff);
484 uint32_t paddr_hi = ((u64)paddr & 0xffffffff00000000) >> 32;
485
486 HAL_RXDMA_PADDR_LO_SET(rxdma_entry, paddr_lo);
487 HAL_RXDMA_PADDR_HI_SET(rxdma_entry, paddr_hi);
488 HAL_RXDMA_COOKIE_SET(rxdma_entry, cookie);
489 HAL_RXDMA_MANAGER_SET(rxdma_entry, manager);
490 }
491
492 /**
493 * hal_rx_tlv_csum_err_get_rh() - Get IP and tcp-udp checksum fail flag
494 * @rx_tlv_hdr: start address of rx_tlv_hdr
495 * @ip_csum_err: buffer to return ip_csum_fail flag
496 * @tcp_udp_csum_err: placeholder to return tcp-udp checksum fail flag
497 *
498 * Return: None
499 */
500 static inline void
hal_rx_tlv_csum_err_get_rh(uint8_t * rx_tlv_hdr,uint32_t * ip_csum_err,uint32_t * tcp_udp_csum_err)501 hal_rx_tlv_csum_err_get_rh(uint8_t *rx_tlv_hdr, uint32_t *ip_csum_err,
502 uint32_t *tcp_udp_csum_err)
503 {
504 *ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
505 *tcp_udp_csum_err = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
506 }
507
508 static void
hal_rx_tlv_get_pkt_capture_flags_rh(uint8_t * rx_tlv_pkt_hdr,struct hal_rx_pkt_capture_flags * flags)509 hal_rx_tlv_get_pkt_capture_flags_rh(uint8_t *rx_tlv_pkt_hdr,
510 struct hal_rx_pkt_capture_flags *flags)
511 {
512 struct rx_pkt_tlvs *rx_tlv_hdr = (struct rx_pkt_tlvs *)rx_tlv_pkt_hdr;
513 struct rx_attention *rx_attn = &rx_tlv_hdr->attn_tlv.rx_attn;
514 struct rx_mpdu_start *mpdu_start =
515 &rx_tlv_hdr->mpdu_start_tlv.rx_mpdu_start;
516 struct rx_mpdu_end *mpdu_end = &rx_tlv_hdr->mpdu_end_tlv.rx_mpdu_end;
517 struct rx_msdu_start *msdu_start =
518 &rx_tlv_hdr->msdu_start_tlv.rx_msdu_start;
519
520 flags->encrypt_type = mpdu_start->rx_mpdu_info_details.encrypt_type;
521 flags->fcs_err = mpdu_end->fcs_err;
522 flags->fragment_flag = rx_attn->fragment_flag;
523 flags->chan_freq = HAL_RX_MSDU_START_FREQ_GET(msdu_start);
524 flags->rssi_comb = HAL_RX_MSDU_START_RSSI_GET(msdu_start);
525 flags->tsft = msdu_start->ppdu_start_timestamp;
526 }
527
528 static inline bool
hal_rx_mpdu_info_ampdu_flag_get_rh(uint8_t * buf)529 hal_rx_mpdu_info_ampdu_flag_get_rh(uint8_t *buf)
530 {
531 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
532 struct rx_mpdu_start *mpdu_start =
533 &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
534
535 struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
536 bool ampdu_flag;
537
538 ampdu_flag = HAL_RX_MPDU_INFO_AMPDU_FLAG_GET(mpdu_info);
539
540 return ampdu_flag;
541 }
542
543 static
hal_rx_tlv_mpdu_len_err_get_rh(void * hw_desc_addr)544 uint32_t hal_rx_tlv_mpdu_len_err_get_rh(void *hw_desc_addr)
545 {
546 struct rx_attention *rx_attn;
547 struct rx_mon_pkt_tlvs *rx_desc =
548 (struct rx_mon_pkt_tlvs *)hw_desc_addr;
549
550 rx_attn = &rx_desc->attn_tlv.rx_attn;
551
552 return HAL_RX_GET(rx_attn, RX_ATTENTION_1, MPDU_LENGTH_ERR);
553 }
554
555 static
hal_rx_tlv_mpdu_fcs_err_get_rh(void * hw_desc_addr)556 uint32_t hal_rx_tlv_mpdu_fcs_err_get_rh(void *hw_desc_addr)
557 {
558 struct rx_attention *rx_attn;
559 struct rx_mon_pkt_tlvs *rx_desc =
560 (struct rx_mon_pkt_tlvs *)hw_desc_addr;
561
562 rx_attn = &rx_desc->attn_tlv.rx_attn;
563
564 return HAL_RX_GET(rx_attn, RX_ATTENTION_1, FCS_ERR);
565 }
566
567 #ifdef NO_RX_PKT_HDR_TLV
hal_rx_desc_get_80211_hdr_rh(void * hw_desc_addr)568 static uint8_t *hal_rx_desc_get_80211_hdr_rh(void *hw_desc_addr)
569 {
570 uint8_t *rx_pkt_hdr;
571 struct rx_mon_pkt_tlvs *rx_desc =
572 (struct rx_mon_pkt_tlvs *)hw_desc_addr;
573
574 rx_pkt_hdr = &rx_desc->pkt_hdr_tlv.rx_pkt_hdr[0];
575
576 return rx_pkt_hdr;
577 }
578 #else
hal_rx_desc_get_80211_hdr_rh(void * hw_desc_addr)579 static uint8_t *hal_rx_desc_get_80211_hdr_rh(void *hw_desc_addr)
580 {
581 uint8_t *rx_pkt_hdr;
582
583 struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr;
584
585 rx_pkt_hdr = &rx_desc->pkt_hdr_tlv.rx_pkt_hdr[0];
586
587 return rx_pkt_hdr;
588 }
589 #endif
590
hal_rx_hw_desc_mpdu_user_id_rh(void * hw_desc_addr)591 static uint32_t hal_rx_hw_desc_mpdu_user_id_rh(void *hw_desc_addr)
592 {
593 struct rx_mon_pkt_tlvs *rx_desc =
594 (struct rx_mon_pkt_tlvs *)hw_desc_addr;
595 uint32_t user_id;
596
597 user_id = HAL_RX_GET_USER_TLV32_USERID(
598 &rx_desc->mpdu_start_tlv);
599
600 return user_id;
601 }
602
603 /**
604 * hal_rx_msdu_start_msdu_len_set_rh(): API to set the MSDU length
605 * from rx_msdu_start TLV
606 *
607 * @buf: pointer to the start of RX PKT TLV headers
608 * @len: msdu length
609 *
610 * Return: none
611 */
612 static inline void
hal_rx_msdu_start_msdu_len_set_rh(uint8_t * buf,uint32_t len)613 hal_rx_msdu_start_msdu_len_set_rh(uint8_t *buf, uint32_t len)
614 {
615 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
616 struct rx_msdu_start *msdu_start =
617 &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
618 void *wrd1;
619
620 wrd1 = (uint8_t *)msdu_start + RX_MSDU_START_1_MSDU_LENGTH_OFFSET;
621 *(uint32_t *)wrd1 &= (~RX_MSDU_START_1_MSDU_LENGTH_MASK);
622 *(uint32_t *)wrd1 |= len;
623 }
624
625 /*
626 * hal_rx_tlv_bw_get_rh(): API to get the Bandwidth
627 * Interval from rx_msdu_start
628 *
629 * @buf: pointer to the start of RX PKT TLV header
630 * Return: uint32_t(bw)
631 */
hal_rx_tlv_bw_get_rh(uint8_t * buf)632 static inline uint32_t hal_rx_tlv_bw_get_rh(uint8_t *buf)
633 {
634 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
635 struct rx_msdu_start *msdu_start =
636 &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
637 uint32_t bw;
638
639 bw = HAL_RX_MSDU_START_BW_GET(msdu_start);
640
641 return bw;
642 }
643
644 /*
645 * hal_rx_tlv_get_freq_rh(): API to get the frequency of operating channel
646 * from rx_msdu_start
647 *
648 * @buf: pointer to the start of RX PKT TLV header
649 * Return: uint32_t(frequency)
650 */
651 static inline uint32_t
hal_rx_tlv_get_freq_rh(uint8_t * buf)652 hal_rx_tlv_get_freq_rh(uint8_t *buf)
653 {
654 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
655 struct rx_msdu_start *msdu_start =
656 &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
657 uint32_t freq;
658
659 freq = HAL_RX_MSDU_START_FREQ_GET(msdu_start);
660
661 return freq;
662 }
663
664 /**
665 * hal_rx_tlv_sgi_get_rh(): API to get the Short Guard
666 * Interval from rx_msdu_start TLV
667 *
668 * @buf: pointer to the start of RX PKT TLV headers
669 * Return: uint32_t(sgi)
670 */
671 static inline uint32_t
hal_rx_tlv_sgi_get_rh(uint8_t * buf)672 hal_rx_tlv_sgi_get_rh(uint8_t *buf)
673 {
674 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
675 struct rx_msdu_start *msdu_start =
676 &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
677 uint32_t sgi;
678
679 sgi = HAL_RX_MSDU_START_SGI_GET(msdu_start);
680
681 return sgi;
682 }
683
684 /**
685 * hal_rx_tlv_rate_mcs_get_rh(): API to get the MCS rate
686 * from rx_msdu_start TLV
687 *
688 * @buf: pointer to the start of RX PKT TLV headers
689 * Return: uint32_t(rate_mcs)
690 */
691 static inline uint32_t
hal_rx_tlv_rate_mcs_get_rh(uint8_t * buf)692 hal_rx_tlv_rate_mcs_get_rh(uint8_t *buf)
693 {
694 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
695 struct rx_msdu_start *msdu_start =
696 &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
697 uint32_t rate_mcs;
698
699 rate_mcs = HAL_RX_MSDU_START_RATE_MCS_GET(msdu_start);
700
701 return rate_mcs;
702 }
703
704 /*
705 * hal_rx_tlv_get_pkt_type_rh(): API to get the pkt type
706 * from rx_msdu_start
707 *
708 * @buf: pointer to the start of RX PKT TLV header
709 * Return: uint32_t(pkt type)
710 */
711
hal_rx_tlv_get_pkt_type_rh(uint8_t * buf)712 static inline uint32_t hal_rx_tlv_get_pkt_type_rh(uint8_t *buf)
713 {
714 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
715 struct rx_msdu_start *msdu_start =
716 &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
717 uint32_t pkt_type;
718
719 pkt_type = HAL_RX_MSDU_START_PKT_TYPE_GET(msdu_start);
720
721 return pkt_type;
722 }
723
724 /**
725 * hal_rx_tlv_mic_err_get_rh(): API to get the MIC ERR
726 * from rx_mpdu_end TLV
727 *
728 * @buf: pointer to the start of RX PKT TLV headers
729 * Return: uint32_t(mic_err)
730 */
731 static inline uint32_t
hal_rx_tlv_mic_err_get_rh(uint8_t * buf)732 hal_rx_tlv_mic_err_get_rh(uint8_t *buf)
733 {
734 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
735 struct rx_mpdu_end *mpdu_end =
736 &pkt_tlvs->mpdu_end_tlv.rx_mpdu_end;
737 uint32_t mic_err;
738
739 mic_err = HAL_RX_MPDU_END_MIC_ERR_GET(mpdu_end);
740
741 return mic_err;
742 }
743
744 /**
745 * hal_rx_tlv_decrypt_err_get_rh(): API to get the Decrypt ERR
746 * from rx_mpdu_end TLV
747 *
748 * @buf: pointer to the start of RX PKT TLV headers
749 * Return: uint32_t(decrypt_err)
750 */
751 static inline uint32_t
hal_rx_tlv_decrypt_err_get_rh(uint8_t * buf)752 hal_rx_tlv_decrypt_err_get_rh(uint8_t *buf)
753 {
754 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
755 struct rx_mpdu_end *mpdu_end =
756 &pkt_tlvs->mpdu_end_tlv.rx_mpdu_end;
757 uint32_t decrypt_err;
758
759 decrypt_err = HAL_RX_MPDU_END_DECRYPT_ERR_GET(mpdu_end);
760
761 return decrypt_err;
762 }
763
764 /*
765 * hal_rx_tlv_first_mpdu_get_rh(): get fist_mpdu bit from rx attention
766 * @buf: pointer to rx_pkt_tlvs
767 *
768 * reutm: uint32_t(first_msdu)
769 */
770 static inline uint32_t
hal_rx_tlv_first_mpdu_get_rh(uint8_t * buf)771 hal_rx_tlv_first_mpdu_get_rh(uint8_t *buf)
772 {
773 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
774 struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
775 uint32_t first_mpdu;
776
777 first_mpdu = HAL_RX_ATTN_FIRST_MPDU_GET(rx_attn);
778
779 return first_mpdu;
780 }
781
782 /*
783 * hal_rx_msdu_get_keyid_rh(): API to get the key id if the decrypted packet
784 * from rx_msdu_end
785 *
786 * @buf: pointer to the start of RX PKT TLV header
787 * Return: uint32_t(key id)
788 */
789 static inline uint8_t
hal_rx_msdu_get_keyid_rh(uint8_t * buf)790 hal_rx_msdu_get_keyid_rh(uint8_t *buf)
791 {
792 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
793 struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
794 uint32_t keyid_octet;
795
796 keyid_octet = HAL_RX_MSDU_END_KEYID_OCTET_GET(msdu_end);
797
798 return keyid_octet & 0x3;
799 }
800
801 /*
802 * hal_rx_tlv_get_is_decrypted_rh(): API to get the decrypt status of the
803 * packet from rx_attention
804 *
805 * @buf: pointer to the start of RX PKT TLV header
806 * Return: uint32_t(decryt status)
807 */
808 static inline uint32_t
hal_rx_tlv_get_is_decrypted_rh(uint8_t * buf)809 hal_rx_tlv_get_is_decrypted_rh(uint8_t *buf)
810 {
811 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
812 struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
813 uint32_t is_decrypt = 0;
814 uint32_t decrypt_status;
815
816 decrypt_status = HAL_RX_ATTN_DECRYPT_STATUS_GET(rx_attn);
817
818 if (!decrypt_status)
819 is_decrypt = 1;
820
821 return is_decrypt;
822 }
823
hal_rx_get_phy_ppdu_id_size_rh(void)824 static inline uint8_t hal_rx_get_phy_ppdu_id_size_rh(void)
825 {
826 return sizeof(uint32_t);
827 }
828
829 /**
830 * hal_hw_txrx_default_ops_attach_rh() - Attach the default hal ops for
831 * Rh arch chipsets.
832 * @hal_soc: HAL soc handle
833 *
834 * Return: None
835 */
hal_hw_txrx_default_ops_attach_rh(struct hal_soc * hal_soc)836 void hal_hw_txrx_default_ops_attach_rh(struct hal_soc *hal_soc)
837 {
838 hal_soc->ops->hal_get_reo_qdesc_size = hal_get_reo_qdesc_size_rh;
839 hal_soc->ops->hal_get_rx_max_ba_window =
840 hal_get_rx_max_ba_window_rh;
841 hal_soc->ops->hal_set_link_desc_addr = hal_set_link_desc_addr_rh;
842 hal_soc->ops->hal_tx_init_data_ring = hal_tx_init_data_ring_rh;
843 hal_soc->ops->hal_get_ba_aging_timeout = hal_get_ba_aging_timeout_rh;
844 hal_soc->ops->hal_set_ba_aging_timeout = hal_set_ba_aging_timeout_rh;
845 hal_soc->ops->hal_get_reo_reg_base_offset =
846 hal_get_reo_reg_base_offset_rh;
847 hal_soc->ops->hal_rx_get_tlv_size = hal_rx_get_tlv_size_generic_rh;
848 hal_soc->ops->hal_rx_msdu_is_wlan_mcast =
849 hal_rx_msdu_is_wlan_mcast_generic_rh;
850 hal_soc->ops->hal_rx_tlv_decap_format_get =
851 hal_rx_tlv_decap_format_get_rh;
852 hal_soc->ops->hal_rx_dump_pkt_tlvs = hal_rx_dump_pkt_tlvs_rh;
853 hal_soc->ops->hal_rx_tlv_get_offload_info =
854 hal_rx_tlv_get_offload_info_rh;
855 hal_soc->ops->hal_rx_tlv_phy_ppdu_id_get =
856 hal_rx_attn_phy_ppdu_id_get_rh;
857 hal_soc->ops->hal_rx_tlv_msdu_done_get = hal_rx_attn_msdu_done_get_rh;
858 hal_soc->ops->hal_rx_tlv_msdu_len_get =
859 hal_rx_msdu_start_msdu_len_get_rh;
860 hal_soc->ops->hal_rx_get_proto_params = hal_rx_get_proto_params_rh;
861 hal_soc->ops->hal_rx_get_l3_l4_offsets = hal_rx_get_l3_l4_offsets_rh;
862
863 hal_soc->ops->hal_rx_reo_buf_paddr_get = hal_rx_reo_buf_paddr_get_rh;
864 hal_soc->ops->hal_rx_msdu_link_desc_set = hal_rx_msdu_link_desc_set_rh;
865 hal_soc->ops->hal_rx_buf_cookie_rbm_get = hal_rx_buf_cookie_rbm_get_rh;
866 hal_soc->ops->hal_rx_ret_buf_manager_get =
867 hal_rx_ret_buf_manager_get_rh;
868 hal_soc->ops->hal_rxdma_buff_addr_info_set =
869 hal_rxdma_buff_addr_info_set_rh;
870 hal_soc->ops->hal_rx_msdu_flags_get = hal_rx_msdu_flags_get_rh;
871 hal_soc->ops->hal_rx_get_reo_error_code = hal_rx_get_reo_error_code_rh;
872 hal_soc->ops->hal_gen_reo_remap_val =
873 hal_gen_reo_remap_val_generic_rh;
874 hal_soc->ops->hal_rx_tlv_csum_err_get =
875 hal_rx_tlv_csum_err_get_rh;
876 hal_soc->ops->hal_rx_mpdu_desc_info_get =
877 hal_rx_mpdu_desc_info_get_rh;
878 hal_soc->ops->hal_rx_err_status_get = hal_rx_err_status_get_rh;
879 hal_soc->ops->hal_rx_reo_buf_type_get = hal_rx_reo_buf_type_get_rh;
880 hal_soc->ops->hal_rx_pkt_hdr_get = hal_rx_pkt_hdr_get_rh;
881 hal_soc->ops->hal_rx_wbm_err_src_get = hal_rx_wbm_err_src_get_rh;
882 hal_soc->ops->hal_rx_wbm_rel_buf_paddr_get =
883 hal_rx_wbm_rel_buf_paddr_get_rh;
884 hal_soc->ops->hal_rx_priv_info_set_in_tlv =
885 hal_rx_priv_info_set_in_tlv_rh;
886 hal_soc->ops->hal_rx_priv_info_get_from_tlv =
887 hal_rx_priv_info_get_from_tlv_rh;
888 hal_soc->ops->hal_rx_mpdu_info_ampdu_flag_get =
889 hal_rx_mpdu_info_ampdu_flag_get_rh;
890 hal_soc->ops->hal_rx_tlv_mpdu_len_err_get =
891 hal_rx_tlv_mpdu_len_err_get_rh;
892 hal_soc->ops->hal_rx_tlv_mpdu_fcs_err_get =
893 hal_rx_tlv_mpdu_fcs_err_get_rh;
894 hal_soc->ops->hal_reo_send_cmd = hal_reo_send_cmd_rh;
895 hal_soc->ops->hal_rx_tlv_get_pkt_capture_flags =
896 hal_rx_tlv_get_pkt_capture_flags_rh;
897 hal_soc->ops->hal_rx_desc_get_80211_hdr = hal_rx_desc_get_80211_hdr_rh;
898 hal_soc->ops->hal_rx_hw_desc_mpdu_user_id =
899 hal_rx_hw_desc_mpdu_user_id_rh;
900 hal_soc->ops->hal_reo_qdesc_setup = hal_reo_qdesc_setup_rh;
901 hal_soc->ops->hal_rx_tlv_msdu_len_set =
902 hal_rx_msdu_start_msdu_len_set_rh;
903 hal_soc->ops->hal_rx_tlv_bw_get = hal_rx_tlv_bw_get_rh;
904 hal_soc->ops->hal_rx_tlv_get_freq = hal_rx_tlv_get_freq_rh;
905 hal_soc->ops->hal_rx_tlv_sgi_get = hal_rx_tlv_sgi_get_rh;
906 hal_soc->ops->hal_rx_tlv_rate_mcs_get = hal_rx_tlv_rate_mcs_get_rh;
907 hal_soc->ops->hal_rx_tlv_get_pkt_type = hal_rx_tlv_get_pkt_type_rh;
908 hal_soc->ops->hal_rx_tlv_get_pn_num = hal_rx_tlv_get_pn_num_rh;
909 hal_soc->ops->hal_rx_tlv_mic_err_get = hal_rx_tlv_mic_err_get_rh;
910 hal_soc->ops->hal_rx_tlv_decrypt_err_get =
911 hal_rx_tlv_decrypt_err_get_rh;
912 hal_soc->ops->hal_rx_tlv_first_mpdu_get = hal_rx_tlv_first_mpdu_get_rh;
913 hal_soc->ops->hal_rx_tlv_get_is_decrypted =
914 hal_rx_tlv_get_is_decrypted_rh;
915 hal_soc->ops->hal_rx_msdu_get_keyid = hal_rx_msdu_get_keyid_rh;
916 hal_soc->ops->hal_rx_msdu_reo_dst_ind_get =
917 hal_rx_msdu_reo_dst_ind_get_rh;
918 hal_soc->ops->hal_msdu_desc_info_set = hal_msdu_desc_info_set_rh;
919 hal_soc->ops->hal_mpdu_desc_info_set = hal_mpdu_desc_info_set_rh;
920 hal_soc->ops->hal_reo_status_update = hal_reo_status_update_rh;
921 hal_soc->ops->hal_get_tlv_hdr_size = hal_get_tlv_hdr_size_rh;
922 hal_soc->ops->hal_get_reo_ent_desc_qdesc_addr =
923 hal_get_reo_ent_desc_qdesc_addr_rh;
924 hal_soc->ops->hal_rx_get_qdesc_addr = hal_rx_get_qdesc_addr_rh;
925 hal_soc->ops->hal_set_reo_ent_desc_reo_dest_ind =
926 hal_set_reo_ent_desc_reo_dest_ind_rh;
927 hal_soc->ops->hal_get_idle_link_bm_id = hal_get_idle_link_bm_id_rh;
928 hal_soc->ops->hal_rx_get_phy_ppdu_id_size =
929 hal_rx_get_phy_ppdu_id_size_rh;
930 }
931