1 /*
2 * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
3 * Copyright (c) 2021, 2023 Qualcomm Innovation Center, Inc. All rights reserved.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for
6 * any purpose with or without fee is hereby granted, provided that the
7 * above copyright notice and this permission notice appear in all
8 * copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17 * PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 #include "qdf_types.h"
21 #include "dummy.h"
22 #include "hif_debug.h"
23
24 /**
25 * hif_dummy_bus_prevent_linkdown() - prevent linkdown
26 * @scn: hif context
27 * @flag: weather to keep the bus alive or not
28 *
29 * Dummy function for busses and platforms that do not support
30 * link down. This may need to be replaced with a wakelock.
31 */
hif_dummy_bus_prevent_linkdown(struct hif_softc * scn,bool flag)32 void hif_dummy_bus_prevent_linkdown(struct hif_softc *scn, bool flag)
33 {
34 hif_debug("wlan: %s pcie power collapse ignored",
35 (flag ? "disable" : "enable"));
36 }
37
38 /**
39 * hif_dummy_reset_soc(): reset soc
40 * @hif_ctx: HIF context
41 *
42 * this function resets soc
43 *
44 * Return: void
45 */
46 /* Function to reset SoC */
hif_dummy_reset_soc(struct hif_softc * hif_ctx)47 void hif_dummy_reset_soc(struct hif_softc *hif_ctx)
48 {
49 }
50
51 /**
52 * hif_dummy_bus_suspend() - suspend the bus
53 * @hif_ctx: hif context
54 *
55 * dummy for busses that don't need to suspend.
56 *
57 * Return: 0 for success and non-zero for failure
58 */
hif_dummy_bus_suspend(struct hif_softc * hif_ctx)59 int hif_dummy_bus_suspend(struct hif_softc *hif_ctx)
60 {
61 return 0;
62 }
63
64 /**
65 * hif_dummy_bus_resume() - hif resume API
66 * @hif_ctx: hif context
67 *
68 * This function resumes the bus. but snoc doesn't need to resume.
69 * Therefore do nothing.
70 *
71 * Return: 0 for success and non-zero for failure
72 */
hif_dummy_bus_resume(struct hif_softc * hif_ctx)73 int hif_dummy_bus_resume(struct hif_softc *hif_ctx)
74 {
75 return 0;
76 }
77
78 /**
79 * hif_dummy_bus_suspend_noirq() - suspend the bus
80 * @hif_ctx: hif context
81 *
82 * dummy for busses that don't need to synchronize
83 * with interrupt disable.
84 *
85 * Return: 0 for success and non-zero for failure
86 */
hif_dummy_bus_suspend_noirq(struct hif_softc * hif_ctx)87 int hif_dummy_bus_suspend_noirq(struct hif_softc *hif_ctx)
88 {
89 return 0;
90 }
91
92 /**
93 * hif_dummy_bus_resume_noirq() - resume the bus
94 * @hif_ctx: hif context
95 *
96 * dummy for busses that don't need to synchronize
97 * with interrupt disable.
98 *
99 * Return: 0 for success and non-zero for failure
100 */
hif_dummy_bus_resume_noirq(struct hif_softc * hif_ctx)101 int hif_dummy_bus_resume_noirq(struct hif_softc *hif_ctx)
102 {
103 return 0;
104 }
105
106 /**
107 * hif_dummy_target_sleep_state_adjust() - api to adjust state of target
108 * @scn: hif context
109 * @sleep_ok: allow or deny target to go to sleep
110 * @wait_for_it: ensure target has change
111 */
hif_dummy_target_sleep_state_adjust(struct hif_softc * scn,bool sleep_ok,bool wait_for_it)112 int hif_dummy_target_sleep_state_adjust(struct hif_softc *scn,
113 bool sleep_ok, bool wait_for_it)
114 {
115 return 0;
116 }
117
118 /**
119 * hif_dummy_enable_power_management() - dummy call
120 * @hif_ctx: hif context
121 * @is_packet_log_enabled: true if packet log is enabled
122 */
hif_dummy_enable_power_management(struct hif_softc * hif_ctx,bool is_packet_log_enabled)123 void hif_dummy_enable_power_management(struct hif_softc *hif_ctx,
124 bool is_packet_log_enabled)
125 {}
126
127 /**
128 * hif_dummy_disable_power_management() - dummy call
129 * @hif_ctx: hif context
130 *
131 * Return: none
132 */
hif_dummy_disable_power_management(struct hif_softc * hif_ctx)133 void hif_dummy_disable_power_management(struct hif_softc *hif_ctx)
134 {}
135
136 /**
137 * hif_dummy_disable_isr() - dummy call
138 * @scn: hif context
139 *
140 * Return: none
141 */
hif_dummy_disable_isr(struct hif_softc * scn)142 void hif_dummy_disable_isr(struct hif_softc *scn)
143 {}
144
145 /**
146 * hif_dummy_nointrs() - dummy call
147 * @hif_sc: hif context
148 *
149 * Return: none
150 */
hif_dummy_nointrs(struct hif_softc * hif_sc)151 void hif_dummy_nointrs(struct hif_softc *hif_sc)
152 {}
153
154 /**
155 * hif_dummy_bus_configure() - dummy call
156 * @hif_sc: hif context
157 *
158 * Return: 0 for success
159 */
hif_dummy_bus_configure(struct hif_softc * hif_sc)160 int hif_dummy_bus_configure(struct hif_softc *hif_sc)
161 {
162 return 0;
163 }
164
165 /**
166 * hif_dummy_get_config_item() - dummy call
167 * @hif_sc: hif context
168 * @opcode: configuration type
169 * @config: configuration value to set
170 * @config_len: configuration length
171 *
172 * Return: QDF_STATUS_SUCCESS for success
173 */
174 QDF_STATUS
hif_dummy_get_config_item(struct hif_softc * hif_sc,int opcode,void * config,uint32_t config_len)175 hif_dummy_get_config_item(struct hif_softc *hif_sc,
176 int opcode, void *config, uint32_t config_len)
177 {
178 return QDF_STATUS_SUCCESS;
179 }
180
181 /**
182 * hif_dummy_set_mailbox_swap() - dummy call
183 * @hif_sc: hif context
184 *
185 * Return: None
186 */
187 void
hif_dummy_set_mailbox_swap(struct hif_softc * hif_sc)188 hif_dummy_set_mailbox_swap(struct hif_softc *hif_sc)
189 {
190 }
191
192 /**
193 * hif_dummy_claim_device() - dummy call
194 * @hif_sc: hif context
195 *
196 * Return: None
197 */
198 void
hif_dummy_claim_device(struct hif_softc * hif_sc)199 hif_dummy_claim_device(struct hif_softc *hif_sc)
200 {
201 }
202
203 /**
204 * hif_dummy_cancel_deferred_target_sleep() - dummy call
205 * @hif_sc: hif context
206 *
207 * Return: None
208 */
209 void
hif_dummy_cancel_deferred_target_sleep(struct hif_softc * hif_sc)210 hif_dummy_cancel_deferred_target_sleep(struct hif_softc *hif_sc)
211 {
212 }
213
214 /**
215 * hif_dummy_irq_enable() - dummy call
216 * @hif_sc: hif context
217 * @irq_id: irq id
218 *
219 * Return: none
220 */
hif_dummy_irq_enable(struct hif_softc * hif_sc,int irq_id)221 void hif_dummy_irq_enable(struct hif_softc *hif_sc, int irq_id)
222 {}
223
224 /**
225 * hif_dummy_grp_irq_enable() - dummy call
226 * @hif_sc: hif context
227 * @grp_id: grp id
228 *
229 * Return: none
230 */
hif_dummy_grp_irq_enable(struct hif_softc * hif_sc,uint32_t grp_id)231 void hif_dummy_grp_irq_enable(struct hif_softc *hif_sc, uint32_t grp_id)
232 {}
233
234 /**
235 * hif_dummy_irq_disable() - dummy call
236 * @hif_sc: hif context
237 * @irq_id: irq id
238 *
239 * Return: none
240 */
hif_dummy_irq_disable(struct hif_softc * hif_sc,int irq_id)241 void hif_dummy_irq_disable(struct hif_softc *hif_sc, int irq_id)
242 {}
243
244 /**
245 * hif_dummy_grp_irq_disable() - dummy call
246 * @hif_sc: hif context
247 * @grp_id: grp id
248 *
249 * Return: none
250 */
hif_dummy_grp_irq_disable(struct hif_softc * hif_sc,uint32_t grp_id)251 void hif_dummy_grp_irq_disable(struct hif_softc *hif_sc, uint32_t grp_id)
252 {}
253
254 /**
255 * hif_dummy_grp_irq_configure() - dummy call
256 * @hif_sc: hif context
257 * @exec:
258 *
259 * Return: none
260 */
hif_dummy_grp_irq_configure(struct hif_softc * hif_sc,struct hif_exec_context * exec)261 int hif_dummy_grp_irq_configure(struct hif_softc *hif_sc,
262 struct hif_exec_context *exec)
263 {
264 return 0;
265 }
266
267 /**
268 * hif_dummy_grp_irq_deconfigure() - dummy call
269 * @hif_sc: hif context
270 *
271 * Return: none
272 */
hif_dummy_grp_irq_deconfigure(struct hif_softc * hif_sc)273 void hif_dummy_grp_irq_deconfigure(struct hif_softc *hif_sc)
274 {
275 }
276
277 /**
278 * hif_dummy_dump_registers() - dummy call
279 * @hif_sc: hif context
280 *
281 * Return: 0 for success
282 */
hif_dummy_dump_registers(struct hif_softc * hif_sc)283 int hif_dummy_dump_registers(struct hif_softc *hif_sc)
284 {
285 return 0;
286 }
287
288 /**
289 * hif_dummy_dump_target_memory() - dummy call
290 * @hif_sc: hif context
291 * @ramdump_base: base
292 * @address: address
293 * @size: size
294 *
295 * Return: None
296 */
hif_dummy_dump_target_memory(struct hif_softc * hif_sc,void * ramdump_base,uint32_t address,uint32_t size)297 void hif_dummy_dump_target_memory(struct hif_softc *hif_sc, void *ramdump_base,
298 uint32_t address, uint32_t size)
299 {
300 }
301
hif_dummy_bus_reg_read32(struct hif_softc * hif_sc,uint32_t offset)302 uint32_t hif_dummy_bus_reg_read32(struct hif_softc *hif_sc,
303 uint32_t offset)
304 {
305 return 0;
306 }
307
hif_dummy_bus_reg_write32(struct hif_softc * hif_sc,uint32_t offset,uint32_t value)308 void hif_dummy_bus_reg_write32(struct hif_softc *hif_sc,
309 uint32_t offset,
310 uint32_t value)
311 {
312 }
313
314 /**
315 * hif_dummy_ipa_get_ce_resource() - dummy call
316 * @hif_sc: HIF context
317 * @ce_sr: copyengine source ring resource info
318 * @sr_ring_size: source ring size
319 * @reg_paddr: bus physical address
320 *
321 * Return: None
322 */
hif_dummy_ipa_get_ce_resource(struct hif_softc * hif_sc,qdf_shared_mem_t ** ce_sr,uint32_t * sr_ring_size,qdf_dma_addr_t * reg_paddr)323 void hif_dummy_ipa_get_ce_resource(struct hif_softc *hif_sc,
324 qdf_shared_mem_t **ce_sr,
325 uint32_t *sr_ring_size,
326 qdf_dma_addr_t *reg_paddr)
327 {
328 }
329
330 /**
331 * hif_dummy_mask_interrupt_call() - dummy call
332 * @hif_sc: hif context
333 *
334 * Return: None
335 */
336 void
hif_dummy_mask_interrupt_call(struct hif_softc * hif_sc)337 hif_dummy_mask_interrupt_call(struct hif_softc *hif_sc)
338 {
339 }
340
341 /**
342 * hif_dummy_display_stats() - dummy call
343 * @hif_ctx: hif context
344 *
345 * Return: none
346 */
hif_dummy_display_stats(struct hif_softc * hif_ctx)347 void hif_dummy_display_stats(struct hif_softc *hif_ctx)
348 {}
349
350 /**
351 * hif_dummy_clear_stats() - dummy call
352 * @hif_ctx: hif context
353 *
354 * Return: none
355 */
hif_dummy_clear_stats(struct hif_softc * hif_ctx)356 void hif_dummy_clear_stats(struct hif_softc *hif_ctx)
357 {
358 }
359
360 /**
361 * hif_dummy_set_bundle_mode() - dummy call
362 * @hif_ctx: hif context
363 * @enabled: flag to enable/disable bundling
364 * @rx_bundle_cnt: bundle count to be used for RX
365 *
366 * Return: none
367 */
hif_dummy_set_bundle_mode(struct hif_softc * hif_ctx,bool enabled,int rx_bundle_cnt)368 void hif_dummy_set_bundle_mode(struct hif_softc *hif_ctx,
369 bool enabled, int rx_bundle_cnt)
370 {
371 }
372
373 /**
374 * hif_dummy_bus_reset_resume() - dummy call
375 * @hif_ctx: hif context
376 *
377 * Return: int 0 for success, non zero for failure
378 */
hif_dummy_bus_reset_resume(struct hif_softc * hif_ctx)379 int hif_dummy_bus_reset_resume(struct hif_softc *hif_ctx)
380 {
381 return 0;
382 }
383
hif_dummy_map_ce_to_irq(struct hif_softc * scn,int ce_id)384 int hif_dummy_map_ce_to_irq(struct hif_softc *scn, int ce_id)
385 {
386 hif_err("hif_map_ce_to_irq is not implemented on this platform");
387 QDF_BUG(0);
388 return -(1);
389 }
390
hif_dummy_addr_in_boundary(struct hif_softc * scn,uint32_t offset)391 int hif_dummy_addr_in_boundary(struct hif_softc *scn, uint32_t offset)
392 {
393 return 0;
394 }
395
396 /**
397 * hif_dummy_config_irq_affinity() - dummy call
398 * @scn: hif context
399 *
400 * Return: None
401 */
hif_dummy_config_irq_affinity(struct hif_softc * scn)402 void hif_dummy_config_irq_affinity(struct hif_softc *scn)
403 {
404 }
405
406 /**
407 * hif_dummy_config_irq_by_ceid() - dummy call
408 * @scn: hif context
409 * @ce_id : copy engine id
410 *
411 * Return: 0
412 */
hif_dummy_config_irq_by_ceid(struct hif_softc * scn,int ce_id)413 int hif_dummy_config_irq_by_ceid(struct hif_softc *scn, int ce_id)
414 {
415 return 0;
416 }
417
418 /**
419 * hif_dummy_config_irq_clear_cpu_affinity() - dummy call
420 * @scn: HIF handle
421 * @intr_ctxt_id: interrupt group index
422 * @cpu: CPU core to clear
423 *
424 * Return: None
425 */
hif_dummy_config_irq_clear_cpu_affinity(struct hif_softc * scn,int intr_ctxt_id,int cpu)426 void hif_dummy_config_irq_clear_cpu_affinity(struct hif_softc *scn,
427 int intr_ctxt_id, int cpu)
428 {
429 }
430
431 /**
432 * hif_dummy_log_bus_info() - dummy call
433 * @scn: hif context
434 * @data: hang event data buffer
435 * @offset: offset at which data needs to be written
436 *
437 * Return: bool
438 */
hif_dummy_log_bus_info(struct hif_softc * scn,uint8_t * data,unsigned int * offset)439 bool hif_dummy_log_bus_info(struct hif_softc *scn, uint8_t *data,
440 unsigned int *offset)
441 {
442 return false;
443 }
444
445 /**
446 * hif_dummy_enable_grp_irqs() - dummy call
447 * @scn: hif context
448 *
449 * Return: EOPNOTSUPP
450 */
hif_dummy_enable_grp_irqs(struct hif_softc * scn)451 int hif_dummy_enable_grp_irqs(struct hif_softc *scn)
452 {
453 return -EOPNOTSUPP;
454 }
455
456 /**
457 * hif_dummy_disable_grp_irqs() - dummy call
458 * @scn: hif context
459 *
460 * Return: EOPNOTSUPP
461 */
hif_dummy_disable_grp_irqs(struct hif_softc * scn)462 int hif_dummy_disable_grp_irqs(struct hif_softc *scn)
463 {
464 return -EOPNOTSUPP;
465 }
466
467 #ifdef FEATURE_IRQ_AFFINITY
hif_dummy_set_grp_intr_affinity(struct hif_softc * scn,uint32_t grp_intr_bitmap,bool perf)468 void hif_dummy_set_grp_intr_affinity(struct hif_softc *scn,
469 uint32_t grp_intr_bitmap, bool perf)
470 {
471 }
472 #endif
473
hif_dummy_affinity_mgr_set_affinity(struct hif_softc * scn)474 void hif_dummy_affinity_mgr_set_affinity(struct hif_softc *scn)
475 {
476 }
477