1 /* 2 * Copyright (C) 2007-2009 Texas Instruments Inc 3 * Copyright (C) 2007 MontaVista Software, Inc. 4 * 5 * Andy Lowe (alowe@mvista.com), MontaVista Software 6 * - Initial version 7 * Murali Karicheri (mkaricheri@gmail.com), Texas Instruments Ltd. 8 * - ported to sub device interface 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation version 2.. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 */ 20 #ifndef _OSD_H 21 #define _OSD_H 22 23 #include <media/davinci/vpbe_types.h> 24 25 #define DM644X_VPBE_OSD_SUBDEV_NAME "dm644x,vpbe-osd" 26 #define DM365_VPBE_OSD_SUBDEV_NAME "dm365,vpbe-osd" 27 #define DM355_VPBE_OSD_SUBDEV_NAME "dm355,vpbe-osd" 28 29 /** 30 * enum osd_layer 31 * @WIN_OSD0: On-Screen Display Window 0 32 * @WIN_VID0: Video Window 0 33 * @WIN_OSD1: On-Screen Display Window 1 34 * @WIN_VID1: Video Window 1 35 * 36 * Description: 37 * An enumeration of the osd display layers. 38 */ 39 enum osd_layer { 40 WIN_OSD0, 41 WIN_VID0, 42 WIN_OSD1, 43 WIN_VID1, 44 }; 45 46 /** 47 * enum osd_win_layer 48 * @OSDWIN_OSD0: On-Screen Display Window 0 49 * @OSDWIN_OSD1: On-Screen Display Window 1 50 * 51 * Description: 52 * An enumeration of the OSD Window layers. 53 */ 54 enum osd_win_layer { 55 OSDWIN_OSD0, 56 OSDWIN_OSD1, 57 }; 58 59 /** 60 * enum osd_pix_format 61 * @PIXFMT_1BPP: 1-bit-per-pixel bitmap 62 * @PIXFMT_2BPP: 2-bits-per-pixel bitmap 63 * @PIXFMT_4BPP: 4-bits-per-pixel bitmap 64 * @PIXFMT_8BPP: 8-bits-per-pixel bitmap 65 * @PIXFMT_RGB565: 16-bits-per-pixel RGB565 66 * @PIXFMT_YCbCrI: YUV 4:2:2 67 * @PIXFMT_RGB888: 24-bits-per-pixel RGB888 68 * @PIXFMT_YCrCbI: YUV 4:2:2 with chroma swap 69 * @PIXFMT_NV12: YUV 4:2:0 planar 70 * @PIXFMT_OSD_ATTR: OSD Attribute Window pixel format (4bpp) 71 * 72 * Description: 73 * An enumeration of the DaVinci pixel formats. 74 */ 75 enum osd_pix_format { 76 PIXFMT_1BPP = 0, 77 PIXFMT_2BPP, 78 PIXFMT_4BPP, 79 PIXFMT_8BPP, 80 PIXFMT_RGB565, 81 PIXFMT_YCBCRI, 82 PIXFMT_RGB888, 83 PIXFMT_YCRCBI, 84 PIXFMT_NV12, 85 PIXFMT_OSD_ATTR, 86 }; 87 88 /** 89 * enum osd_h_exp_ratio 90 * @H_EXP_OFF: no expansion (1/1) 91 * @H_EXP_9_OVER_8: 9/8 expansion ratio 92 * @H_EXP_3_OVER_2: 3/2 expansion ratio 93 * 94 * Description: 95 * An enumeration of the available horizontal expansion ratios. 96 */ 97 enum osd_h_exp_ratio { 98 H_EXP_OFF, 99 H_EXP_9_OVER_8, 100 H_EXP_3_OVER_2, 101 }; 102 103 /** 104 * enum osd_v_exp_ratio 105 * @V_EXP_OFF: no expansion (1/1) 106 * @V_EXP_6_OVER_5: 6/5 expansion ratio 107 * 108 * Description: 109 * An enumeration of the available vertical expansion ratios. 110 */ 111 enum osd_v_exp_ratio { 112 V_EXP_OFF, 113 V_EXP_6_OVER_5, 114 }; 115 116 /** 117 * enum osd_zoom_factor 118 * @ZOOM_X1: no zoom (x1) 119 * @ZOOM_X2: x2 zoom 120 * @ZOOM_X4: x4 zoom 121 * 122 * Description: 123 * An enumeration of the available zoom factors. 124 */ 125 enum osd_zoom_factor { 126 ZOOM_X1, 127 ZOOM_X2, 128 ZOOM_X4, 129 }; 130 131 /** 132 * enum osd_clut 133 * @ROM_CLUT: ROM CLUT 134 * @RAM_CLUT: RAM CLUT 135 * 136 * Description: 137 * An enumeration of the available Color Lookup Tables (CLUTs). 138 */ 139 enum osd_clut { 140 ROM_CLUT, 141 RAM_CLUT, 142 }; 143 144 /** 145 * enum osd_rom_clut 146 * @ROM_CLUT0: Macintosh CLUT 147 * @ROM_CLUT1: CLUT from DM270 and prior devices 148 * 149 * Description: 150 * An enumeration of the ROM Color Lookup Table (CLUT) options. 151 */ 152 enum osd_rom_clut { 153 ROM_CLUT0, 154 ROM_CLUT1, 155 }; 156 157 /** 158 * enum osd_blending_factor 159 * @OSD_0_VID_8: OSD pixels are fully transparent 160 * @OSD_1_VID_7: OSD pixels contribute 1/8, video pixels contribute 7/8 161 * @OSD_2_VID_6: OSD pixels contribute 2/8, video pixels contribute 6/8 162 * @OSD_3_VID_5: OSD pixels contribute 3/8, video pixels contribute 5/8 163 * @OSD_4_VID_4: OSD pixels contribute 4/8, video pixels contribute 4/8 164 * @OSD_5_VID_3: OSD pixels contribute 5/8, video pixels contribute 3/8 165 * @OSD_6_VID_2: OSD pixels contribute 6/8, video pixels contribute 2/8 166 * @OSD_8_VID_0: OSD pixels are fully opaque 167 * 168 * Description: 169 * An enumeration of the DaVinci pixel blending factor options. 170 */ 171 enum osd_blending_factor { 172 OSD_0_VID_8, 173 OSD_1_VID_7, 174 OSD_2_VID_6, 175 OSD_3_VID_5, 176 OSD_4_VID_4, 177 OSD_5_VID_3, 178 OSD_6_VID_2, 179 OSD_8_VID_0, 180 }; 181 182 /** 183 * enum osd_blink_interval 184 * @BLINK_X1: blink interval is 1 vertical refresh cycle 185 * @BLINK_X2: blink interval is 2 vertical refresh cycles 186 * @BLINK_X3: blink interval is 3 vertical refresh cycles 187 * @BLINK_X4: blink interval is 4 vertical refresh cycles 188 * 189 * Description: 190 * An enumeration of the DaVinci pixel blinking interval options. 191 */ 192 enum osd_blink_interval { 193 BLINK_X1, 194 BLINK_X2, 195 BLINK_X3, 196 BLINK_X4, 197 }; 198 199 /** 200 * enum osd_cursor_h_width 201 * @H_WIDTH_1: horizontal line width is 1 pixel 202 * @H_WIDTH_4: horizontal line width is 4 pixels 203 * @H_WIDTH_8: horizontal line width is 8 pixels 204 * @H_WIDTH_12: horizontal line width is 12 pixels 205 * @H_WIDTH_16: horizontal line width is 16 pixels 206 * @H_WIDTH_20: horizontal line width is 20 pixels 207 * @H_WIDTH_24: horizontal line width is 24 pixels 208 * @H_WIDTH_28: horizontal line width is 28 pixels 209 */ 210 enum osd_cursor_h_width { 211 H_WIDTH_1, 212 H_WIDTH_4, 213 H_WIDTH_8, 214 H_WIDTH_12, 215 H_WIDTH_16, 216 H_WIDTH_20, 217 H_WIDTH_24, 218 H_WIDTH_28, 219 }; 220 221 /** 222 * enum davinci_cursor_v_width 223 * @V_WIDTH_1: vertical line width is 1 line 224 * @V_WIDTH_2: vertical line width is 2 lines 225 * @V_WIDTH_4: vertical line width is 4 lines 226 * @V_WIDTH_6: vertical line width is 6 lines 227 * @V_WIDTH_8: vertical line width is 8 lines 228 * @V_WIDTH_10: vertical line width is 10 lines 229 * @V_WIDTH_12: vertical line width is 12 lines 230 * @V_WIDTH_14: vertical line width is 14 lines 231 */ 232 enum osd_cursor_v_width { 233 V_WIDTH_1, 234 V_WIDTH_2, 235 V_WIDTH_4, 236 V_WIDTH_6, 237 V_WIDTH_8, 238 V_WIDTH_10, 239 V_WIDTH_12, 240 V_WIDTH_14, 241 }; 242 243 /** 244 * struct osd_cursor_config 245 * @xsize: horizontal size in pixels 246 * @ysize: vertical size in lines 247 * @xpos: horizontal offset in pixels from the left edge of the display 248 * @ypos: vertical offset in lines from the top of the display 249 * @interlaced: Non-zero if the display is interlaced, or zero otherwise 250 * @h_width: horizontal line width 251 * @v_width: vertical line width 252 * @clut: the CLUT selector (ROM or RAM) for the cursor color 253 * @clut_index: an index into the CLUT for the cursor color 254 * 255 * Description: 256 * A structure describing the configuration parameters of the hardware 257 * rectangular cursor. 258 */ 259 struct osd_cursor_config { 260 unsigned xsize; 261 unsigned ysize; 262 unsigned xpos; 263 unsigned ypos; 264 int interlaced; 265 enum osd_cursor_h_width h_width; 266 enum osd_cursor_v_width v_width; 267 enum osd_clut clut; 268 unsigned char clut_index; 269 }; 270 271 /** 272 * struct osd_layer_config 273 * @pixfmt: pixel format 274 * @line_length: offset in bytes between start of each line in memory 275 * @xsize: number of horizontal pixels displayed per line 276 * @ysize: number of lines displayed 277 * @xpos: horizontal offset in pixels from the left edge of the display 278 * @ypos: vertical offset in lines from the top of the display 279 * @interlaced: Non-zero if the display is interlaced, or zero otherwise 280 * 281 * Description: 282 * A structure describing the configuration parameters of an On-Screen Display 283 * (OSD) or video layer related to how the image is stored in memory. 284 * @line_length must be a multiple of the cache line size (32 bytes). 285 */ 286 struct osd_layer_config { 287 enum osd_pix_format pixfmt; 288 unsigned line_length; 289 unsigned xsize; 290 unsigned ysize; 291 unsigned xpos; 292 unsigned ypos; 293 int interlaced; 294 }; 295 296 /* parameters that apply on a per-window (OSD or video) basis */ 297 struct osd_window_state { 298 int is_allocated; 299 int is_enabled; 300 unsigned long fb_base_phys; 301 enum osd_zoom_factor h_zoom; 302 enum osd_zoom_factor v_zoom; 303 struct osd_layer_config lconfig; 304 }; 305 306 /* parameters that apply on a per-OSD-window basis */ 307 struct osd_osdwin_state { 308 enum osd_clut clut; 309 enum osd_blending_factor blend; 310 int colorkey_blending; 311 unsigned colorkey; 312 int rec601_attenuation; 313 /* index is pixel value */ 314 unsigned char palette_map[16]; 315 }; 316 317 /* hardware rectangular cursor parameters */ 318 struct osd_cursor_state { 319 int is_enabled; 320 struct osd_cursor_config config; 321 }; 322 323 struct osd_state; 324 325 struct vpbe_osd_ops { 326 int (*initialize)(struct osd_state *sd); 327 int (*request_layer)(struct osd_state *sd, enum osd_layer layer); 328 void (*release_layer)(struct osd_state *sd, enum osd_layer layer); 329 int (*enable_layer)(struct osd_state *sd, enum osd_layer layer, 330 int otherwin); 331 void (*disable_layer)(struct osd_state *sd, enum osd_layer layer); 332 int (*set_layer_config)(struct osd_state *sd, enum osd_layer layer, 333 struct osd_layer_config *lconfig); 334 void (*get_layer_config)(struct osd_state *sd, enum osd_layer layer, 335 struct osd_layer_config *lconfig); 336 void (*start_layer)(struct osd_state *sd, enum osd_layer layer, 337 unsigned long fb_base_phys, 338 unsigned long cbcr_ofst); 339 void (*set_left_margin)(struct osd_state *sd, u32 val); 340 void (*set_top_margin)(struct osd_state *sd, u32 val); 341 void (*set_interpolation_filter)(struct osd_state *sd, int filter); 342 int (*set_vid_expansion)(struct osd_state *sd, 343 enum osd_h_exp_ratio h_exp, 344 enum osd_v_exp_ratio v_exp); 345 void (*get_vid_expansion)(struct osd_state *sd, 346 enum osd_h_exp_ratio *h_exp, 347 enum osd_v_exp_ratio *v_exp); 348 void (*set_zoom)(struct osd_state *sd, enum osd_layer layer, 349 enum osd_zoom_factor h_zoom, 350 enum osd_zoom_factor v_zoom); 351 }; 352 353 struct osd_state { 354 enum vpbe_version vpbe_type; 355 spinlock_t lock; 356 struct device *dev; 357 dma_addr_t osd_base_phys; 358 void __iomem *osd_base; 359 unsigned long osd_size; 360 /* 1-->the isr will toggle the VID0 ping-pong buffer */ 361 int pingpong; 362 int interpolation_filter; 363 int field_inversion; 364 enum osd_h_exp_ratio osd_h_exp; 365 enum osd_v_exp_ratio osd_v_exp; 366 enum osd_h_exp_ratio vid_h_exp; 367 enum osd_v_exp_ratio vid_v_exp; 368 enum osd_clut backg_clut; 369 unsigned backg_clut_index; 370 enum osd_rom_clut rom_clut; 371 int is_blinking; 372 /* attribute window blinking enabled */ 373 enum osd_blink_interval blink; 374 /* YCbCrI or YCrCbI */ 375 enum osd_pix_format yc_pixfmt; 376 /* columns are Y, Cb, Cr */ 377 unsigned char clut_ram[256][3]; 378 struct osd_cursor_state cursor; 379 /* OSD0, VID0, OSD1, VID1 */ 380 struct osd_window_state win[4]; 381 /* OSD0, OSD1 */ 382 struct osd_osdwin_state osdwin[2]; 383 /* OSD device Operations */ 384 struct vpbe_osd_ops ops; 385 }; 386 387 struct osd_platform_data { 388 int field_inv_wa_enable; 389 }; 390 391 #endif 392