1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2017 IBM Corp.
3 #ifndef _MISC_OCXL_H_
4 #define _MISC_OCXL_H_
5 
6 #include <linux/pci.h>
7 
8 /*
9  * Opencapi drivers all need some common facilities, like parsing the
10  * device configuration space, adding a Process Element to the Shared
11  * Process Area, etc...
12  *
13  * The ocxl module provides a kernel API, to allow other drivers to
14  * reuse common code. A bit like a in-kernel library.
15  */
16 
17 #define OCXL_AFU_NAME_SZ      (24+1)  /* add 1 for NULL termination */
18 
19 /*
20  * The following 2 structures are a fairly generic way of representing
21  * the configuration data for a function and AFU, as read from the
22  * configuration space.
23  */
24 struct ocxl_afu_config {
25 	u8 idx;
26 	int dvsec_afu_control_pos; /* offset of AFU control DVSEC */
27 	char name[OCXL_AFU_NAME_SZ];
28 	u8 version_major;
29 	u8 version_minor;
30 	u8 afuc_type;
31 	u8 afum_type;
32 	u8 profile;
33 	u8 global_mmio_bar;     /* global MMIO area */
34 	u64 global_mmio_offset;
35 	u32 global_mmio_size;
36 	u8 pp_mmio_bar;         /* per-process MMIO area */
37 	u64 pp_mmio_offset;
38 	u32 pp_mmio_stride;
39 	u8 log_mem_size;
40 	u8 pasid_supported_log;
41 	u16 actag_supported;
42 };
43 
44 struct ocxl_fn_config {
45 	int dvsec_tl_pos;       /* offset of the Transaction Layer DVSEC */
46 	int dvsec_function_pos; /* offset of the Function DVSEC */
47 	int dvsec_afu_info_pos; /* offset of the AFU information DVSEC */
48 	s8 max_pasid_log;
49 	s8 max_afu_index;
50 };
51 
52 /*
53  * Read the configuration space of a function and fill in a
54  * ocxl_fn_config structure with all the function details
55  */
56 extern int ocxl_config_read_function(struct pci_dev *dev,
57 				struct ocxl_fn_config *fn);
58 
59 /*
60  * Check if an AFU index is valid for the given function.
61  *
62  * AFU indexes can be sparse, so a driver should check all indexes up
63  * to the maximum found in the function description
64  */
65 extern int ocxl_config_check_afu_index(struct pci_dev *dev,
66 				struct ocxl_fn_config *fn, int afu_idx);
67 
68 /*
69  * Read the configuration space of a function for the AFU specified by
70  * the index 'afu_idx'. Fills in a ocxl_afu_config structure
71  */
72 extern int ocxl_config_read_afu(struct pci_dev *dev,
73 				struct ocxl_fn_config *fn,
74 				struct ocxl_afu_config *afu,
75 				u8 afu_idx);
76 
77 /*
78  * Get the max PASID value that can be used by the function
79  */
80 extern int ocxl_config_get_pasid_info(struct pci_dev *dev, int *count);
81 
82 /*
83  * Tell an AFU, by writing in the configuration space, the PASIDs that
84  * it can use. Range starts at 'pasid_base' and its size is a multiple
85  * of 2
86  *
87  * 'afu_control_offset' is the offset of the AFU control DVSEC which
88  * can be found in the function configuration
89  */
90 extern void ocxl_config_set_afu_pasid(struct pci_dev *dev,
91 				int afu_control_offset,
92 				int pasid_base, u32 pasid_count_log);
93 
94 /*
95  * Get the actag configuration for the function:
96  * 'base' is the first actag value that can be used.
97  * 'enabled' it the number of actags available, starting from base.
98  * 'supported' is the total number of actags desired by all the AFUs
99  *             of the function.
100  */
101 extern int ocxl_config_get_actag_info(struct pci_dev *dev,
102 				u16 *base, u16 *enabled, u16 *supported);
103 
104 /*
105  * Tell a function, by writing in the configuration space, the actags
106  * it can use.
107  *
108  * 'func_offset' is the offset of the Function DVSEC that can found in
109  * the function configuration
110  */
111 extern void ocxl_config_set_actag(struct pci_dev *dev, int func_offset,
112 				u32 actag_base, u32 actag_count);
113 
114 /*
115  * Tell an AFU, by writing in the configuration space, the actags it
116  * can use.
117  *
118  * 'afu_control_offset' is the offset of the AFU control DVSEC for the
119  * desired AFU. It can be found in the AFU configuration
120  */
121 extern void ocxl_config_set_afu_actag(struct pci_dev *dev,
122 				int afu_control_offset,
123 				int actag_base, int actag_count);
124 
125 /*
126  * Enable/disable an AFU, by writing in the configuration space.
127  *
128  * 'afu_control_offset' is the offset of the AFU control DVSEC for the
129  * desired AFU. It can be found in the AFU configuration
130  */
131 extern void ocxl_config_set_afu_state(struct pci_dev *dev,
132 				int afu_control_offset, int enable);
133 
134 /*
135  * Set the Transaction Layer configuration in the configuration space.
136  * Only needed for function 0.
137  *
138  * It queries the host TL capabilities, find some common ground
139  * between the host and device, and set the Transaction Layer on both
140  * accordingly.
141  */
142 extern int ocxl_config_set_TL(struct pci_dev *dev, int tl_dvsec);
143 
144 /*
145  * Request an AFU to terminate a PASID.
146  * Will return once the AFU has acked the request, or an error in case
147  * of timeout.
148  *
149  * The hardware can only terminate one PASID at a time, so caller must
150  * guarantee some kind of serialization.
151  *
152  * 'afu_control_offset' is the offset of the AFU control DVSEC for the
153  * desired AFU. It can be found in the AFU configuration
154  */
155 extern int ocxl_config_terminate_pasid(struct pci_dev *dev,
156 				int afu_control_offset, int pasid);
157 
158 /*
159  * Set up the opencapi link for the function.
160  *
161  * When called for the first time for a link, it sets up the Shared
162  * Process Area for the link and the interrupt handler to process
163  * translation faults.
164  *
165  * Returns a 'link handle' that should be used for further calls for
166  * the link
167  */
168 extern int ocxl_link_setup(struct pci_dev *dev, int PE_mask,
169 			void **link_handle);
170 
171 /*
172  * Remove the association between the function and its link.
173  */
174 extern void ocxl_link_release(struct pci_dev *dev, void *link_handle);
175 
176 /*
177  * Add a Process Element to the Shared Process Area for a link.
178  * The process is defined by its PASID, pid, tid and its mm_struct.
179  *
180  * 'xsl_err_cb' is an optional callback if the driver wants to be
181  * notified when the translation fault interrupt handler detects an
182  * address error.
183  * 'xsl_err_data' is an argument passed to the above callback, if
184  * defined
185  */
186 extern int ocxl_link_add_pe(void *link_handle, int pasid, u32 pidr, u32 tidr,
187 		u64 amr, struct mm_struct *mm,
188 		void (*xsl_err_cb)(void *data, u64 addr, u64 dsisr),
189 		void *xsl_err_data);
190 
191 /**
192  * Update values within a Process Element
193  *
194  * link_handle: the link handle associated with the process element
195  * pasid: the PASID for the AFU context
196  * tid: the new thread id for the process element
197  */
198 extern int ocxl_link_update_pe(void *link_handle, int pasid, __u16 tid);
199 
200 /*
201  * Remove a Process Element from the Shared Process Area for a link
202  */
203 extern int ocxl_link_remove_pe(void *link_handle, int pasid);
204 
205 /*
206  * Allocate an AFU interrupt associated to the link.
207  *
208  * 'hw_irq' is the hardware interrupt number
209  * 'obj_handle' is the 64-bit object handle to be passed to the AFU to
210  * trigger the interrupt.
211  * On P9, 'obj_handle' is an address, which, if written, triggers the
212  * interrupt. It is an MMIO address which needs to be remapped (one
213  * page).
214  */
215 extern int ocxl_link_irq_alloc(void *link_handle, int *hw_irq,
216 			u64 *obj_handle);
217 
218 /*
219  * Free a previously allocated AFU interrupt
220  */
221 extern void ocxl_link_free_irq(void *link_handle, int hw_irq);
222 
223 #endif /* _MISC_OCXL_H_ */
224