1 // SPDX-License-Identifier: GPL-2.0
2 /**
3 * PCI Endpoint *Controller* (EPC) library
4 *
5 * Copyright (C) 2017 Texas Instruments
6 * Author: Kishon Vijay Abraham I <kishon@ti.com>
7 */
8
9 #include <linux/device.h>
10 #include <linux/slab.h>
11 #include <linux/module.h>
12 #include <linux/of_device.h>
13
14 #include <linux/pci-epc.h>
15 #include <linux/pci-epf.h>
16 #include <linux/pci-ep-cfs.h>
17
18 static struct class *pci_epc_class;
19
devm_pci_epc_release(struct device * dev,void * res)20 static void devm_pci_epc_release(struct device *dev, void *res)
21 {
22 struct pci_epc *epc = *(struct pci_epc **)res;
23
24 pci_epc_destroy(epc);
25 }
26
devm_pci_epc_match(struct device * dev,void * res,void * match_data)27 static int devm_pci_epc_match(struct device *dev, void *res, void *match_data)
28 {
29 struct pci_epc **epc = res;
30
31 return *epc == match_data;
32 }
33
34 /**
35 * pci_epc_put() - release the PCI endpoint controller
36 * @epc: epc returned by pci_epc_get()
37 *
38 * release the refcount the caller obtained by invoking pci_epc_get()
39 */
pci_epc_put(struct pci_epc * epc)40 void pci_epc_put(struct pci_epc *epc)
41 {
42 if (!epc || IS_ERR(epc))
43 return;
44
45 module_put(epc->ops->owner);
46 put_device(&epc->dev);
47 }
48 EXPORT_SYMBOL_GPL(pci_epc_put);
49
50 /**
51 * pci_epc_get() - get the PCI endpoint controller
52 * @epc_name: device name of the endpoint controller
53 *
54 * Invoke to get struct pci_epc * corresponding to the device name of the
55 * endpoint controller
56 */
pci_epc_get(const char * epc_name)57 struct pci_epc *pci_epc_get(const char *epc_name)
58 {
59 int ret = -EINVAL;
60 struct pci_epc *epc;
61 struct device *dev;
62 struct class_dev_iter iter;
63
64 class_dev_iter_init(&iter, pci_epc_class, NULL, NULL);
65 while ((dev = class_dev_iter_next(&iter))) {
66 if (strcmp(epc_name, dev_name(dev)))
67 continue;
68
69 epc = to_pci_epc(dev);
70 if (!try_module_get(epc->ops->owner)) {
71 ret = -EINVAL;
72 goto err;
73 }
74
75 class_dev_iter_exit(&iter);
76 get_device(&epc->dev);
77 return epc;
78 }
79
80 err:
81 class_dev_iter_exit(&iter);
82 return ERR_PTR(ret);
83 }
84 EXPORT_SYMBOL_GPL(pci_epc_get);
85
86 /**
87 * pci_epc_stop() - stop the PCI link
88 * @epc: the link of the EPC device that has to be stopped
89 *
90 * Invoke to stop the PCI link
91 */
pci_epc_stop(struct pci_epc * epc)92 void pci_epc_stop(struct pci_epc *epc)
93 {
94 unsigned long flags;
95
96 if (IS_ERR(epc) || !epc->ops->stop)
97 return;
98
99 spin_lock_irqsave(&epc->lock, flags);
100 epc->ops->stop(epc);
101 spin_unlock_irqrestore(&epc->lock, flags);
102 }
103 EXPORT_SYMBOL_GPL(pci_epc_stop);
104
105 /**
106 * pci_epc_start() - start the PCI link
107 * @epc: the link of *this* EPC device has to be started
108 *
109 * Invoke to start the PCI link
110 */
pci_epc_start(struct pci_epc * epc)111 int pci_epc_start(struct pci_epc *epc)
112 {
113 int ret;
114 unsigned long flags;
115
116 if (IS_ERR(epc))
117 return -EINVAL;
118
119 if (!epc->ops->start)
120 return 0;
121
122 spin_lock_irqsave(&epc->lock, flags);
123 ret = epc->ops->start(epc);
124 spin_unlock_irqrestore(&epc->lock, flags);
125
126 return ret;
127 }
128 EXPORT_SYMBOL_GPL(pci_epc_start);
129
130 /**
131 * pci_epc_raise_irq() - interrupt the host system
132 * @epc: the EPC device which has to interrupt the host
133 * @func_no: the endpoint function number in the EPC device
134 * @type: specify the type of interrupt; legacy, MSI or MSI-X
135 * @interrupt_num: the MSI or MSI-X interrupt number
136 *
137 * Invoke to raise an legacy, MSI or MSI-X interrupt
138 */
pci_epc_raise_irq(struct pci_epc * epc,u8 func_no,enum pci_epc_irq_type type,u16 interrupt_num)139 int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no,
140 enum pci_epc_irq_type type, u16 interrupt_num)
141 {
142 int ret;
143 unsigned long flags;
144
145 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
146 return -EINVAL;
147
148 if (!epc->ops->raise_irq)
149 return 0;
150
151 spin_lock_irqsave(&epc->lock, flags);
152 ret = epc->ops->raise_irq(epc, func_no, type, interrupt_num);
153 spin_unlock_irqrestore(&epc->lock, flags);
154
155 return ret;
156 }
157 EXPORT_SYMBOL_GPL(pci_epc_raise_irq);
158
159 /**
160 * pci_epc_get_msi() - get the number of MSI interrupt numbers allocated
161 * @epc: the EPC device to which MSI interrupts was requested
162 * @func_no: the endpoint function number in the EPC device
163 *
164 * Invoke to get the number of MSI interrupts allocated by the RC
165 */
pci_epc_get_msi(struct pci_epc * epc,u8 func_no)166 int pci_epc_get_msi(struct pci_epc *epc, u8 func_no)
167 {
168 int interrupt;
169 unsigned long flags;
170
171 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
172 return 0;
173
174 if (!epc->ops->get_msi)
175 return 0;
176
177 spin_lock_irqsave(&epc->lock, flags);
178 interrupt = epc->ops->get_msi(epc, func_no);
179 spin_unlock_irqrestore(&epc->lock, flags);
180
181 if (interrupt < 0)
182 return 0;
183
184 interrupt = 1 << interrupt;
185
186 return interrupt;
187 }
188 EXPORT_SYMBOL_GPL(pci_epc_get_msi);
189
190 /**
191 * pci_epc_set_msi() - set the number of MSI interrupt numbers required
192 * @epc: the EPC device on which MSI has to be configured
193 * @func_no: the endpoint function number in the EPC device
194 * @interrupts: number of MSI interrupts required by the EPF
195 *
196 * Invoke to set the required number of MSI interrupts.
197 */
pci_epc_set_msi(struct pci_epc * epc,u8 func_no,u8 interrupts)198 int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 interrupts)
199 {
200 int ret;
201 u8 encode_int;
202 unsigned long flags;
203
204 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions ||
205 interrupts > 32)
206 return -EINVAL;
207
208 if (!epc->ops->set_msi)
209 return 0;
210
211 encode_int = order_base_2(interrupts);
212
213 spin_lock_irqsave(&epc->lock, flags);
214 ret = epc->ops->set_msi(epc, func_no, encode_int);
215 spin_unlock_irqrestore(&epc->lock, flags);
216
217 return ret;
218 }
219 EXPORT_SYMBOL_GPL(pci_epc_set_msi);
220
221 /**
222 * pci_epc_get_msix() - get the number of MSI-X interrupt numbers allocated
223 * @epc: the EPC device to which MSI-X interrupts was requested
224 * @func_no: the endpoint function number in the EPC device
225 *
226 * Invoke to get the number of MSI-X interrupts allocated by the RC
227 */
pci_epc_get_msix(struct pci_epc * epc,u8 func_no)228 int pci_epc_get_msix(struct pci_epc *epc, u8 func_no)
229 {
230 int interrupt;
231 unsigned long flags;
232
233 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
234 return 0;
235
236 if (!epc->ops->get_msix)
237 return 0;
238
239 spin_lock_irqsave(&epc->lock, flags);
240 interrupt = epc->ops->get_msix(epc, func_no);
241 spin_unlock_irqrestore(&epc->lock, flags);
242
243 if (interrupt < 0)
244 return 0;
245
246 return interrupt + 1;
247 }
248 EXPORT_SYMBOL_GPL(pci_epc_get_msix);
249
250 /**
251 * pci_epc_set_msix() - set the number of MSI-X interrupt numbers required
252 * @epc: the EPC device on which MSI-X has to be configured
253 * @func_no: the endpoint function number in the EPC device
254 * @interrupts: number of MSI-X interrupts required by the EPF
255 *
256 * Invoke to set the required number of MSI-X interrupts.
257 */
pci_epc_set_msix(struct pci_epc * epc,u8 func_no,u16 interrupts)258 int pci_epc_set_msix(struct pci_epc *epc, u8 func_no, u16 interrupts)
259 {
260 int ret;
261 unsigned long flags;
262
263 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions ||
264 interrupts < 1 || interrupts > 2048)
265 return -EINVAL;
266
267 if (!epc->ops->set_msix)
268 return 0;
269
270 spin_lock_irqsave(&epc->lock, flags);
271 ret = epc->ops->set_msix(epc, func_no, interrupts - 1);
272 spin_unlock_irqrestore(&epc->lock, flags);
273
274 return ret;
275 }
276 EXPORT_SYMBOL_GPL(pci_epc_set_msix);
277
278 /**
279 * pci_epc_unmap_addr() - unmap CPU address from PCI address
280 * @epc: the EPC device on which address is allocated
281 * @func_no: the endpoint function number in the EPC device
282 * @phys_addr: physical address of the local system
283 *
284 * Invoke to unmap the CPU address from PCI address.
285 */
pci_epc_unmap_addr(struct pci_epc * epc,u8 func_no,phys_addr_t phys_addr)286 void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no,
287 phys_addr_t phys_addr)
288 {
289 unsigned long flags;
290
291 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
292 return;
293
294 if (!epc->ops->unmap_addr)
295 return;
296
297 spin_lock_irqsave(&epc->lock, flags);
298 epc->ops->unmap_addr(epc, func_no, phys_addr);
299 spin_unlock_irqrestore(&epc->lock, flags);
300 }
301 EXPORT_SYMBOL_GPL(pci_epc_unmap_addr);
302
303 /**
304 * pci_epc_map_addr() - map CPU address to PCI address
305 * @epc: the EPC device on which address is allocated
306 * @func_no: the endpoint function number in the EPC device
307 * @phys_addr: physical address of the local system
308 * @pci_addr: PCI address to which the physical address should be mapped
309 * @size: the size of the allocation
310 *
311 * Invoke to map CPU address with PCI address.
312 */
pci_epc_map_addr(struct pci_epc * epc,u8 func_no,phys_addr_t phys_addr,u64 pci_addr,size_t size)313 int pci_epc_map_addr(struct pci_epc *epc, u8 func_no,
314 phys_addr_t phys_addr, u64 pci_addr, size_t size)
315 {
316 int ret;
317 unsigned long flags;
318
319 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
320 return -EINVAL;
321
322 if (!epc->ops->map_addr)
323 return 0;
324
325 spin_lock_irqsave(&epc->lock, flags);
326 ret = epc->ops->map_addr(epc, func_no, phys_addr, pci_addr, size);
327 spin_unlock_irqrestore(&epc->lock, flags);
328
329 return ret;
330 }
331 EXPORT_SYMBOL_GPL(pci_epc_map_addr);
332
333 /**
334 * pci_epc_clear_bar() - reset the BAR
335 * @epc: the EPC device for which the BAR has to be cleared
336 * @func_no: the endpoint function number in the EPC device
337 * @epf_bar: the struct epf_bar that contains the BAR information
338 *
339 * Invoke to reset the BAR of the endpoint device.
340 */
pci_epc_clear_bar(struct pci_epc * epc,u8 func_no,struct pci_epf_bar * epf_bar)341 void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no,
342 struct pci_epf_bar *epf_bar)
343 {
344 unsigned long flags;
345
346 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions ||
347 (epf_bar->barno == BAR_5 &&
348 epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64))
349 return;
350
351 if (!epc->ops->clear_bar)
352 return;
353
354 spin_lock_irqsave(&epc->lock, flags);
355 epc->ops->clear_bar(epc, func_no, epf_bar);
356 spin_unlock_irqrestore(&epc->lock, flags);
357 }
358 EXPORT_SYMBOL_GPL(pci_epc_clear_bar);
359
360 /**
361 * pci_epc_set_bar() - configure BAR in order for host to assign PCI addr space
362 * @epc: the EPC device on which BAR has to be configured
363 * @func_no: the endpoint function number in the EPC device
364 * @epf_bar: the struct epf_bar that contains the BAR information
365 *
366 * Invoke to configure the BAR of the endpoint device.
367 */
pci_epc_set_bar(struct pci_epc * epc,u8 func_no,struct pci_epf_bar * epf_bar)368 int pci_epc_set_bar(struct pci_epc *epc, u8 func_no,
369 struct pci_epf_bar *epf_bar)
370 {
371 int ret;
372 unsigned long irq_flags;
373 int flags = epf_bar->flags;
374
375 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions ||
376 (epf_bar->barno == BAR_5 &&
377 flags & PCI_BASE_ADDRESS_MEM_TYPE_64) ||
378 (flags & PCI_BASE_ADDRESS_SPACE_IO &&
379 flags & PCI_BASE_ADDRESS_IO_MASK) ||
380 (upper_32_bits(epf_bar->size) &&
381 !(flags & PCI_BASE_ADDRESS_MEM_TYPE_64)))
382 return -EINVAL;
383
384 if (!epc->ops->set_bar)
385 return 0;
386
387 spin_lock_irqsave(&epc->lock, irq_flags);
388 ret = epc->ops->set_bar(epc, func_no, epf_bar);
389 spin_unlock_irqrestore(&epc->lock, irq_flags);
390
391 return ret;
392 }
393 EXPORT_SYMBOL_GPL(pci_epc_set_bar);
394
395 /**
396 * pci_epc_write_header() - write standard configuration header
397 * @epc: the EPC device to which the configuration header should be written
398 * @func_no: the endpoint function number in the EPC device
399 * @header: standard configuration header fields
400 *
401 * Invoke to write the configuration header to the endpoint controller. Every
402 * endpoint controller will have a dedicated location to which the standard
403 * configuration header would be written. The callback function should write
404 * the header fields to this dedicated location.
405 */
pci_epc_write_header(struct pci_epc * epc,u8 func_no,struct pci_epf_header * header)406 int pci_epc_write_header(struct pci_epc *epc, u8 func_no,
407 struct pci_epf_header *header)
408 {
409 int ret;
410 unsigned long flags;
411
412 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
413 return -EINVAL;
414
415 if (!epc->ops->write_header)
416 return 0;
417
418 spin_lock_irqsave(&epc->lock, flags);
419 ret = epc->ops->write_header(epc, func_no, header);
420 spin_unlock_irqrestore(&epc->lock, flags);
421
422 return ret;
423 }
424 EXPORT_SYMBOL_GPL(pci_epc_write_header);
425
426 /**
427 * pci_epc_add_epf() - bind PCI endpoint function to an endpoint controller
428 * @epc: the EPC device to which the endpoint function should be added
429 * @epf: the endpoint function to be added
430 *
431 * A PCI endpoint device can have one or more functions. In the case of PCIe,
432 * the specification allows up to 8 PCIe endpoint functions. Invoke
433 * pci_epc_add_epf() to add a PCI endpoint function to an endpoint controller.
434 */
pci_epc_add_epf(struct pci_epc * epc,struct pci_epf * epf)435 int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf)
436 {
437 unsigned long flags;
438
439 if (epf->epc)
440 return -EBUSY;
441
442 if (IS_ERR(epc))
443 return -EINVAL;
444
445 if (epf->func_no > epc->max_functions - 1)
446 return -EINVAL;
447
448 epf->epc = epc;
449
450 spin_lock_irqsave(&epc->lock, flags);
451 list_add_tail(&epf->list, &epc->pci_epf);
452 spin_unlock_irqrestore(&epc->lock, flags);
453
454 return 0;
455 }
456 EXPORT_SYMBOL_GPL(pci_epc_add_epf);
457
458 /**
459 * pci_epc_remove_epf() - remove PCI endpoint function from endpoint controller
460 * @epc: the EPC device from which the endpoint function should be removed
461 * @epf: the endpoint function to be removed
462 *
463 * Invoke to remove PCI endpoint function from the endpoint controller.
464 */
pci_epc_remove_epf(struct pci_epc * epc,struct pci_epf * epf)465 void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf)
466 {
467 unsigned long flags;
468
469 if (!epc || IS_ERR(epc))
470 return;
471
472 spin_lock_irqsave(&epc->lock, flags);
473 list_del(&epf->list);
474 spin_unlock_irqrestore(&epc->lock, flags);
475 }
476 EXPORT_SYMBOL_GPL(pci_epc_remove_epf);
477
478 /**
479 * pci_epc_linkup() - Notify the EPF device that EPC device has established a
480 * connection with the Root Complex.
481 * @epc: the EPC device which has established link with the host
482 *
483 * Invoke to Notify the EPF device that the EPC device has established a
484 * connection with the Root Complex.
485 */
pci_epc_linkup(struct pci_epc * epc)486 void pci_epc_linkup(struct pci_epc *epc)
487 {
488 unsigned long flags;
489 struct pci_epf *epf;
490
491 if (!epc || IS_ERR(epc))
492 return;
493
494 spin_lock_irqsave(&epc->lock, flags);
495 list_for_each_entry(epf, &epc->pci_epf, list)
496 pci_epf_linkup(epf);
497 spin_unlock_irqrestore(&epc->lock, flags);
498 }
499 EXPORT_SYMBOL_GPL(pci_epc_linkup);
500
501 /**
502 * pci_epc_destroy() - destroy the EPC device
503 * @epc: the EPC device that has to be destroyed
504 *
505 * Invoke to destroy the PCI EPC device
506 */
pci_epc_destroy(struct pci_epc * epc)507 void pci_epc_destroy(struct pci_epc *epc)
508 {
509 pci_ep_cfs_remove_epc_group(epc->group);
510 device_unregister(&epc->dev);
511 kfree(epc);
512 }
513 EXPORT_SYMBOL_GPL(pci_epc_destroy);
514
515 /**
516 * devm_pci_epc_destroy() - destroy the EPC device
517 * @dev: device that wants to destroy the EPC
518 * @epc: the EPC device that has to be destroyed
519 *
520 * Invoke to destroy the devres associated with this
521 * pci_epc and destroy the EPC device.
522 */
devm_pci_epc_destroy(struct device * dev,struct pci_epc * epc)523 void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc)
524 {
525 int r;
526
527 r = devres_destroy(dev, devm_pci_epc_release, devm_pci_epc_match,
528 epc);
529 dev_WARN_ONCE(dev, r, "couldn't find PCI EPC resource\n");
530 }
531 EXPORT_SYMBOL_GPL(devm_pci_epc_destroy);
532
533 /**
534 * __pci_epc_create() - create a new endpoint controller (EPC) device
535 * @dev: device that is creating the new EPC
536 * @ops: function pointers for performing EPC operations
537 * @owner: the owner of the module that creates the EPC device
538 *
539 * Invoke to create a new EPC device and add it to pci_epc class.
540 */
541 struct pci_epc *
__pci_epc_create(struct device * dev,const struct pci_epc_ops * ops,struct module * owner)542 __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
543 struct module *owner)
544 {
545 int ret;
546 struct pci_epc *epc;
547
548 if (WARN_ON(!dev)) {
549 ret = -EINVAL;
550 goto err_ret;
551 }
552
553 epc = kzalloc(sizeof(*epc), GFP_KERNEL);
554 if (!epc) {
555 ret = -ENOMEM;
556 goto err_ret;
557 }
558
559 spin_lock_init(&epc->lock);
560 INIT_LIST_HEAD(&epc->pci_epf);
561
562 device_initialize(&epc->dev);
563 epc->dev.class = pci_epc_class;
564 epc->dev.parent = dev;
565 epc->ops = ops;
566
567 ret = dev_set_name(&epc->dev, "%s", dev_name(dev));
568 if (ret)
569 goto put_dev;
570
571 ret = device_add(&epc->dev);
572 if (ret)
573 goto put_dev;
574
575 epc->group = pci_ep_cfs_add_epc_group(dev_name(dev));
576
577 return epc;
578
579 put_dev:
580 put_device(&epc->dev);
581 kfree(epc);
582
583 err_ret:
584 return ERR_PTR(ret);
585 }
586 EXPORT_SYMBOL_GPL(__pci_epc_create);
587
588 /**
589 * __devm_pci_epc_create() - create a new endpoint controller (EPC) device
590 * @dev: device that is creating the new EPC
591 * @ops: function pointers for performing EPC operations
592 * @owner: the owner of the module that creates the EPC device
593 *
594 * Invoke to create a new EPC device and add it to pci_epc class.
595 * While at that, it also associates the device with the pci_epc using devres.
596 * On driver detach, release function is invoked on the devres data,
597 * then, devres data is freed.
598 */
599 struct pci_epc *
__devm_pci_epc_create(struct device * dev,const struct pci_epc_ops * ops,struct module * owner)600 __devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
601 struct module *owner)
602 {
603 struct pci_epc **ptr, *epc;
604
605 ptr = devres_alloc(devm_pci_epc_release, sizeof(*ptr), GFP_KERNEL);
606 if (!ptr)
607 return ERR_PTR(-ENOMEM);
608
609 epc = __pci_epc_create(dev, ops, owner);
610 if (!IS_ERR(epc)) {
611 *ptr = epc;
612 devres_add(dev, ptr);
613 } else {
614 devres_free(ptr);
615 }
616
617 return epc;
618 }
619 EXPORT_SYMBOL_GPL(__devm_pci_epc_create);
620
pci_epc_init(void)621 static int __init pci_epc_init(void)
622 {
623 pci_epc_class = class_create(THIS_MODULE, "pci_epc");
624 if (IS_ERR(pci_epc_class)) {
625 pr_err("failed to create pci epc class --> %ld\n",
626 PTR_ERR(pci_epc_class));
627 return PTR_ERR(pci_epc_class);
628 }
629
630 return 0;
631 }
632 module_init(pci_epc_init);
633
pci_epc_exit(void)634 static void __exit pci_epc_exit(void)
635 {
636 class_destroy(pci_epc_class);
637 }
638 module_exit(pci_epc_exit);
639
640 MODULE_DESCRIPTION("PCI EPC Library");
641 MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>");
642 MODULE_LICENSE("GPL v2");
643