1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * PCI Express I/O Virtualization (IOV) support
4  *   Single Root IOV 1.0
5  *   Address Translation Service 1.0
6  *
7  * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
8  */
9 
10 #include <linux/pci.h>
11 #include <linux/slab.h>
12 #include <linux/mutex.h>
13 #include <linux/export.h>
14 #include <linux/string.h>
15 #include <linux/delay.h>
16 #include <linux/pci-ats.h>
17 #include "pci.h"
18 
19 #define VIRTFN_ID_LEN	16
20 
pci_iov_virtfn_bus(struct pci_dev * dev,int vf_id)21 int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id)
22 {
23 	if (!dev->is_physfn)
24 		return -EINVAL;
25 	return dev->bus->number + ((dev->devfn + dev->sriov->offset +
26 				    dev->sriov->stride * vf_id) >> 8);
27 }
28 
pci_iov_virtfn_devfn(struct pci_dev * dev,int vf_id)29 int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id)
30 {
31 	if (!dev->is_physfn)
32 		return -EINVAL;
33 	return (dev->devfn + dev->sriov->offset +
34 		dev->sriov->stride * vf_id) & 0xff;
35 }
36 
37 /*
38  * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may
39  * change when NumVFs changes.
40  *
41  * Update iov->offset and iov->stride when NumVFs is written.
42  */
pci_iov_set_numvfs(struct pci_dev * dev,int nr_virtfn)43 static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
44 {
45 	struct pci_sriov *iov = dev->sriov;
46 
47 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
48 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
49 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
50 }
51 
52 /*
53  * The PF consumes one bus number.  NumVFs, First VF Offset, and VF Stride
54  * determine how many additional bus numbers will be consumed by VFs.
55  *
56  * Iterate over all valid NumVFs, validate offset and stride, and calculate
57  * the maximum number of bus numbers that could ever be required.
58  */
compute_max_vf_buses(struct pci_dev * dev)59 static int compute_max_vf_buses(struct pci_dev *dev)
60 {
61 	struct pci_sriov *iov = dev->sriov;
62 	int nr_virtfn, busnr, rc = 0;
63 
64 	for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) {
65 		pci_iov_set_numvfs(dev, nr_virtfn);
66 		if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) {
67 			rc = -EIO;
68 			goto out;
69 		}
70 
71 		busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
72 		if (busnr > iov->max_VF_buses)
73 			iov->max_VF_buses = busnr;
74 	}
75 
76 out:
77 	pci_iov_set_numvfs(dev, 0);
78 	return rc;
79 }
80 
virtfn_add_bus(struct pci_bus * bus,int busnr)81 static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
82 {
83 	struct pci_bus *child;
84 
85 	if (bus->number == busnr)
86 		return bus;
87 
88 	child = pci_find_bus(pci_domain_nr(bus), busnr);
89 	if (child)
90 		return child;
91 
92 	child = pci_add_new_bus(bus, NULL, busnr);
93 	if (!child)
94 		return NULL;
95 
96 	pci_bus_insert_busn_res(child, busnr, busnr);
97 
98 	return child;
99 }
100 
virtfn_remove_bus(struct pci_bus * physbus,struct pci_bus * virtbus)101 static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
102 {
103 	if (physbus != virtbus && list_empty(&virtbus->devices))
104 		pci_remove_bus(virtbus);
105 }
106 
pci_iov_resource_size(struct pci_dev * dev,int resno)107 resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
108 {
109 	if (!dev->is_physfn)
110 		return 0;
111 
112 	return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
113 }
114 
pci_read_vf_config_common(struct pci_dev * virtfn)115 static void pci_read_vf_config_common(struct pci_dev *virtfn)
116 {
117 	struct pci_dev *physfn = virtfn->physfn;
118 
119 	/*
120 	 * Some config registers are the same across all associated VFs.
121 	 * Read them once from VF0 so we can skip reading them from the
122 	 * other VFs.
123 	 *
124 	 * PCIe r4.0, sec 9.3.4.1, technically doesn't require all VFs to
125 	 * have the same Revision ID and Subsystem ID, but we assume they
126 	 * do.
127 	 */
128 	pci_read_config_dword(virtfn, PCI_CLASS_REVISION,
129 			      &physfn->sriov->class);
130 	pci_read_config_byte(virtfn, PCI_HEADER_TYPE,
131 			     &physfn->sriov->hdr_type);
132 	pci_read_config_word(virtfn, PCI_SUBSYSTEM_VENDOR_ID,
133 			     &physfn->sriov->subsystem_vendor);
134 	pci_read_config_word(virtfn, PCI_SUBSYSTEM_ID,
135 			     &physfn->sriov->subsystem_device);
136 }
137 
pci_iov_add_virtfn(struct pci_dev * dev,int id)138 int pci_iov_add_virtfn(struct pci_dev *dev, int id)
139 {
140 	int i;
141 	int rc = -ENOMEM;
142 	u64 size;
143 	char buf[VIRTFN_ID_LEN];
144 	struct pci_dev *virtfn;
145 	struct resource *res;
146 	struct pci_sriov *iov = dev->sriov;
147 	struct pci_bus *bus;
148 
149 	bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id));
150 	if (!bus)
151 		goto failed;
152 
153 	virtfn = pci_alloc_dev(bus);
154 	if (!virtfn)
155 		goto failed0;
156 
157 	virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
158 	virtfn->vendor = dev->vendor;
159 	virtfn->device = iov->vf_device;
160 	virtfn->is_virtfn = 1;
161 	virtfn->physfn = pci_dev_get(dev);
162 
163 	if (id == 0)
164 		pci_read_vf_config_common(virtfn);
165 
166 	rc = pci_setup_device(virtfn);
167 	if (rc)
168 		goto failed1;
169 
170 	virtfn->dev.parent = dev->dev.parent;
171 	virtfn->multifunction = 0;
172 
173 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
174 		res = &dev->resource[i + PCI_IOV_RESOURCES];
175 		if (!res->parent)
176 			continue;
177 		virtfn->resource[i].name = pci_name(virtfn);
178 		virtfn->resource[i].flags = res->flags;
179 		size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES);
180 		virtfn->resource[i].start = res->start + size * id;
181 		virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
182 		rc = request_resource(res, &virtfn->resource[i]);
183 		BUG_ON(rc);
184 	}
185 
186 	pci_device_add(virtfn, virtfn->bus);
187 
188 	sprintf(buf, "virtfn%u", id);
189 	rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
190 	if (rc)
191 		goto failed1;
192 	rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
193 	if (rc)
194 		goto failed2;
195 
196 	kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
197 
198 	pci_bus_add_device(virtfn);
199 
200 	return 0;
201 
202 failed2:
203 	sysfs_remove_link(&dev->dev.kobj, buf);
204 failed1:
205 	pci_stop_and_remove_bus_device(virtfn);
206 	pci_dev_put(dev);
207 failed0:
208 	virtfn_remove_bus(dev->bus, bus);
209 failed:
210 
211 	return rc;
212 }
213 
pci_iov_remove_virtfn(struct pci_dev * dev,int id)214 void pci_iov_remove_virtfn(struct pci_dev *dev, int id)
215 {
216 	char buf[VIRTFN_ID_LEN];
217 	struct pci_dev *virtfn;
218 
219 	virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
220 					     pci_iov_virtfn_bus(dev, id),
221 					     pci_iov_virtfn_devfn(dev, id));
222 	if (!virtfn)
223 		return;
224 
225 	sprintf(buf, "virtfn%u", id);
226 	sysfs_remove_link(&dev->dev.kobj, buf);
227 	/*
228 	 * pci_stop_dev() could have been called for this virtfn already,
229 	 * so the directory for the virtfn may have been removed before.
230 	 * Double check to avoid spurious sysfs warnings.
231 	 */
232 	if (virtfn->dev.kobj.sd)
233 		sysfs_remove_link(&virtfn->dev.kobj, "physfn");
234 
235 	pci_stop_and_remove_bus_device(virtfn);
236 	virtfn_remove_bus(dev->bus, virtfn->bus);
237 
238 	/* balance pci_get_domain_bus_and_slot() */
239 	pci_dev_put(virtfn);
240 	pci_dev_put(dev);
241 }
242 
pcibios_sriov_enable(struct pci_dev * pdev,u16 num_vfs)243 int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
244 {
245 	return 0;
246 }
247 
pcibios_sriov_disable(struct pci_dev * pdev)248 int __weak pcibios_sriov_disable(struct pci_dev *pdev)
249 {
250 	return 0;
251 }
252 
sriov_enable(struct pci_dev * dev,int nr_virtfn)253 static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
254 {
255 	int rc;
256 	int i;
257 	int nres;
258 	u16 initial;
259 	struct resource *res;
260 	struct pci_dev *pdev;
261 	struct pci_sriov *iov = dev->sriov;
262 	int bars = 0;
263 	int bus;
264 
265 	if (!nr_virtfn)
266 		return 0;
267 
268 	if (iov->num_VFs)
269 		return -EINVAL;
270 
271 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
272 	if (initial > iov->total_VFs ||
273 	    (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
274 		return -EIO;
275 
276 	if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
277 	    (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
278 		return -EINVAL;
279 
280 	nres = 0;
281 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
282 		bars |= (1 << (i + PCI_IOV_RESOURCES));
283 		res = &dev->resource[i + PCI_IOV_RESOURCES];
284 		if (res->parent)
285 			nres++;
286 	}
287 	if (nres != iov->nres) {
288 		pci_err(dev, "not enough MMIO resources for SR-IOV\n");
289 		return -ENOMEM;
290 	}
291 
292 	bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
293 	if (bus > dev->bus->busn_res.end) {
294 		pci_err(dev, "can't enable %d VFs (bus %02x out of range of %pR)\n",
295 			nr_virtfn, bus, &dev->bus->busn_res);
296 		return -ENOMEM;
297 	}
298 
299 	if (pci_enable_resources(dev, bars)) {
300 		pci_err(dev, "SR-IOV: IOV BARS not allocated\n");
301 		return -ENOMEM;
302 	}
303 
304 	if (iov->link != dev->devfn) {
305 		pdev = pci_get_slot(dev->bus, iov->link);
306 		if (!pdev)
307 			return -ENODEV;
308 
309 		if (!pdev->is_physfn) {
310 			pci_dev_put(pdev);
311 			return -ENOSYS;
312 		}
313 
314 		rc = sysfs_create_link(&dev->dev.kobj,
315 					&pdev->dev.kobj, "dep_link");
316 		pci_dev_put(pdev);
317 		if (rc)
318 			return rc;
319 	}
320 
321 	iov->initial_VFs = initial;
322 	if (nr_virtfn < initial)
323 		initial = nr_virtfn;
324 
325 	rc = pcibios_sriov_enable(dev, initial);
326 	if (rc) {
327 		pci_err(dev, "failure %d from pcibios_sriov_enable()\n", rc);
328 		goto err_pcibios;
329 	}
330 
331 	pci_iov_set_numvfs(dev, nr_virtfn);
332 	iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
333 	pci_cfg_access_lock(dev);
334 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
335 	msleep(100);
336 	pci_cfg_access_unlock(dev);
337 
338 	for (i = 0; i < initial; i++) {
339 		rc = pci_iov_add_virtfn(dev, i);
340 		if (rc)
341 			goto failed;
342 	}
343 
344 	kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
345 	iov->num_VFs = nr_virtfn;
346 
347 	return 0;
348 
349 failed:
350 	while (i--)
351 		pci_iov_remove_virtfn(dev, i);
352 
353 err_pcibios:
354 	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
355 	pci_cfg_access_lock(dev);
356 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
357 	ssleep(1);
358 	pci_cfg_access_unlock(dev);
359 
360 	pcibios_sriov_disable(dev);
361 
362 	if (iov->link != dev->devfn)
363 		sysfs_remove_link(&dev->dev.kobj, "dep_link");
364 
365 	pci_iov_set_numvfs(dev, 0);
366 	return rc;
367 }
368 
sriov_disable(struct pci_dev * dev)369 static void sriov_disable(struct pci_dev *dev)
370 {
371 	int i;
372 	struct pci_sriov *iov = dev->sriov;
373 
374 	if (!iov->num_VFs)
375 		return;
376 
377 	for (i = 0; i < iov->num_VFs; i++)
378 		pci_iov_remove_virtfn(dev, i);
379 
380 	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
381 	pci_cfg_access_lock(dev);
382 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
383 	ssleep(1);
384 	pci_cfg_access_unlock(dev);
385 
386 	pcibios_sriov_disable(dev);
387 
388 	if (iov->link != dev->devfn)
389 		sysfs_remove_link(&dev->dev.kobj, "dep_link");
390 
391 	iov->num_VFs = 0;
392 	pci_iov_set_numvfs(dev, 0);
393 }
394 
sriov_init(struct pci_dev * dev,int pos)395 static int sriov_init(struct pci_dev *dev, int pos)
396 {
397 	int i, bar64;
398 	int rc;
399 	int nres;
400 	u32 pgsz;
401 	u16 ctrl, total;
402 	struct pci_sriov *iov;
403 	struct resource *res;
404 	struct pci_dev *pdev;
405 
406 	pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
407 	if (ctrl & PCI_SRIOV_CTRL_VFE) {
408 		pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
409 		ssleep(1);
410 	}
411 
412 	ctrl = 0;
413 	list_for_each_entry(pdev, &dev->bus->devices, bus_list)
414 		if (pdev->is_physfn)
415 			goto found;
416 
417 	pdev = NULL;
418 	if (pci_ari_enabled(dev->bus))
419 		ctrl |= PCI_SRIOV_CTRL_ARI;
420 
421 found:
422 	pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
423 
424 	pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
425 	if (!total)
426 		return 0;
427 
428 	pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
429 	i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
430 	pgsz &= ~((1 << i) - 1);
431 	if (!pgsz)
432 		return -EIO;
433 
434 	pgsz &= ~(pgsz - 1);
435 	pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
436 
437 	iov = kzalloc(sizeof(*iov), GFP_KERNEL);
438 	if (!iov)
439 		return -ENOMEM;
440 
441 	nres = 0;
442 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
443 		res = &dev->resource[i + PCI_IOV_RESOURCES];
444 		/*
445 		 * If it is already FIXED, don't change it, something
446 		 * (perhaps EA or header fixups) wants it this way.
447 		 */
448 		if (res->flags & IORESOURCE_PCI_FIXED)
449 			bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
450 		else
451 			bar64 = __pci_read_base(dev, pci_bar_unknown, res,
452 						pos + PCI_SRIOV_BAR + i * 4);
453 		if (!res->flags)
454 			continue;
455 		if (resource_size(res) & (PAGE_SIZE - 1)) {
456 			rc = -EIO;
457 			goto failed;
458 		}
459 		iov->barsz[i] = resource_size(res);
460 		res->end = res->start + resource_size(res) * total - 1;
461 		pci_info(dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
462 			 i, res, i, total);
463 		i += bar64;
464 		nres++;
465 	}
466 
467 	iov->pos = pos;
468 	iov->nres = nres;
469 	iov->ctrl = ctrl;
470 	iov->total_VFs = total;
471 	iov->driver_max_VFs = total;
472 	pci_read_config_word(dev, pos + PCI_SRIOV_VF_DID, &iov->vf_device);
473 	iov->pgsz = pgsz;
474 	iov->self = dev;
475 	iov->drivers_autoprobe = true;
476 	pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
477 	pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
478 	if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
479 		iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
480 
481 	if (pdev)
482 		iov->dev = pci_dev_get(pdev);
483 	else
484 		iov->dev = dev;
485 
486 	dev->sriov = iov;
487 	dev->is_physfn = 1;
488 	rc = compute_max_vf_buses(dev);
489 	if (rc)
490 		goto fail_max_buses;
491 
492 	return 0;
493 
494 fail_max_buses:
495 	dev->sriov = NULL;
496 	dev->is_physfn = 0;
497 failed:
498 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
499 		res = &dev->resource[i + PCI_IOV_RESOURCES];
500 		res->flags = 0;
501 	}
502 
503 	kfree(iov);
504 	return rc;
505 }
506 
sriov_release(struct pci_dev * dev)507 static void sriov_release(struct pci_dev *dev)
508 {
509 	BUG_ON(dev->sriov->num_VFs);
510 
511 	if (dev != dev->sriov->dev)
512 		pci_dev_put(dev->sriov->dev);
513 
514 	kfree(dev->sriov);
515 	dev->sriov = NULL;
516 }
517 
sriov_restore_state(struct pci_dev * dev)518 static void sriov_restore_state(struct pci_dev *dev)
519 {
520 	int i;
521 	u16 ctrl;
522 	struct pci_sriov *iov = dev->sriov;
523 
524 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
525 	if (ctrl & PCI_SRIOV_CTRL_VFE)
526 		return;
527 
528 	/*
529 	 * Restore PCI_SRIOV_CTRL_ARI before pci_iov_set_numvfs() because
530 	 * it reads offset & stride, which depend on PCI_SRIOV_CTRL_ARI.
531 	 */
532 	ctrl &= ~PCI_SRIOV_CTRL_ARI;
533 	ctrl |= iov->ctrl & PCI_SRIOV_CTRL_ARI;
534 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, ctrl);
535 
536 	for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
537 		pci_update_resource(dev, i);
538 
539 	pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
540 	pci_iov_set_numvfs(dev, iov->num_VFs);
541 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
542 	if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
543 		msleep(100);
544 }
545 
546 /**
547  * pci_iov_init - initialize the IOV capability
548  * @dev: the PCI device
549  *
550  * Returns 0 on success, or negative on failure.
551  */
pci_iov_init(struct pci_dev * dev)552 int pci_iov_init(struct pci_dev *dev)
553 {
554 	int pos;
555 
556 	if (!pci_is_pcie(dev))
557 		return -ENODEV;
558 
559 	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
560 	if (pos)
561 		return sriov_init(dev, pos);
562 
563 	return -ENODEV;
564 }
565 
566 /**
567  * pci_iov_release - release resources used by the IOV capability
568  * @dev: the PCI device
569  */
pci_iov_release(struct pci_dev * dev)570 void pci_iov_release(struct pci_dev *dev)
571 {
572 	if (dev->is_physfn)
573 		sriov_release(dev);
574 }
575 
576 /**
577  * pci_iov_remove - clean up SR-IOV state after PF driver is detached
578  * @dev: the PCI device
579  */
pci_iov_remove(struct pci_dev * dev)580 void pci_iov_remove(struct pci_dev *dev)
581 {
582 	struct pci_sriov *iov = dev->sriov;
583 
584 	if (!dev->is_physfn)
585 		return;
586 
587 	iov->driver_max_VFs = iov->total_VFs;
588 	if (iov->num_VFs)
589 		pci_warn(dev, "driver left SR-IOV enabled after remove\n");
590 }
591 
592 /**
593  * pci_iov_update_resource - update a VF BAR
594  * @dev: the PCI device
595  * @resno: the resource number
596  *
597  * Update a VF BAR in the SR-IOV capability of a PF.
598  */
pci_iov_update_resource(struct pci_dev * dev,int resno)599 void pci_iov_update_resource(struct pci_dev *dev, int resno)
600 {
601 	struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL;
602 	struct resource *res = dev->resource + resno;
603 	int vf_bar = resno - PCI_IOV_RESOURCES;
604 	struct pci_bus_region region;
605 	u16 cmd;
606 	u32 new;
607 	int reg;
608 
609 	/*
610 	 * The generic pci_restore_bars() path calls this for all devices,
611 	 * including VFs and non-SR-IOV devices.  If this is not a PF, we
612 	 * have nothing to do.
613 	 */
614 	if (!iov)
615 		return;
616 
617 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd);
618 	if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) {
619 		dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n",
620 			 vf_bar, res);
621 		return;
622 	}
623 
624 	/*
625 	 * Ignore unimplemented BARs, unused resource slots for 64-bit
626 	 * BARs, and non-movable resources, e.g., those described via
627 	 * Enhanced Allocation.
628 	 */
629 	if (!res->flags)
630 		return;
631 
632 	if (res->flags & IORESOURCE_UNSET)
633 		return;
634 
635 	if (res->flags & IORESOURCE_PCI_FIXED)
636 		return;
637 
638 	pcibios_resource_to_bus(dev->bus, &region, res);
639 	new = region.start;
640 	new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;
641 
642 	reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar;
643 	pci_write_config_dword(dev, reg, new);
644 	if (res->flags & IORESOURCE_MEM_64) {
645 		new = region.start >> 16 >> 16;
646 		pci_write_config_dword(dev, reg + 4, new);
647 	}
648 }
649 
pcibios_iov_resource_alignment(struct pci_dev * dev,int resno)650 resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev,
651 						      int resno)
652 {
653 	return pci_iov_resource_size(dev, resno);
654 }
655 
656 /**
657  * pci_sriov_resource_alignment - get resource alignment for VF BAR
658  * @dev: the PCI device
659  * @resno: the resource number
660  *
661  * Returns the alignment of the VF BAR found in the SR-IOV capability.
662  * This is not the same as the resource size which is defined as
663  * the VF BAR size multiplied by the number of VFs.  The alignment
664  * is just the VF BAR size.
665  */
pci_sriov_resource_alignment(struct pci_dev * dev,int resno)666 resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
667 {
668 	return pcibios_iov_resource_alignment(dev, resno);
669 }
670 
671 /**
672  * pci_restore_iov_state - restore the state of the IOV capability
673  * @dev: the PCI device
674  */
pci_restore_iov_state(struct pci_dev * dev)675 void pci_restore_iov_state(struct pci_dev *dev)
676 {
677 	if (dev->is_physfn)
678 		sriov_restore_state(dev);
679 }
680 
681 /**
682  * pci_vf_drivers_autoprobe - set PF property drivers_autoprobe for VFs
683  * @dev: the PCI device
684  * @auto_probe: set VF drivers auto probe flag
685  */
pci_vf_drivers_autoprobe(struct pci_dev * dev,bool auto_probe)686 void pci_vf_drivers_autoprobe(struct pci_dev *dev, bool auto_probe)
687 {
688 	if (dev->is_physfn)
689 		dev->sriov->drivers_autoprobe = auto_probe;
690 }
691 
692 /**
693  * pci_iov_bus_range - find bus range used by Virtual Function
694  * @bus: the PCI bus
695  *
696  * Returns max number of buses (exclude current one) used by Virtual
697  * Functions.
698  */
pci_iov_bus_range(struct pci_bus * bus)699 int pci_iov_bus_range(struct pci_bus *bus)
700 {
701 	int max = 0;
702 	struct pci_dev *dev;
703 
704 	list_for_each_entry(dev, &bus->devices, bus_list) {
705 		if (!dev->is_physfn)
706 			continue;
707 		if (dev->sriov->max_VF_buses > max)
708 			max = dev->sriov->max_VF_buses;
709 	}
710 
711 	return max ? max - bus->number : 0;
712 }
713 
714 /**
715  * pci_enable_sriov - enable the SR-IOV capability
716  * @dev: the PCI device
717  * @nr_virtfn: number of virtual functions to enable
718  *
719  * Returns 0 on success, or negative on failure.
720  */
pci_enable_sriov(struct pci_dev * dev,int nr_virtfn)721 int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
722 {
723 	might_sleep();
724 
725 	if (!dev->is_physfn)
726 		return -ENOSYS;
727 
728 	return sriov_enable(dev, nr_virtfn);
729 }
730 EXPORT_SYMBOL_GPL(pci_enable_sriov);
731 
732 /**
733  * pci_disable_sriov - disable the SR-IOV capability
734  * @dev: the PCI device
735  */
pci_disable_sriov(struct pci_dev * dev)736 void pci_disable_sriov(struct pci_dev *dev)
737 {
738 	might_sleep();
739 
740 	if (!dev->is_physfn)
741 		return;
742 
743 	sriov_disable(dev);
744 }
745 EXPORT_SYMBOL_GPL(pci_disable_sriov);
746 
747 /**
748  * pci_num_vf - return number of VFs associated with a PF device_release_driver
749  * @dev: the PCI device
750  *
751  * Returns number of VFs, or 0 if SR-IOV is not enabled.
752  */
pci_num_vf(struct pci_dev * dev)753 int pci_num_vf(struct pci_dev *dev)
754 {
755 	if (!dev->is_physfn)
756 		return 0;
757 
758 	return dev->sriov->num_VFs;
759 }
760 EXPORT_SYMBOL_GPL(pci_num_vf);
761 
762 /**
763  * pci_vfs_assigned - returns number of VFs are assigned to a guest
764  * @dev: the PCI device
765  *
766  * Returns number of VFs belonging to this device that are assigned to a guest.
767  * If device is not a physical function returns 0.
768  */
pci_vfs_assigned(struct pci_dev * dev)769 int pci_vfs_assigned(struct pci_dev *dev)
770 {
771 	struct pci_dev *vfdev;
772 	unsigned int vfs_assigned = 0;
773 	unsigned short dev_id;
774 
775 	/* only search if we are a PF */
776 	if (!dev->is_physfn)
777 		return 0;
778 
779 	/*
780 	 * determine the device ID for the VFs, the vendor ID will be the
781 	 * same as the PF so there is no need to check for that one
782 	 */
783 	dev_id = dev->sriov->vf_device;
784 
785 	/* loop through all the VFs to see if we own any that are assigned */
786 	vfdev = pci_get_device(dev->vendor, dev_id, NULL);
787 	while (vfdev) {
788 		/*
789 		 * It is considered assigned if it is a virtual function with
790 		 * our dev as the physical function and the assigned bit is set
791 		 */
792 		if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
793 			pci_is_dev_assigned(vfdev))
794 			vfs_assigned++;
795 
796 		vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
797 	}
798 
799 	return vfs_assigned;
800 }
801 EXPORT_SYMBOL_GPL(pci_vfs_assigned);
802 
803 /**
804  * pci_sriov_set_totalvfs -- reduce the TotalVFs available
805  * @dev: the PCI PF device
806  * @numvfs: number that should be used for TotalVFs supported
807  *
808  * Should be called from PF driver's probe routine with
809  * device's mutex held.
810  *
811  * Returns 0 if PF is an SRIOV-capable device and
812  * value of numvfs valid. If not a PF return -ENOSYS;
813  * if numvfs is invalid return -EINVAL;
814  * if VFs already enabled, return -EBUSY.
815  */
pci_sriov_set_totalvfs(struct pci_dev * dev,u16 numvfs)816 int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
817 {
818 	if (!dev->is_physfn)
819 		return -ENOSYS;
820 
821 	if (numvfs > dev->sriov->total_VFs)
822 		return -EINVAL;
823 
824 	/* Shouldn't change if VFs already enabled */
825 	if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
826 		return -EBUSY;
827 
828 	dev->sriov->driver_max_VFs = numvfs;
829 	return 0;
830 }
831 EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
832 
833 /**
834  * pci_sriov_get_totalvfs -- get total VFs supported on this device
835  * @dev: the PCI PF device
836  *
837  * For a PCIe device with SRIOV support, return the PCIe
838  * SRIOV capability value of TotalVFs or the value of driver_max_VFs
839  * if the driver reduced it.  Otherwise 0.
840  */
pci_sriov_get_totalvfs(struct pci_dev * dev)841 int pci_sriov_get_totalvfs(struct pci_dev *dev)
842 {
843 	if (!dev->is_physfn)
844 		return 0;
845 
846 	return dev->sriov->driver_max_VFs;
847 }
848 EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);
849 
850 /**
851  * pci_sriov_configure_simple - helper to configure SR-IOV
852  * @dev: the PCI device
853  * @nr_virtfn: number of virtual functions to enable, 0 to disable
854  *
855  * Enable or disable SR-IOV for devices that don't require any PF setup
856  * before enabling SR-IOV.  Return value is negative on error, or number of
857  * VFs allocated on success.
858  */
pci_sriov_configure_simple(struct pci_dev * dev,int nr_virtfn)859 int pci_sriov_configure_simple(struct pci_dev *dev, int nr_virtfn)
860 {
861 	int rc;
862 
863 	might_sleep();
864 
865 	if (!dev->is_physfn)
866 		return -ENODEV;
867 
868 	if (pci_vfs_assigned(dev)) {
869 		pci_warn(dev, "Cannot modify SR-IOV while VFs are assigned\n");
870 		return -EPERM;
871 	}
872 
873 	if (nr_virtfn == 0) {
874 		sriov_disable(dev);
875 		return 0;
876 	}
877 
878 	rc = sriov_enable(dev, nr_virtfn);
879 	if (rc < 0)
880 		return rc;
881 
882 	return nr_virtfn;
883 }
884 EXPORT_SYMBOL_GPL(pci_sriov_configure_simple);
885