1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Microsemi Switchtec(tm) PCIe Management Driver
4 * Copyright (c) 2017, Microsemi Corporation
5 */
6
7 #include <linux/switchtec.h>
8 #include <linux/switchtec_ioctl.h>
9
10 #include <linux/interrupt.h>
11 #include <linux/module.h>
12 #include <linux/fs.h>
13 #include <linux/uaccess.h>
14 #include <linux/poll.h>
15 #include <linux/wait.h>
16 #include <linux/io-64-nonatomic-lo-hi.h>
17 #include <linux/nospec.h>
18
19 MODULE_DESCRIPTION("Microsemi Switchtec(tm) PCIe Management Driver");
20 MODULE_VERSION("0.1");
21 MODULE_LICENSE("GPL");
22 MODULE_AUTHOR("Microsemi Corporation");
23
24 static int max_devices = 16;
25 module_param(max_devices, int, 0644);
26 MODULE_PARM_DESC(max_devices, "max number of switchtec device instances");
27
28 static dev_t switchtec_devt;
29 static DEFINE_IDA(switchtec_minor_ida);
30
31 struct class *switchtec_class;
32 EXPORT_SYMBOL_GPL(switchtec_class);
33
34 enum mrpc_state {
35 MRPC_IDLE = 0,
36 MRPC_QUEUED,
37 MRPC_RUNNING,
38 MRPC_DONE,
39 };
40
41 struct switchtec_user {
42 struct switchtec_dev *stdev;
43
44 enum mrpc_state state;
45
46 struct completion comp;
47 struct kref kref;
48 struct list_head list;
49
50 u32 cmd;
51 u32 status;
52 u32 return_code;
53 size_t data_len;
54 size_t read_len;
55 unsigned char data[SWITCHTEC_MRPC_PAYLOAD_SIZE];
56 int event_cnt;
57 };
58
stuser_create(struct switchtec_dev * stdev)59 static struct switchtec_user *stuser_create(struct switchtec_dev *stdev)
60 {
61 struct switchtec_user *stuser;
62
63 stuser = kzalloc(sizeof(*stuser), GFP_KERNEL);
64 if (!stuser)
65 return ERR_PTR(-ENOMEM);
66
67 get_device(&stdev->dev);
68 stuser->stdev = stdev;
69 kref_init(&stuser->kref);
70 INIT_LIST_HEAD(&stuser->list);
71 init_completion(&stuser->comp);
72 stuser->event_cnt = atomic_read(&stdev->event_cnt);
73
74 dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser);
75
76 return stuser;
77 }
78
stuser_free(struct kref * kref)79 static void stuser_free(struct kref *kref)
80 {
81 struct switchtec_user *stuser;
82
83 stuser = container_of(kref, struct switchtec_user, kref);
84
85 dev_dbg(&stuser->stdev->dev, "%s: %p\n", __func__, stuser);
86
87 put_device(&stuser->stdev->dev);
88 kfree(stuser);
89 }
90
stuser_put(struct switchtec_user * stuser)91 static void stuser_put(struct switchtec_user *stuser)
92 {
93 kref_put(&stuser->kref, stuser_free);
94 }
95
stuser_set_state(struct switchtec_user * stuser,enum mrpc_state state)96 static void stuser_set_state(struct switchtec_user *stuser,
97 enum mrpc_state state)
98 {
99 /* requires the mrpc_mutex to already be held when called */
100
101 const char * const state_names[] = {
102 [MRPC_IDLE] = "IDLE",
103 [MRPC_QUEUED] = "QUEUED",
104 [MRPC_RUNNING] = "RUNNING",
105 [MRPC_DONE] = "DONE",
106 };
107
108 stuser->state = state;
109
110 dev_dbg(&stuser->stdev->dev, "stuser state %p -> %s",
111 stuser, state_names[state]);
112 }
113
114 static void mrpc_complete_cmd(struct switchtec_dev *stdev);
115
mrpc_cmd_submit(struct switchtec_dev * stdev)116 static void mrpc_cmd_submit(struct switchtec_dev *stdev)
117 {
118 /* requires the mrpc_mutex to already be held when called */
119
120 struct switchtec_user *stuser;
121
122 if (stdev->mrpc_busy)
123 return;
124
125 if (list_empty(&stdev->mrpc_queue))
126 return;
127
128 stuser = list_entry(stdev->mrpc_queue.next, struct switchtec_user,
129 list);
130
131 stuser_set_state(stuser, MRPC_RUNNING);
132 stdev->mrpc_busy = 1;
133 memcpy_toio(&stdev->mmio_mrpc->input_data,
134 stuser->data, stuser->data_len);
135 iowrite32(stuser->cmd, &stdev->mmio_mrpc->cmd);
136
137 schedule_delayed_work(&stdev->mrpc_timeout,
138 msecs_to_jiffies(500));
139 }
140
mrpc_queue_cmd(struct switchtec_user * stuser)141 static int mrpc_queue_cmd(struct switchtec_user *stuser)
142 {
143 /* requires the mrpc_mutex to already be held when called */
144
145 struct switchtec_dev *stdev = stuser->stdev;
146
147 kref_get(&stuser->kref);
148 stuser->read_len = sizeof(stuser->data);
149 stuser_set_state(stuser, MRPC_QUEUED);
150 reinit_completion(&stuser->comp);
151 list_add_tail(&stuser->list, &stdev->mrpc_queue);
152
153 mrpc_cmd_submit(stdev);
154
155 return 0;
156 }
157
mrpc_complete_cmd(struct switchtec_dev * stdev)158 static void mrpc_complete_cmd(struct switchtec_dev *stdev)
159 {
160 /* requires the mrpc_mutex to already be held when called */
161 struct switchtec_user *stuser;
162
163 if (list_empty(&stdev->mrpc_queue))
164 return;
165
166 stuser = list_entry(stdev->mrpc_queue.next, struct switchtec_user,
167 list);
168
169 stuser->status = ioread32(&stdev->mmio_mrpc->status);
170 if (stuser->status == SWITCHTEC_MRPC_STATUS_INPROGRESS)
171 return;
172
173 stuser_set_state(stuser, MRPC_DONE);
174 stuser->return_code = 0;
175
176 if (stuser->status != SWITCHTEC_MRPC_STATUS_DONE)
177 goto out;
178
179 stuser->return_code = ioread32(&stdev->mmio_mrpc->ret_value);
180 if (stuser->return_code != 0)
181 goto out;
182
183 memcpy_fromio(stuser->data, &stdev->mmio_mrpc->output_data,
184 stuser->read_len);
185
186 out:
187 complete_all(&stuser->comp);
188 list_del_init(&stuser->list);
189 stuser_put(stuser);
190 stdev->mrpc_busy = 0;
191
192 mrpc_cmd_submit(stdev);
193 }
194
mrpc_event_work(struct work_struct * work)195 static void mrpc_event_work(struct work_struct *work)
196 {
197 struct switchtec_dev *stdev;
198
199 stdev = container_of(work, struct switchtec_dev, mrpc_work);
200
201 dev_dbg(&stdev->dev, "%s\n", __func__);
202
203 mutex_lock(&stdev->mrpc_mutex);
204 cancel_delayed_work(&stdev->mrpc_timeout);
205 mrpc_complete_cmd(stdev);
206 mutex_unlock(&stdev->mrpc_mutex);
207 }
208
mrpc_timeout_work(struct work_struct * work)209 static void mrpc_timeout_work(struct work_struct *work)
210 {
211 struct switchtec_dev *stdev;
212 u32 status;
213
214 stdev = container_of(work, struct switchtec_dev, mrpc_timeout.work);
215
216 dev_dbg(&stdev->dev, "%s\n", __func__);
217
218 mutex_lock(&stdev->mrpc_mutex);
219
220 status = ioread32(&stdev->mmio_mrpc->status);
221 if (status == SWITCHTEC_MRPC_STATUS_INPROGRESS) {
222 schedule_delayed_work(&stdev->mrpc_timeout,
223 msecs_to_jiffies(500));
224 goto out;
225 }
226
227 mrpc_complete_cmd(stdev);
228
229 out:
230 mutex_unlock(&stdev->mrpc_mutex);
231 }
232
device_version_show(struct device * dev,struct device_attribute * attr,char * buf)233 static ssize_t device_version_show(struct device *dev,
234 struct device_attribute *attr, char *buf)
235 {
236 struct switchtec_dev *stdev = to_stdev(dev);
237 u32 ver;
238
239 ver = ioread32(&stdev->mmio_sys_info->device_version);
240
241 return sprintf(buf, "%x\n", ver);
242 }
243 static DEVICE_ATTR_RO(device_version);
244
fw_version_show(struct device * dev,struct device_attribute * attr,char * buf)245 static ssize_t fw_version_show(struct device *dev,
246 struct device_attribute *attr, char *buf)
247 {
248 struct switchtec_dev *stdev = to_stdev(dev);
249 u32 ver;
250
251 ver = ioread32(&stdev->mmio_sys_info->firmware_version);
252
253 return sprintf(buf, "%08x\n", ver);
254 }
255 static DEVICE_ATTR_RO(fw_version);
256
io_string_show(char * buf,void __iomem * attr,size_t len)257 static ssize_t io_string_show(char *buf, void __iomem *attr, size_t len)
258 {
259 int i;
260
261 memcpy_fromio(buf, attr, len);
262 buf[len] = '\n';
263 buf[len + 1] = 0;
264
265 for (i = len - 1; i > 0; i--) {
266 if (buf[i] != ' ')
267 break;
268 buf[i] = '\n';
269 buf[i + 1] = 0;
270 }
271
272 return strlen(buf);
273 }
274
275 #define DEVICE_ATTR_SYS_INFO_STR(field) \
276 static ssize_t field ## _show(struct device *dev, \
277 struct device_attribute *attr, char *buf) \
278 { \
279 struct switchtec_dev *stdev = to_stdev(dev); \
280 return io_string_show(buf, &stdev->mmio_sys_info->field, \
281 sizeof(stdev->mmio_sys_info->field)); \
282 } \
283 \
284 static DEVICE_ATTR_RO(field)
285
286 DEVICE_ATTR_SYS_INFO_STR(vendor_id);
287 DEVICE_ATTR_SYS_INFO_STR(product_id);
288 DEVICE_ATTR_SYS_INFO_STR(product_revision);
289 DEVICE_ATTR_SYS_INFO_STR(component_vendor);
290
component_id_show(struct device * dev,struct device_attribute * attr,char * buf)291 static ssize_t component_id_show(struct device *dev,
292 struct device_attribute *attr, char *buf)
293 {
294 struct switchtec_dev *stdev = to_stdev(dev);
295 int id = ioread16(&stdev->mmio_sys_info->component_id);
296
297 return sprintf(buf, "PM%04X\n", id);
298 }
299 static DEVICE_ATTR_RO(component_id);
300
component_revision_show(struct device * dev,struct device_attribute * attr,char * buf)301 static ssize_t component_revision_show(struct device *dev,
302 struct device_attribute *attr, char *buf)
303 {
304 struct switchtec_dev *stdev = to_stdev(dev);
305 int rev = ioread8(&stdev->mmio_sys_info->component_revision);
306
307 return sprintf(buf, "%d\n", rev);
308 }
309 static DEVICE_ATTR_RO(component_revision);
310
partition_show(struct device * dev,struct device_attribute * attr,char * buf)311 static ssize_t partition_show(struct device *dev,
312 struct device_attribute *attr, char *buf)
313 {
314 struct switchtec_dev *stdev = to_stdev(dev);
315
316 return sprintf(buf, "%d\n", stdev->partition);
317 }
318 static DEVICE_ATTR_RO(partition);
319
partition_count_show(struct device * dev,struct device_attribute * attr,char * buf)320 static ssize_t partition_count_show(struct device *dev,
321 struct device_attribute *attr, char *buf)
322 {
323 struct switchtec_dev *stdev = to_stdev(dev);
324
325 return sprintf(buf, "%d\n", stdev->partition_count);
326 }
327 static DEVICE_ATTR_RO(partition_count);
328
329 static struct attribute *switchtec_device_attrs[] = {
330 &dev_attr_device_version.attr,
331 &dev_attr_fw_version.attr,
332 &dev_attr_vendor_id.attr,
333 &dev_attr_product_id.attr,
334 &dev_attr_product_revision.attr,
335 &dev_attr_component_vendor.attr,
336 &dev_attr_component_id.attr,
337 &dev_attr_component_revision.attr,
338 &dev_attr_partition.attr,
339 &dev_attr_partition_count.attr,
340 NULL,
341 };
342
343 ATTRIBUTE_GROUPS(switchtec_device);
344
switchtec_dev_open(struct inode * inode,struct file * filp)345 static int switchtec_dev_open(struct inode *inode, struct file *filp)
346 {
347 struct switchtec_dev *stdev;
348 struct switchtec_user *stuser;
349
350 stdev = container_of(inode->i_cdev, struct switchtec_dev, cdev);
351
352 stuser = stuser_create(stdev);
353 if (IS_ERR(stuser))
354 return PTR_ERR(stuser);
355
356 filp->private_data = stuser;
357 nonseekable_open(inode, filp);
358
359 dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser);
360
361 return 0;
362 }
363
switchtec_dev_release(struct inode * inode,struct file * filp)364 static int switchtec_dev_release(struct inode *inode, struct file *filp)
365 {
366 struct switchtec_user *stuser = filp->private_data;
367
368 stuser_put(stuser);
369
370 return 0;
371 }
372
lock_mutex_and_test_alive(struct switchtec_dev * stdev)373 static int lock_mutex_and_test_alive(struct switchtec_dev *stdev)
374 {
375 if (mutex_lock_interruptible(&stdev->mrpc_mutex))
376 return -EINTR;
377
378 if (!stdev->alive) {
379 mutex_unlock(&stdev->mrpc_mutex);
380 return -ENODEV;
381 }
382
383 return 0;
384 }
385
switchtec_dev_write(struct file * filp,const char __user * data,size_t size,loff_t * off)386 static ssize_t switchtec_dev_write(struct file *filp, const char __user *data,
387 size_t size, loff_t *off)
388 {
389 struct switchtec_user *stuser = filp->private_data;
390 struct switchtec_dev *stdev = stuser->stdev;
391 int rc;
392
393 if (size < sizeof(stuser->cmd) ||
394 size > sizeof(stuser->cmd) + sizeof(stuser->data))
395 return -EINVAL;
396
397 stuser->data_len = size - sizeof(stuser->cmd);
398
399 rc = lock_mutex_and_test_alive(stdev);
400 if (rc)
401 return rc;
402
403 if (stuser->state != MRPC_IDLE) {
404 rc = -EBADE;
405 goto out;
406 }
407
408 rc = copy_from_user(&stuser->cmd, data, sizeof(stuser->cmd));
409 if (rc) {
410 rc = -EFAULT;
411 goto out;
412 }
413
414 data += sizeof(stuser->cmd);
415 rc = copy_from_user(&stuser->data, data, size - sizeof(stuser->cmd));
416 if (rc) {
417 rc = -EFAULT;
418 goto out;
419 }
420
421 rc = mrpc_queue_cmd(stuser);
422
423 out:
424 mutex_unlock(&stdev->mrpc_mutex);
425
426 if (rc)
427 return rc;
428
429 return size;
430 }
431
switchtec_dev_read(struct file * filp,char __user * data,size_t size,loff_t * off)432 static ssize_t switchtec_dev_read(struct file *filp, char __user *data,
433 size_t size, loff_t *off)
434 {
435 struct switchtec_user *stuser = filp->private_data;
436 struct switchtec_dev *stdev = stuser->stdev;
437 int rc;
438
439 if (size < sizeof(stuser->cmd) ||
440 size > sizeof(stuser->cmd) + sizeof(stuser->data))
441 return -EINVAL;
442
443 rc = lock_mutex_and_test_alive(stdev);
444 if (rc)
445 return rc;
446
447 if (stuser->state == MRPC_IDLE) {
448 mutex_unlock(&stdev->mrpc_mutex);
449 return -EBADE;
450 }
451
452 stuser->read_len = size - sizeof(stuser->return_code);
453
454 mutex_unlock(&stdev->mrpc_mutex);
455
456 if (filp->f_flags & O_NONBLOCK) {
457 if (!try_wait_for_completion(&stuser->comp))
458 return -EAGAIN;
459 } else {
460 rc = wait_for_completion_interruptible(&stuser->comp);
461 if (rc < 0)
462 return rc;
463 }
464
465 rc = lock_mutex_and_test_alive(stdev);
466 if (rc)
467 return rc;
468
469 if (stuser->state != MRPC_DONE) {
470 mutex_unlock(&stdev->mrpc_mutex);
471 return -EBADE;
472 }
473
474 rc = copy_to_user(data, &stuser->return_code,
475 sizeof(stuser->return_code));
476 if (rc) {
477 rc = -EFAULT;
478 goto out;
479 }
480
481 data += sizeof(stuser->return_code);
482 rc = copy_to_user(data, &stuser->data,
483 size - sizeof(stuser->return_code));
484 if (rc) {
485 rc = -EFAULT;
486 goto out;
487 }
488
489 stuser_set_state(stuser, MRPC_IDLE);
490
491 out:
492 mutex_unlock(&stdev->mrpc_mutex);
493
494 if (stuser->status == SWITCHTEC_MRPC_STATUS_DONE)
495 return size;
496 else if (stuser->status == SWITCHTEC_MRPC_STATUS_INTERRUPTED)
497 return -ENXIO;
498 else
499 return -EBADMSG;
500 }
501
switchtec_dev_poll(struct file * filp,poll_table * wait)502 static __poll_t switchtec_dev_poll(struct file *filp, poll_table *wait)
503 {
504 struct switchtec_user *stuser = filp->private_data;
505 struct switchtec_dev *stdev = stuser->stdev;
506 __poll_t ret = 0;
507
508 poll_wait(filp, &stuser->comp.wait, wait);
509 poll_wait(filp, &stdev->event_wq, wait);
510
511 if (lock_mutex_and_test_alive(stdev))
512 return EPOLLIN | EPOLLRDHUP | EPOLLOUT | EPOLLERR | EPOLLHUP;
513
514 mutex_unlock(&stdev->mrpc_mutex);
515
516 if (try_wait_for_completion(&stuser->comp))
517 ret |= EPOLLIN | EPOLLRDNORM;
518
519 if (stuser->event_cnt != atomic_read(&stdev->event_cnt))
520 ret |= EPOLLPRI | EPOLLRDBAND;
521
522 return ret;
523 }
524
ioctl_flash_info(struct switchtec_dev * stdev,struct switchtec_ioctl_flash_info __user * uinfo)525 static int ioctl_flash_info(struct switchtec_dev *stdev,
526 struct switchtec_ioctl_flash_info __user *uinfo)
527 {
528 struct switchtec_ioctl_flash_info info = {0};
529 struct flash_info_regs __iomem *fi = stdev->mmio_flash_info;
530
531 info.flash_length = ioread32(&fi->flash_length);
532 info.num_partitions = SWITCHTEC_IOCTL_NUM_PARTITIONS;
533
534 if (copy_to_user(uinfo, &info, sizeof(info)))
535 return -EFAULT;
536
537 return 0;
538 }
539
set_fw_info_part(struct switchtec_ioctl_flash_part_info * info,struct partition_info __iomem * pi)540 static void set_fw_info_part(struct switchtec_ioctl_flash_part_info *info,
541 struct partition_info __iomem *pi)
542 {
543 info->address = ioread32(&pi->address);
544 info->length = ioread32(&pi->length);
545 }
546
ioctl_flash_part_info(struct switchtec_dev * stdev,struct switchtec_ioctl_flash_part_info __user * uinfo)547 static int ioctl_flash_part_info(struct switchtec_dev *stdev,
548 struct switchtec_ioctl_flash_part_info __user *uinfo)
549 {
550 struct switchtec_ioctl_flash_part_info info = {0};
551 struct flash_info_regs __iomem *fi = stdev->mmio_flash_info;
552 struct sys_info_regs __iomem *si = stdev->mmio_sys_info;
553 u32 active_addr = -1;
554
555 if (copy_from_user(&info, uinfo, sizeof(info)))
556 return -EFAULT;
557
558 switch (info.flash_partition) {
559 case SWITCHTEC_IOCTL_PART_CFG0:
560 active_addr = ioread32(&fi->active_cfg);
561 set_fw_info_part(&info, &fi->cfg0);
562 if (ioread16(&si->cfg_running) == SWITCHTEC_CFG0_RUNNING)
563 info.active |= SWITCHTEC_IOCTL_PART_RUNNING;
564 break;
565 case SWITCHTEC_IOCTL_PART_CFG1:
566 active_addr = ioread32(&fi->active_cfg);
567 set_fw_info_part(&info, &fi->cfg1);
568 if (ioread16(&si->cfg_running) == SWITCHTEC_CFG1_RUNNING)
569 info.active |= SWITCHTEC_IOCTL_PART_RUNNING;
570 break;
571 case SWITCHTEC_IOCTL_PART_IMG0:
572 active_addr = ioread32(&fi->active_img);
573 set_fw_info_part(&info, &fi->img0);
574 if (ioread16(&si->img_running) == SWITCHTEC_IMG0_RUNNING)
575 info.active |= SWITCHTEC_IOCTL_PART_RUNNING;
576 break;
577 case SWITCHTEC_IOCTL_PART_IMG1:
578 active_addr = ioread32(&fi->active_img);
579 set_fw_info_part(&info, &fi->img1);
580 if (ioread16(&si->img_running) == SWITCHTEC_IMG1_RUNNING)
581 info.active |= SWITCHTEC_IOCTL_PART_RUNNING;
582 break;
583 case SWITCHTEC_IOCTL_PART_NVLOG:
584 set_fw_info_part(&info, &fi->nvlog);
585 break;
586 case SWITCHTEC_IOCTL_PART_VENDOR0:
587 set_fw_info_part(&info, &fi->vendor[0]);
588 break;
589 case SWITCHTEC_IOCTL_PART_VENDOR1:
590 set_fw_info_part(&info, &fi->vendor[1]);
591 break;
592 case SWITCHTEC_IOCTL_PART_VENDOR2:
593 set_fw_info_part(&info, &fi->vendor[2]);
594 break;
595 case SWITCHTEC_IOCTL_PART_VENDOR3:
596 set_fw_info_part(&info, &fi->vendor[3]);
597 break;
598 case SWITCHTEC_IOCTL_PART_VENDOR4:
599 set_fw_info_part(&info, &fi->vendor[4]);
600 break;
601 case SWITCHTEC_IOCTL_PART_VENDOR5:
602 set_fw_info_part(&info, &fi->vendor[5]);
603 break;
604 case SWITCHTEC_IOCTL_PART_VENDOR6:
605 set_fw_info_part(&info, &fi->vendor[6]);
606 break;
607 case SWITCHTEC_IOCTL_PART_VENDOR7:
608 set_fw_info_part(&info, &fi->vendor[7]);
609 break;
610 default:
611 return -EINVAL;
612 }
613
614 if (info.address == active_addr)
615 info.active |= SWITCHTEC_IOCTL_PART_ACTIVE;
616
617 if (copy_to_user(uinfo, &info, sizeof(info)))
618 return -EFAULT;
619
620 return 0;
621 }
622
ioctl_event_summary(struct switchtec_dev * stdev,struct switchtec_user * stuser,struct switchtec_ioctl_event_summary __user * usum)623 static int ioctl_event_summary(struct switchtec_dev *stdev,
624 struct switchtec_user *stuser,
625 struct switchtec_ioctl_event_summary __user *usum)
626 {
627 struct switchtec_ioctl_event_summary s = {0};
628 int i;
629 u32 reg;
630
631 s.global = ioread32(&stdev->mmio_sw_event->global_summary);
632 s.part_bitmap = readq(&stdev->mmio_sw_event->part_event_bitmap);
633 s.local_part = ioread32(&stdev->mmio_part_cfg->part_event_summary);
634
635 for (i = 0; i < stdev->partition_count; i++) {
636 reg = ioread32(&stdev->mmio_part_cfg_all[i].part_event_summary);
637 s.part[i] = reg;
638 }
639
640 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
641 reg = ioread16(&stdev->mmio_pff_csr[i].vendor_id);
642 if (reg != PCI_VENDOR_ID_MICROSEMI)
643 break;
644
645 reg = ioread32(&stdev->mmio_pff_csr[i].pff_event_summary);
646 s.pff[i] = reg;
647 }
648
649 if (copy_to_user(usum, &s, sizeof(s)))
650 return -EFAULT;
651
652 stuser->event_cnt = atomic_read(&stdev->event_cnt);
653
654 return 0;
655 }
656
global_ev_reg(struct switchtec_dev * stdev,size_t offset,int index)657 static u32 __iomem *global_ev_reg(struct switchtec_dev *stdev,
658 size_t offset, int index)
659 {
660 return (void __iomem *)stdev->mmio_sw_event + offset;
661 }
662
part_ev_reg(struct switchtec_dev * stdev,size_t offset,int index)663 static u32 __iomem *part_ev_reg(struct switchtec_dev *stdev,
664 size_t offset, int index)
665 {
666 return (void __iomem *)&stdev->mmio_part_cfg_all[index] + offset;
667 }
668
pff_ev_reg(struct switchtec_dev * stdev,size_t offset,int index)669 static u32 __iomem *pff_ev_reg(struct switchtec_dev *stdev,
670 size_t offset, int index)
671 {
672 return (void __iomem *)&stdev->mmio_pff_csr[index] + offset;
673 }
674
675 #define EV_GLB(i, r)[i] = {offsetof(struct sw_event_regs, r), global_ev_reg}
676 #define EV_PAR(i, r)[i] = {offsetof(struct part_cfg_regs, r), part_ev_reg}
677 #define EV_PFF(i, r)[i] = {offsetof(struct pff_csr_regs, r), pff_ev_reg}
678
679 static const struct event_reg {
680 size_t offset;
681 u32 __iomem *(*map_reg)(struct switchtec_dev *stdev,
682 size_t offset, int index);
683 } event_regs[] = {
684 EV_GLB(SWITCHTEC_IOCTL_EVENT_STACK_ERROR, stack_error_event_hdr),
685 EV_GLB(SWITCHTEC_IOCTL_EVENT_PPU_ERROR, ppu_error_event_hdr),
686 EV_GLB(SWITCHTEC_IOCTL_EVENT_ISP_ERROR, isp_error_event_hdr),
687 EV_GLB(SWITCHTEC_IOCTL_EVENT_SYS_RESET, sys_reset_event_hdr),
688 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_EXC, fw_exception_hdr),
689 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NMI, fw_nmi_hdr),
690 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NON_FATAL, fw_non_fatal_hdr),
691 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_FATAL, fw_fatal_hdr),
692 EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP, twi_mrpc_comp_hdr),
693 EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP_ASYNC,
694 twi_mrpc_comp_async_hdr),
695 EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP, cli_mrpc_comp_hdr),
696 EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP_ASYNC,
697 cli_mrpc_comp_async_hdr),
698 EV_GLB(SWITCHTEC_IOCTL_EVENT_GPIO_INT, gpio_interrupt_hdr),
699 EV_GLB(SWITCHTEC_IOCTL_EVENT_GFMS, gfms_event_hdr),
700 EV_PAR(SWITCHTEC_IOCTL_EVENT_PART_RESET, part_reset_hdr),
701 EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP, mrpc_comp_hdr),
702 EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP_ASYNC, mrpc_comp_async_hdr),
703 EV_PAR(SWITCHTEC_IOCTL_EVENT_DYN_PART_BIND_COMP, dyn_binding_hdr),
704 EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_P2P, aer_in_p2p_hdr),
705 EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_VEP, aer_in_vep_hdr),
706 EV_PFF(SWITCHTEC_IOCTL_EVENT_DPC, dpc_hdr),
707 EV_PFF(SWITCHTEC_IOCTL_EVENT_CTS, cts_hdr),
708 EV_PFF(SWITCHTEC_IOCTL_EVENT_HOTPLUG, hotplug_hdr),
709 EV_PFF(SWITCHTEC_IOCTL_EVENT_IER, ier_hdr),
710 EV_PFF(SWITCHTEC_IOCTL_EVENT_THRESH, threshold_hdr),
711 EV_PFF(SWITCHTEC_IOCTL_EVENT_POWER_MGMT, power_mgmt_hdr),
712 EV_PFF(SWITCHTEC_IOCTL_EVENT_TLP_THROTTLING, tlp_throttling_hdr),
713 EV_PFF(SWITCHTEC_IOCTL_EVENT_FORCE_SPEED, force_speed_hdr),
714 EV_PFF(SWITCHTEC_IOCTL_EVENT_CREDIT_TIMEOUT, credit_timeout_hdr),
715 EV_PFF(SWITCHTEC_IOCTL_EVENT_LINK_STATE, link_state_hdr),
716 };
717
event_hdr_addr(struct switchtec_dev * stdev,int event_id,int index)718 static u32 __iomem *event_hdr_addr(struct switchtec_dev *stdev,
719 int event_id, int index)
720 {
721 size_t off;
722
723 if (event_id < 0 || event_id >= SWITCHTEC_IOCTL_MAX_EVENTS)
724 return ERR_PTR(-EINVAL);
725
726 off = event_regs[event_id].offset;
727
728 if (event_regs[event_id].map_reg == part_ev_reg) {
729 if (index == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX)
730 index = stdev->partition;
731 else if (index < 0 || index >= stdev->partition_count)
732 return ERR_PTR(-EINVAL);
733 } else if (event_regs[event_id].map_reg == pff_ev_reg) {
734 if (index < 0 || index >= stdev->pff_csr_count)
735 return ERR_PTR(-EINVAL);
736 }
737
738 return event_regs[event_id].map_reg(stdev, off, index);
739 }
740
event_ctl(struct switchtec_dev * stdev,struct switchtec_ioctl_event_ctl * ctl)741 static int event_ctl(struct switchtec_dev *stdev,
742 struct switchtec_ioctl_event_ctl *ctl)
743 {
744 int i;
745 u32 __iomem *reg;
746 u32 hdr;
747
748 reg = event_hdr_addr(stdev, ctl->event_id, ctl->index);
749 if (IS_ERR(reg))
750 return PTR_ERR(reg);
751
752 hdr = ioread32(reg);
753 for (i = 0; i < ARRAY_SIZE(ctl->data); i++)
754 ctl->data[i] = ioread32(®[i + 1]);
755
756 ctl->occurred = hdr & SWITCHTEC_EVENT_OCCURRED;
757 ctl->count = (hdr >> 5) & 0xFF;
758
759 if (!(ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_CLEAR))
760 hdr &= ~SWITCHTEC_EVENT_CLEAR;
761 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL)
762 hdr |= SWITCHTEC_EVENT_EN_IRQ;
763 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_POLL)
764 hdr &= ~SWITCHTEC_EVENT_EN_IRQ;
765 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG)
766 hdr |= SWITCHTEC_EVENT_EN_LOG;
767 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_LOG)
768 hdr &= ~SWITCHTEC_EVENT_EN_LOG;
769 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI)
770 hdr |= SWITCHTEC_EVENT_EN_CLI;
771 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_CLI)
772 hdr &= ~SWITCHTEC_EVENT_EN_CLI;
773 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL)
774 hdr |= SWITCHTEC_EVENT_FATAL;
775 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_FATAL)
776 hdr &= ~SWITCHTEC_EVENT_FATAL;
777
778 if (ctl->flags)
779 iowrite32(hdr, reg);
780
781 ctl->flags = 0;
782 if (hdr & SWITCHTEC_EVENT_EN_IRQ)
783 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL;
784 if (hdr & SWITCHTEC_EVENT_EN_LOG)
785 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG;
786 if (hdr & SWITCHTEC_EVENT_EN_CLI)
787 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI;
788 if (hdr & SWITCHTEC_EVENT_FATAL)
789 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL;
790
791 return 0;
792 }
793
ioctl_event_ctl(struct switchtec_dev * stdev,struct switchtec_ioctl_event_ctl __user * uctl)794 static int ioctl_event_ctl(struct switchtec_dev *stdev,
795 struct switchtec_ioctl_event_ctl __user *uctl)
796 {
797 int ret;
798 int nr_idxs;
799 unsigned int event_flags;
800 struct switchtec_ioctl_event_ctl ctl;
801
802 if (copy_from_user(&ctl, uctl, sizeof(ctl)))
803 return -EFAULT;
804
805 if (ctl.event_id >= SWITCHTEC_IOCTL_MAX_EVENTS)
806 return -EINVAL;
807
808 if (ctl.flags & SWITCHTEC_IOCTL_EVENT_FLAG_UNUSED)
809 return -EINVAL;
810
811 if (ctl.index == SWITCHTEC_IOCTL_EVENT_IDX_ALL) {
812 if (event_regs[ctl.event_id].map_reg == global_ev_reg)
813 nr_idxs = 1;
814 else if (event_regs[ctl.event_id].map_reg == part_ev_reg)
815 nr_idxs = stdev->partition_count;
816 else if (event_regs[ctl.event_id].map_reg == pff_ev_reg)
817 nr_idxs = stdev->pff_csr_count;
818 else
819 return -EINVAL;
820
821 event_flags = ctl.flags;
822 for (ctl.index = 0; ctl.index < nr_idxs; ctl.index++) {
823 ctl.flags = event_flags;
824 ret = event_ctl(stdev, &ctl);
825 if (ret < 0)
826 return ret;
827 }
828 } else {
829 ret = event_ctl(stdev, &ctl);
830 if (ret < 0)
831 return ret;
832 }
833
834 if (copy_to_user(uctl, &ctl, sizeof(ctl)))
835 return -EFAULT;
836
837 return 0;
838 }
839
ioctl_pff_to_port(struct switchtec_dev * stdev,struct switchtec_ioctl_pff_port * up)840 static int ioctl_pff_to_port(struct switchtec_dev *stdev,
841 struct switchtec_ioctl_pff_port *up)
842 {
843 int i, part;
844 u32 reg;
845 struct part_cfg_regs *pcfg;
846 struct switchtec_ioctl_pff_port p;
847
848 if (copy_from_user(&p, up, sizeof(p)))
849 return -EFAULT;
850
851 p.port = -1;
852 for (part = 0; part < stdev->partition_count; part++) {
853 pcfg = &stdev->mmio_part_cfg_all[part];
854 p.partition = part;
855
856 reg = ioread32(&pcfg->usp_pff_inst_id);
857 if (reg == p.pff) {
858 p.port = 0;
859 break;
860 }
861
862 reg = ioread32(&pcfg->vep_pff_inst_id);
863 if (reg == p.pff) {
864 p.port = SWITCHTEC_IOCTL_PFF_VEP;
865 break;
866 }
867
868 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
869 reg = ioread32(&pcfg->dsp_pff_inst_id[i]);
870 if (reg != p.pff)
871 continue;
872
873 p.port = i + 1;
874 break;
875 }
876
877 if (p.port != -1)
878 break;
879 }
880
881 if (copy_to_user(up, &p, sizeof(p)))
882 return -EFAULT;
883
884 return 0;
885 }
886
ioctl_port_to_pff(struct switchtec_dev * stdev,struct switchtec_ioctl_pff_port * up)887 static int ioctl_port_to_pff(struct switchtec_dev *stdev,
888 struct switchtec_ioctl_pff_port *up)
889 {
890 struct switchtec_ioctl_pff_port p;
891 struct part_cfg_regs *pcfg;
892
893 if (copy_from_user(&p, up, sizeof(p)))
894 return -EFAULT;
895
896 if (p.partition == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX)
897 pcfg = stdev->mmio_part_cfg;
898 else if (p.partition < stdev->partition_count)
899 pcfg = &stdev->mmio_part_cfg_all[p.partition];
900 else
901 return -EINVAL;
902
903 switch (p.port) {
904 case 0:
905 p.pff = ioread32(&pcfg->usp_pff_inst_id);
906 break;
907 case SWITCHTEC_IOCTL_PFF_VEP:
908 p.pff = ioread32(&pcfg->vep_pff_inst_id);
909 break;
910 default:
911 if (p.port > ARRAY_SIZE(pcfg->dsp_pff_inst_id))
912 return -EINVAL;
913 p.port = array_index_nospec(p.port,
914 ARRAY_SIZE(pcfg->dsp_pff_inst_id) + 1);
915 p.pff = ioread32(&pcfg->dsp_pff_inst_id[p.port - 1]);
916 break;
917 }
918
919 if (copy_to_user(up, &p, sizeof(p)))
920 return -EFAULT;
921
922 return 0;
923 }
924
switchtec_dev_ioctl(struct file * filp,unsigned int cmd,unsigned long arg)925 static long switchtec_dev_ioctl(struct file *filp, unsigned int cmd,
926 unsigned long arg)
927 {
928 struct switchtec_user *stuser = filp->private_data;
929 struct switchtec_dev *stdev = stuser->stdev;
930 int rc;
931 void __user *argp = (void __user *)arg;
932
933 rc = lock_mutex_and_test_alive(stdev);
934 if (rc)
935 return rc;
936
937 switch (cmd) {
938 case SWITCHTEC_IOCTL_FLASH_INFO:
939 rc = ioctl_flash_info(stdev, argp);
940 break;
941 case SWITCHTEC_IOCTL_FLASH_PART_INFO:
942 rc = ioctl_flash_part_info(stdev, argp);
943 break;
944 case SWITCHTEC_IOCTL_EVENT_SUMMARY:
945 rc = ioctl_event_summary(stdev, stuser, argp);
946 break;
947 case SWITCHTEC_IOCTL_EVENT_CTL:
948 rc = ioctl_event_ctl(stdev, argp);
949 break;
950 case SWITCHTEC_IOCTL_PFF_TO_PORT:
951 rc = ioctl_pff_to_port(stdev, argp);
952 break;
953 case SWITCHTEC_IOCTL_PORT_TO_PFF:
954 rc = ioctl_port_to_pff(stdev, argp);
955 break;
956 default:
957 rc = -ENOTTY;
958 break;
959 }
960
961 mutex_unlock(&stdev->mrpc_mutex);
962 return rc;
963 }
964
965 static const struct file_operations switchtec_fops = {
966 .owner = THIS_MODULE,
967 .open = switchtec_dev_open,
968 .release = switchtec_dev_release,
969 .write = switchtec_dev_write,
970 .read = switchtec_dev_read,
971 .poll = switchtec_dev_poll,
972 .unlocked_ioctl = switchtec_dev_ioctl,
973 .compat_ioctl = switchtec_dev_ioctl,
974 };
975
link_event_work(struct work_struct * work)976 static void link_event_work(struct work_struct *work)
977 {
978 struct switchtec_dev *stdev;
979
980 stdev = container_of(work, struct switchtec_dev, link_event_work);
981
982 if (stdev->link_notifier)
983 stdev->link_notifier(stdev);
984 }
985
check_link_state_events(struct switchtec_dev * stdev)986 static void check_link_state_events(struct switchtec_dev *stdev)
987 {
988 int idx;
989 u32 reg;
990 int count;
991 int occurred = 0;
992
993 for (idx = 0; idx < stdev->pff_csr_count; idx++) {
994 reg = ioread32(&stdev->mmio_pff_csr[idx].link_state_hdr);
995 dev_dbg(&stdev->dev, "link_state: %d->%08x\n", idx, reg);
996 count = (reg >> 5) & 0xFF;
997
998 if (count != stdev->link_event_count[idx]) {
999 occurred = 1;
1000 stdev->link_event_count[idx] = count;
1001 }
1002 }
1003
1004 if (occurred)
1005 schedule_work(&stdev->link_event_work);
1006 }
1007
enable_link_state_events(struct switchtec_dev * stdev)1008 static void enable_link_state_events(struct switchtec_dev *stdev)
1009 {
1010 int idx;
1011
1012 for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1013 iowrite32(SWITCHTEC_EVENT_CLEAR |
1014 SWITCHTEC_EVENT_EN_IRQ,
1015 &stdev->mmio_pff_csr[idx].link_state_hdr);
1016 }
1017 }
1018
stdev_release(struct device * dev)1019 static void stdev_release(struct device *dev)
1020 {
1021 struct switchtec_dev *stdev = to_stdev(dev);
1022
1023 kfree(stdev);
1024 }
1025
stdev_kill(struct switchtec_dev * stdev)1026 static void stdev_kill(struct switchtec_dev *stdev)
1027 {
1028 struct switchtec_user *stuser, *tmpuser;
1029
1030 pci_clear_master(stdev->pdev);
1031
1032 cancel_delayed_work_sync(&stdev->mrpc_timeout);
1033
1034 /* Mark the hardware as unavailable and complete all completions */
1035 mutex_lock(&stdev->mrpc_mutex);
1036 stdev->alive = false;
1037
1038 /* Wake up and kill any users waiting on an MRPC request */
1039 list_for_each_entry_safe(stuser, tmpuser, &stdev->mrpc_queue, list) {
1040 complete_all(&stuser->comp);
1041 list_del_init(&stuser->list);
1042 stuser_put(stuser);
1043 }
1044
1045 mutex_unlock(&stdev->mrpc_mutex);
1046
1047 /* Wake up any users waiting on event_wq */
1048 wake_up_interruptible(&stdev->event_wq);
1049 }
1050
stdev_create(struct pci_dev * pdev)1051 static struct switchtec_dev *stdev_create(struct pci_dev *pdev)
1052 {
1053 struct switchtec_dev *stdev;
1054 int minor;
1055 struct device *dev;
1056 struct cdev *cdev;
1057 int rc;
1058
1059 stdev = kzalloc_node(sizeof(*stdev), GFP_KERNEL,
1060 dev_to_node(&pdev->dev));
1061 if (!stdev)
1062 return ERR_PTR(-ENOMEM);
1063
1064 stdev->alive = true;
1065 stdev->pdev = pdev;
1066 INIT_LIST_HEAD(&stdev->mrpc_queue);
1067 mutex_init(&stdev->mrpc_mutex);
1068 stdev->mrpc_busy = 0;
1069 INIT_WORK(&stdev->mrpc_work, mrpc_event_work);
1070 INIT_DELAYED_WORK(&stdev->mrpc_timeout, mrpc_timeout_work);
1071 INIT_WORK(&stdev->link_event_work, link_event_work);
1072 init_waitqueue_head(&stdev->event_wq);
1073 atomic_set(&stdev->event_cnt, 0);
1074
1075 dev = &stdev->dev;
1076 device_initialize(dev);
1077 dev->class = switchtec_class;
1078 dev->parent = &pdev->dev;
1079 dev->groups = switchtec_device_groups;
1080 dev->release = stdev_release;
1081
1082 minor = ida_simple_get(&switchtec_minor_ida, 0, 0,
1083 GFP_KERNEL);
1084 if (minor < 0) {
1085 rc = minor;
1086 goto err_put;
1087 }
1088
1089 dev->devt = MKDEV(MAJOR(switchtec_devt), minor);
1090 dev_set_name(dev, "switchtec%d", minor);
1091
1092 cdev = &stdev->cdev;
1093 cdev_init(cdev, &switchtec_fops);
1094 cdev->owner = THIS_MODULE;
1095
1096 return stdev;
1097
1098 err_put:
1099 put_device(&stdev->dev);
1100 return ERR_PTR(rc);
1101 }
1102
mask_event(struct switchtec_dev * stdev,int eid,int idx)1103 static int mask_event(struct switchtec_dev *stdev, int eid, int idx)
1104 {
1105 size_t off = event_regs[eid].offset;
1106 u32 __iomem *hdr_reg;
1107 u32 hdr;
1108
1109 hdr_reg = event_regs[eid].map_reg(stdev, off, idx);
1110 hdr = ioread32(hdr_reg);
1111
1112 if (!(hdr & SWITCHTEC_EVENT_OCCURRED && hdr & SWITCHTEC_EVENT_EN_IRQ))
1113 return 0;
1114
1115 if (eid == SWITCHTEC_IOCTL_EVENT_LINK_STATE ||
1116 eid == SWITCHTEC_IOCTL_EVENT_MRPC_COMP)
1117 return 0;
1118
1119 dev_dbg(&stdev->dev, "%s: %d %d %x\n", __func__, eid, idx, hdr);
1120 hdr &= ~(SWITCHTEC_EVENT_EN_IRQ | SWITCHTEC_EVENT_OCCURRED);
1121 iowrite32(hdr, hdr_reg);
1122
1123 return 1;
1124 }
1125
mask_all_events(struct switchtec_dev * stdev,int eid)1126 static int mask_all_events(struct switchtec_dev *stdev, int eid)
1127 {
1128 int idx;
1129 int count = 0;
1130
1131 if (event_regs[eid].map_reg == part_ev_reg) {
1132 for (idx = 0; idx < stdev->partition_count; idx++)
1133 count += mask_event(stdev, eid, idx);
1134 } else if (event_regs[eid].map_reg == pff_ev_reg) {
1135 for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1136 if (!stdev->pff_local[idx])
1137 continue;
1138
1139 count += mask_event(stdev, eid, idx);
1140 }
1141 } else {
1142 count += mask_event(stdev, eid, 0);
1143 }
1144
1145 return count;
1146 }
1147
switchtec_event_isr(int irq,void * dev)1148 static irqreturn_t switchtec_event_isr(int irq, void *dev)
1149 {
1150 struct switchtec_dev *stdev = dev;
1151 u32 reg;
1152 irqreturn_t ret = IRQ_NONE;
1153 int eid, event_count = 0;
1154
1155 reg = ioread32(&stdev->mmio_part_cfg->mrpc_comp_hdr);
1156 if (reg & SWITCHTEC_EVENT_OCCURRED) {
1157 dev_dbg(&stdev->dev, "%s: mrpc comp\n", __func__);
1158 ret = IRQ_HANDLED;
1159 schedule_work(&stdev->mrpc_work);
1160 iowrite32(reg, &stdev->mmio_part_cfg->mrpc_comp_hdr);
1161 }
1162
1163 check_link_state_events(stdev);
1164
1165 for (eid = 0; eid < SWITCHTEC_IOCTL_MAX_EVENTS; eid++)
1166 event_count += mask_all_events(stdev, eid);
1167
1168 if (event_count) {
1169 atomic_inc(&stdev->event_cnt);
1170 wake_up_interruptible(&stdev->event_wq);
1171 dev_dbg(&stdev->dev, "%s: %d events\n", __func__,
1172 event_count);
1173 return IRQ_HANDLED;
1174 }
1175
1176 return ret;
1177 }
1178
switchtec_init_isr(struct switchtec_dev * stdev)1179 static int switchtec_init_isr(struct switchtec_dev *stdev)
1180 {
1181 int nvecs;
1182 int event_irq;
1183
1184 nvecs = pci_alloc_irq_vectors(stdev->pdev, 1, 4,
1185 PCI_IRQ_MSIX | PCI_IRQ_MSI);
1186 if (nvecs < 0)
1187 return nvecs;
1188
1189 event_irq = ioread16(&stdev->mmio_part_cfg->vep_vector_number);
1190 if (event_irq < 0 || event_irq >= nvecs)
1191 return -EFAULT;
1192
1193 event_irq = pci_irq_vector(stdev->pdev, event_irq);
1194 if (event_irq < 0)
1195 return event_irq;
1196
1197 return devm_request_irq(&stdev->pdev->dev, event_irq,
1198 switchtec_event_isr, 0,
1199 KBUILD_MODNAME, stdev);
1200 }
1201
init_pff(struct switchtec_dev * stdev)1202 static void init_pff(struct switchtec_dev *stdev)
1203 {
1204 int i;
1205 u32 reg;
1206 struct part_cfg_regs *pcfg = stdev->mmio_part_cfg;
1207
1208 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
1209 reg = ioread16(&stdev->mmio_pff_csr[i].vendor_id);
1210 if (reg != PCI_VENDOR_ID_MICROSEMI)
1211 break;
1212 }
1213
1214 stdev->pff_csr_count = i;
1215
1216 reg = ioread32(&pcfg->usp_pff_inst_id);
1217 if (reg < SWITCHTEC_MAX_PFF_CSR)
1218 stdev->pff_local[reg] = 1;
1219
1220 reg = ioread32(&pcfg->vep_pff_inst_id);
1221 if (reg < SWITCHTEC_MAX_PFF_CSR)
1222 stdev->pff_local[reg] = 1;
1223
1224 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
1225 reg = ioread32(&pcfg->dsp_pff_inst_id[i]);
1226 if (reg < SWITCHTEC_MAX_PFF_CSR)
1227 stdev->pff_local[reg] = 1;
1228 }
1229 }
1230
switchtec_init_pci(struct switchtec_dev * stdev,struct pci_dev * pdev)1231 static int switchtec_init_pci(struct switchtec_dev *stdev,
1232 struct pci_dev *pdev)
1233 {
1234 int rc;
1235
1236 rc = pcim_enable_device(pdev);
1237 if (rc)
1238 return rc;
1239
1240 rc = pcim_iomap_regions(pdev, 0x1, KBUILD_MODNAME);
1241 if (rc)
1242 return rc;
1243
1244 pci_set_master(pdev);
1245
1246 stdev->mmio = pcim_iomap_table(pdev)[0];
1247 stdev->mmio_mrpc = stdev->mmio + SWITCHTEC_GAS_MRPC_OFFSET;
1248 stdev->mmio_sw_event = stdev->mmio + SWITCHTEC_GAS_SW_EVENT_OFFSET;
1249 stdev->mmio_sys_info = stdev->mmio + SWITCHTEC_GAS_SYS_INFO_OFFSET;
1250 stdev->mmio_flash_info = stdev->mmio + SWITCHTEC_GAS_FLASH_INFO_OFFSET;
1251 stdev->mmio_ntb = stdev->mmio + SWITCHTEC_GAS_NTB_OFFSET;
1252 stdev->partition = ioread8(&stdev->mmio_sys_info->partition_id);
1253 stdev->partition_count = ioread8(&stdev->mmio_ntb->partition_count);
1254 stdev->mmio_part_cfg_all = stdev->mmio + SWITCHTEC_GAS_PART_CFG_OFFSET;
1255 stdev->mmio_part_cfg = &stdev->mmio_part_cfg_all[stdev->partition];
1256 stdev->mmio_pff_csr = stdev->mmio + SWITCHTEC_GAS_PFF_CSR_OFFSET;
1257
1258 if (stdev->partition_count < 1)
1259 stdev->partition_count = 1;
1260
1261 init_pff(stdev);
1262
1263 pci_set_drvdata(pdev, stdev);
1264
1265 return 0;
1266 }
1267
switchtec_pci_probe(struct pci_dev * pdev,const struct pci_device_id * id)1268 static int switchtec_pci_probe(struct pci_dev *pdev,
1269 const struct pci_device_id *id)
1270 {
1271 struct switchtec_dev *stdev;
1272 int rc;
1273
1274 if (pdev->class == (PCI_CLASS_BRIDGE_OTHER << 8))
1275 request_module_nowait("ntb_hw_switchtec");
1276
1277 stdev = stdev_create(pdev);
1278 if (IS_ERR(stdev))
1279 return PTR_ERR(stdev);
1280
1281 rc = switchtec_init_pci(stdev, pdev);
1282 if (rc)
1283 goto err_put;
1284
1285 rc = switchtec_init_isr(stdev);
1286 if (rc) {
1287 dev_err(&stdev->dev, "failed to init isr.\n");
1288 goto err_put;
1289 }
1290
1291 iowrite32(SWITCHTEC_EVENT_CLEAR |
1292 SWITCHTEC_EVENT_EN_IRQ,
1293 &stdev->mmio_part_cfg->mrpc_comp_hdr);
1294 enable_link_state_events(stdev);
1295
1296 rc = cdev_device_add(&stdev->cdev, &stdev->dev);
1297 if (rc)
1298 goto err_devadd;
1299
1300 dev_info(&stdev->dev, "Management device registered.\n");
1301
1302 return 0;
1303
1304 err_devadd:
1305 stdev_kill(stdev);
1306 err_put:
1307 ida_simple_remove(&switchtec_minor_ida, MINOR(stdev->dev.devt));
1308 put_device(&stdev->dev);
1309 return rc;
1310 }
1311
switchtec_pci_remove(struct pci_dev * pdev)1312 static void switchtec_pci_remove(struct pci_dev *pdev)
1313 {
1314 struct switchtec_dev *stdev = pci_get_drvdata(pdev);
1315
1316 pci_set_drvdata(pdev, NULL);
1317
1318 cdev_device_del(&stdev->cdev, &stdev->dev);
1319 ida_simple_remove(&switchtec_minor_ida, MINOR(stdev->dev.devt));
1320 dev_info(&stdev->dev, "unregistered.\n");
1321
1322 stdev_kill(stdev);
1323 put_device(&stdev->dev);
1324 }
1325
1326 #define SWITCHTEC_PCI_DEVICE(device_id) \
1327 { \
1328 .vendor = PCI_VENDOR_ID_MICROSEMI, \
1329 .device = device_id, \
1330 .subvendor = PCI_ANY_ID, \
1331 .subdevice = PCI_ANY_ID, \
1332 .class = (PCI_CLASS_MEMORY_OTHER << 8), \
1333 .class_mask = 0xFFFFFFFF, \
1334 }, \
1335 { \
1336 .vendor = PCI_VENDOR_ID_MICROSEMI, \
1337 .device = device_id, \
1338 .subvendor = PCI_ANY_ID, \
1339 .subdevice = PCI_ANY_ID, \
1340 .class = (PCI_CLASS_BRIDGE_OTHER << 8), \
1341 .class_mask = 0xFFFFFFFF, \
1342 }
1343
1344 static const struct pci_device_id switchtec_pci_tbl[] = {
1345 SWITCHTEC_PCI_DEVICE(0x8531), //PFX 24xG3
1346 SWITCHTEC_PCI_DEVICE(0x8532), //PFX 32xG3
1347 SWITCHTEC_PCI_DEVICE(0x8533), //PFX 48xG3
1348 SWITCHTEC_PCI_DEVICE(0x8534), //PFX 64xG3
1349 SWITCHTEC_PCI_DEVICE(0x8535), //PFX 80xG3
1350 SWITCHTEC_PCI_DEVICE(0x8536), //PFX 96xG3
1351 SWITCHTEC_PCI_DEVICE(0x8541), //PSX 24xG3
1352 SWITCHTEC_PCI_DEVICE(0x8542), //PSX 32xG3
1353 SWITCHTEC_PCI_DEVICE(0x8543), //PSX 48xG3
1354 SWITCHTEC_PCI_DEVICE(0x8544), //PSX 64xG3
1355 SWITCHTEC_PCI_DEVICE(0x8545), //PSX 80xG3
1356 SWITCHTEC_PCI_DEVICE(0x8546), //PSX 96xG3
1357 SWITCHTEC_PCI_DEVICE(0x8551), //PAX 24XG3
1358 SWITCHTEC_PCI_DEVICE(0x8552), //PAX 32XG3
1359 SWITCHTEC_PCI_DEVICE(0x8553), //PAX 48XG3
1360 SWITCHTEC_PCI_DEVICE(0x8554), //PAX 64XG3
1361 SWITCHTEC_PCI_DEVICE(0x8555), //PAX 80XG3
1362 SWITCHTEC_PCI_DEVICE(0x8556), //PAX 96XG3
1363 SWITCHTEC_PCI_DEVICE(0x8561), //PFXL 24XG3
1364 SWITCHTEC_PCI_DEVICE(0x8562), //PFXL 32XG3
1365 SWITCHTEC_PCI_DEVICE(0x8563), //PFXL 48XG3
1366 SWITCHTEC_PCI_DEVICE(0x8564), //PFXL 64XG3
1367 SWITCHTEC_PCI_DEVICE(0x8565), //PFXL 80XG3
1368 SWITCHTEC_PCI_DEVICE(0x8566), //PFXL 96XG3
1369 SWITCHTEC_PCI_DEVICE(0x8571), //PFXI 24XG3
1370 SWITCHTEC_PCI_DEVICE(0x8572), //PFXI 32XG3
1371 SWITCHTEC_PCI_DEVICE(0x8573), //PFXI 48XG3
1372 SWITCHTEC_PCI_DEVICE(0x8574), //PFXI 64XG3
1373 SWITCHTEC_PCI_DEVICE(0x8575), //PFXI 80XG3
1374 SWITCHTEC_PCI_DEVICE(0x8576), //PFXI 96XG3
1375 {0}
1376 };
1377 MODULE_DEVICE_TABLE(pci, switchtec_pci_tbl);
1378
1379 static struct pci_driver switchtec_pci_driver = {
1380 .name = KBUILD_MODNAME,
1381 .id_table = switchtec_pci_tbl,
1382 .probe = switchtec_pci_probe,
1383 .remove = switchtec_pci_remove,
1384 };
1385
switchtec_init(void)1386 static int __init switchtec_init(void)
1387 {
1388 int rc;
1389
1390 rc = alloc_chrdev_region(&switchtec_devt, 0, max_devices,
1391 "switchtec");
1392 if (rc)
1393 return rc;
1394
1395 switchtec_class = class_create(THIS_MODULE, "switchtec");
1396 if (IS_ERR(switchtec_class)) {
1397 rc = PTR_ERR(switchtec_class);
1398 goto err_create_class;
1399 }
1400
1401 rc = pci_register_driver(&switchtec_pci_driver);
1402 if (rc)
1403 goto err_pci_register;
1404
1405 pr_info(KBUILD_MODNAME ": loaded.\n");
1406
1407 return 0;
1408
1409 err_pci_register:
1410 class_destroy(switchtec_class);
1411
1412 err_create_class:
1413 unregister_chrdev_region(switchtec_devt, max_devices);
1414
1415 return rc;
1416 }
1417 module_init(switchtec_init);
1418
switchtec_exit(void)1419 static void __exit switchtec_exit(void)
1420 {
1421 pci_unregister_driver(&switchtec_pci_driver);
1422 class_destroy(switchtec_class);
1423 unregister_chrdev_region(switchtec_devt, max_devices);
1424 ida_destroy(&switchtec_minor_ida);
1425
1426 pr_info(KBUILD_MODNAME ": unloaded.\n");
1427 }
1428 module_exit(switchtec_exit);
1429