1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * v4l2-dv-timings - dv-timings helper functions
4 *
5 * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
6 */
7
8 #include <linux/module.h>
9 #include <linux/types.h>
10 #include <linux/kernel.h>
11 #include <linux/errno.h>
12 #include <linux/rational.h>
13 #include <linux/videodev2.h>
14 #include <linux/v4l2-dv-timings.h>
15 #include <media/v4l2-dv-timings.h>
16 #include <linux/math64.h>
17 #include <linux/hdmi.h>
18 #include <media/cec.h>
19
20 MODULE_AUTHOR("Hans Verkuil");
21 MODULE_DESCRIPTION("V4L2 DV Timings Helper Functions");
22 MODULE_LICENSE("GPL");
23
24 const struct v4l2_dv_timings v4l2_dv_timings_presets[] = {
25 V4L2_DV_BT_CEA_640X480P59_94,
26 V4L2_DV_BT_CEA_720X480I59_94,
27 V4L2_DV_BT_CEA_720X480P59_94,
28 V4L2_DV_BT_CEA_720X576I50,
29 V4L2_DV_BT_CEA_720X576P50,
30 V4L2_DV_BT_CEA_1280X720P24,
31 V4L2_DV_BT_CEA_1280X720P25,
32 V4L2_DV_BT_CEA_1280X720P30,
33 V4L2_DV_BT_CEA_1280X720P50,
34 V4L2_DV_BT_CEA_1280X720P60,
35 V4L2_DV_BT_CEA_1920X1080P24,
36 V4L2_DV_BT_CEA_1920X1080P25,
37 V4L2_DV_BT_CEA_1920X1080P30,
38 V4L2_DV_BT_CEA_1920X1080I50,
39 V4L2_DV_BT_CEA_1920X1080P50,
40 V4L2_DV_BT_CEA_1920X1080I60,
41 V4L2_DV_BT_CEA_1920X1080P60,
42 V4L2_DV_BT_DMT_640X350P85,
43 V4L2_DV_BT_DMT_640X400P85,
44 V4L2_DV_BT_DMT_720X400P85,
45 V4L2_DV_BT_DMT_640X480P72,
46 V4L2_DV_BT_DMT_640X480P75,
47 V4L2_DV_BT_DMT_640X480P85,
48 V4L2_DV_BT_DMT_800X600P56,
49 V4L2_DV_BT_DMT_800X600P60,
50 V4L2_DV_BT_DMT_800X600P72,
51 V4L2_DV_BT_DMT_800X600P75,
52 V4L2_DV_BT_DMT_800X600P85,
53 V4L2_DV_BT_DMT_800X600P120_RB,
54 V4L2_DV_BT_DMT_848X480P60,
55 V4L2_DV_BT_DMT_1024X768I43,
56 V4L2_DV_BT_DMT_1024X768P60,
57 V4L2_DV_BT_DMT_1024X768P70,
58 V4L2_DV_BT_DMT_1024X768P75,
59 V4L2_DV_BT_DMT_1024X768P85,
60 V4L2_DV_BT_DMT_1024X768P120_RB,
61 V4L2_DV_BT_DMT_1152X864P75,
62 V4L2_DV_BT_DMT_1280X768P60_RB,
63 V4L2_DV_BT_DMT_1280X768P60,
64 V4L2_DV_BT_DMT_1280X768P75,
65 V4L2_DV_BT_DMT_1280X768P85,
66 V4L2_DV_BT_DMT_1280X768P120_RB,
67 V4L2_DV_BT_DMT_1280X800P60_RB,
68 V4L2_DV_BT_DMT_1280X800P60,
69 V4L2_DV_BT_DMT_1280X800P75,
70 V4L2_DV_BT_DMT_1280X800P85,
71 V4L2_DV_BT_DMT_1280X800P120_RB,
72 V4L2_DV_BT_DMT_1280X960P60,
73 V4L2_DV_BT_DMT_1280X960P85,
74 V4L2_DV_BT_DMT_1280X960P120_RB,
75 V4L2_DV_BT_DMT_1280X1024P60,
76 V4L2_DV_BT_DMT_1280X1024P75,
77 V4L2_DV_BT_DMT_1280X1024P85,
78 V4L2_DV_BT_DMT_1280X1024P120_RB,
79 V4L2_DV_BT_DMT_1360X768P60,
80 V4L2_DV_BT_DMT_1360X768P120_RB,
81 V4L2_DV_BT_DMT_1366X768P60,
82 V4L2_DV_BT_DMT_1366X768P60_RB,
83 V4L2_DV_BT_DMT_1400X1050P60_RB,
84 V4L2_DV_BT_DMT_1400X1050P60,
85 V4L2_DV_BT_DMT_1400X1050P75,
86 V4L2_DV_BT_DMT_1400X1050P85,
87 V4L2_DV_BT_DMT_1400X1050P120_RB,
88 V4L2_DV_BT_DMT_1440X900P60_RB,
89 V4L2_DV_BT_DMT_1440X900P60,
90 V4L2_DV_BT_DMT_1440X900P75,
91 V4L2_DV_BT_DMT_1440X900P85,
92 V4L2_DV_BT_DMT_1440X900P120_RB,
93 V4L2_DV_BT_DMT_1600X900P60_RB,
94 V4L2_DV_BT_DMT_1600X1200P60,
95 V4L2_DV_BT_DMT_1600X1200P65,
96 V4L2_DV_BT_DMT_1600X1200P70,
97 V4L2_DV_BT_DMT_1600X1200P75,
98 V4L2_DV_BT_DMT_1600X1200P85,
99 V4L2_DV_BT_DMT_1600X1200P120_RB,
100 V4L2_DV_BT_DMT_1680X1050P60_RB,
101 V4L2_DV_BT_DMT_1680X1050P60,
102 V4L2_DV_BT_DMT_1680X1050P75,
103 V4L2_DV_BT_DMT_1680X1050P85,
104 V4L2_DV_BT_DMT_1680X1050P120_RB,
105 V4L2_DV_BT_DMT_1792X1344P60,
106 V4L2_DV_BT_DMT_1792X1344P75,
107 V4L2_DV_BT_DMT_1792X1344P120_RB,
108 V4L2_DV_BT_DMT_1856X1392P60,
109 V4L2_DV_BT_DMT_1856X1392P75,
110 V4L2_DV_BT_DMT_1856X1392P120_RB,
111 V4L2_DV_BT_DMT_1920X1200P60_RB,
112 V4L2_DV_BT_DMT_1920X1200P60,
113 V4L2_DV_BT_DMT_1920X1200P75,
114 V4L2_DV_BT_DMT_1920X1200P85,
115 V4L2_DV_BT_DMT_1920X1200P120_RB,
116 V4L2_DV_BT_DMT_1920X1440P60,
117 V4L2_DV_BT_DMT_1920X1440P75,
118 V4L2_DV_BT_DMT_1920X1440P120_RB,
119 V4L2_DV_BT_DMT_2048X1152P60_RB,
120 V4L2_DV_BT_DMT_2560X1600P60_RB,
121 V4L2_DV_BT_DMT_2560X1600P60,
122 V4L2_DV_BT_DMT_2560X1600P75,
123 V4L2_DV_BT_DMT_2560X1600P85,
124 V4L2_DV_BT_DMT_2560X1600P120_RB,
125 V4L2_DV_BT_CEA_3840X2160P24,
126 V4L2_DV_BT_CEA_3840X2160P25,
127 V4L2_DV_BT_CEA_3840X2160P30,
128 V4L2_DV_BT_CEA_3840X2160P50,
129 V4L2_DV_BT_CEA_3840X2160P60,
130 V4L2_DV_BT_CEA_4096X2160P24,
131 V4L2_DV_BT_CEA_4096X2160P25,
132 V4L2_DV_BT_CEA_4096X2160P30,
133 V4L2_DV_BT_CEA_4096X2160P50,
134 V4L2_DV_BT_DMT_4096X2160P59_94_RB,
135 V4L2_DV_BT_CEA_4096X2160P60,
136 { }
137 };
138 EXPORT_SYMBOL_GPL(v4l2_dv_timings_presets);
139
v4l2_valid_dv_timings(const struct v4l2_dv_timings * t,const struct v4l2_dv_timings_cap * dvcap,v4l2_check_dv_timings_fnc fnc,void * fnc_handle)140 bool v4l2_valid_dv_timings(const struct v4l2_dv_timings *t,
141 const struct v4l2_dv_timings_cap *dvcap,
142 v4l2_check_dv_timings_fnc fnc,
143 void *fnc_handle)
144 {
145 const struct v4l2_bt_timings *bt = &t->bt;
146 const struct v4l2_bt_timings_cap *cap = &dvcap->bt;
147 u32 caps = cap->capabilities;
148 const u32 max_vert = 10240;
149 u32 max_hor = 3 * bt->width;
150
151 if (t->type != V4L2_DV_BT_656_1120)
152 return false;
153 if (t->type != dvcap->type ||
154 bt->height < cap->min_height ||
155 bt->height > cap->max_height ||
156 bt->width < cap->min_width ||
157 bt->width > cap->max_width ||
158 bt->pixelclock < cap->min_pixelclock ||
159 bt->pixelclock > cap->max_pixelclock ||
160 (!(caps & V4L2_DV_BT_CAP_CUSTOM) &&
161 cap->standards && bt->standards &&
162 !(bt->standards & cap->standards)) ||
163 (bt->interlaced && !(caps & V4L2_DV_BT_CAP_INTERLACED)) ||
164 (!bt->interlaced && !(caps & V4L2_DV_BT_CAP_PROGRESSIVE)))
165 return false;
166
167 /* sanity checks for the blanking timings */
168 if (!bt->interlaced &&
169 (bt->il_vbackporch || bt->il_vsync || bt->il_vfrontporch))
170 return false;
171 /*
172 * Some video receivers cannot properly separate the frontporch,
173 * backporch and sync values, and instead they only have the total
174 * blanking. That can be assigned to any of these three fields.
175 * So just check that none of these are way out of range.
176 */
177 if (bt->hfrontporch > max_hor ||
178 bt->hsync > max_hor || bt->hbackporch > max_hor)
179 return false;
180 if (bt->vfrontporch > max_vert ||
181 bt->vsync > max_vert || bt->vbackporch > max_vert)
182 return false;
183 if (bt->interlaced && (bt->il_vfrontporch > max_vert ||
184 bt->il_vsync > max_vert || bt->il_vbackporch > max_vert))
185 return false;
186 return fnc == NULL || fnc(t, fnc_handle);
187 }
188 EXPORT_SYMBOL_GPL(v4l2_valid_dv_timings);
189
v4l2_enum_dv_timings_cap(struct v4l2_enum_dv_timings * t,const struct v4l2_dv_timings_cap * cap,v4l2_check_dv_timings_fnc fnc,void * fnc_handle)190 int v4l2_enum_dv_timings_cap(struct v4l2_enum_dv_timings *t,
191 const struct v4l2_dv_timings_cap *cap,
192 v4l2_check_dv_timings_fnc fnc,
193 void *fnc_handle)
194 {
195 u32 i, idx;
196
197 memset(t->reserved, 0, sizeof(t->reserved));
198 for (i = idx = 0; v4l2_dv_timings_presets[i].bt.width; i++) {
199 if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap,
200 fnc, fnc_handle) &&
201 idx++ == t->index) {
202 t->timings = v4l2_dv_timings_presets[i];
203 return 0;
204 }
205 }
206 return -EINVAL;
207 }
208 EXPORT_SYMBOL_GPL(v4l2_enum_dv_timings_cap);
209
v4l2_find_dv_timings_cap(struct v4l2_dv_timings * t,const struct v4l2_dv_timings_cap * cap,unsigned pclock_delta,v4l2_check_dv_timings_fnc fnc,void * fnc_handle)210 bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t,
211 const struct v4l2_dv_timings_cap *cap,
212 unsigned pclock_delta,
213 v4l2_check_dv_timings_fnc fnc,
214 void *fnc_handle)
215 {
216 int i;
217
218 if (!v4l2_valid_dv_timings(t, cap, fnc, fnc_handle))
219 return false;
220
221 for (i = 0; v4l2_dv_timings_presets[i].bt.width; i++) {
222 if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap,
223 fnc, fnc_handle) &&
224 v4l2_match_dv_timings(t, v4l2_dv_timings_presets + i,
225 pclock_delta, false)) {
226 u32 flags = t->bt.flags & V4L2_DV_FL_REDUCED_FPS;
227
228 *t = v4l2_dv_timings_presets[i];
229 if (can_reduce_fps(&t->bt))
230 t->bt.flags |= flags;
231
232 return true;
233 }
234 }
235 return false;
236 }
237 EXPORT_SYMBOL_GPL(v4l2_find_dv_timings_cap);
238
v4l2_find_dv_timings_cea861_vic(struct v4l2_dv_timings * t,u8 vic)239 bool v4l2_find_dv_timings_cea861_vic(struct v4l2_dv_timings *t, u8 vic)
240 {
241 unsigned int i;
242
243 for (i = 0; v4l2_dv_timings_presets[i].bt.width; i++) {
244 const struct v4l2_bt_timings *bt =
245 &v4l2_dv_timings_presets[i].bt;
246
247 if ((bt->flags & V4L2_DV_FL_HAS_CEA861_VIC) &&
248 bt->cea861_vic == vic) {
249 *t = v4l2_dv_timings_presets[i];
250 return true;
251 }
252 }
253 return false;
254 }
255 EXPORT_SYMBOL_GPL(v4l2_find_dv_timings_cea861_vic);
256
257 /**
258 * v4l2_match_dv_timings - check if two timings match
259 * @t1: compare this v4l2_dv_timings struct...
260 * @t2: with this struct.
261 * @pclock_delta: the allowed pixelclock deviation.
262 * @match_reduced_fps: if true, then fail if V4L2_DV_FL_REDUCED_FPS does not
263 * match.
264 *
265 * Compare t1 with t2 with a given margin of error for the pixelclock.
266 */
v4l2_match_dv_timings(const struct v4l2_dv_timings * t1,const struct v4l2_dv_timings * t2,unsigned pclock_delta,bool match_reduced_fps)267 bool v4l2_match_dv_timings(const struct v4l2_dv_timings *t1,
268 const struct v4l2_dv_timings *t2,
269 unsigned pclock_delta, bool match_reduced_fps)
270 {
271 if (t1->type != t2->type || t1->type != V4L2_DV_BT_656_1120)
272 return false;
273 if (t1->bt.width == t2->bt.width &&
274 t1->bt.height == t2->bt.height &&
275 t1->bt.interlaced == t2->bt.interlaced &&
276 t1->bt.polarities == t2->bt.polarities &&
277 t1->bt.pixelclock >= t2->bt.pixelclock - pclock_delta &&
278 t1->bt.pixelclock <= t2->bt.pixelclock + pclock_delta &&
279 t1->bt.hfrontporch == t2->bt.hfrontporch &&
280 t1->bt.hsync == t2->bt.hsync &&
281 t1->bt.hbackporch == t2->bt.hbackporch &&
282 t1->bt.vfrontporch == t2->bt.vfrontporch &&
283 t1->bt.vsync == t2->bt.vsync &&
284 t1->bt.vbackporch == t2->bt.vbackporch &&
285 (!match_reduced_fps ||
286 (t1->bt.flags & V4L2_DV_FL_REDUCED_FPS) ==
287 (t2->bt.flags & V4L2_DV_FL_REDUCED_FPS)) &&
288 (!t1->bt.interlaced ||
289 (t1->bt.il_vfrontporch == t2->bt.il_vfrontporch &&
290 t1->bt.il_vsync == t2->bt.il_vsync &&
291 t1->bt.il_vbackporch == t2->bt.il_vbackporch)))
292 return true;
293 return false;
294 }
295 EXPORT_SYMBOL_GPL(v4l2_match_dv_timings);
296
v4l2_print_dv_timings(const char * dev_prefix,const char * prefix,const struct v4l2_dv_timings * t,bool detailed)297 void v4l2_print_dv_timings(const char *dev_prefix, const char *prefix,
298 const struct v4l2_dv_timings *t, bool detailed)
299 {
300 const struct v4l2_bt_timings *bt = &t->bt;
301 u32 htot, vtot;
302 u32 fps;
303
304 if (t->type != V4L2_DV_BT_656_1120)
305 return;
306
307 htot = V4L2_DV_BT_FRAME_WIDTH(bt);
308 vtot = V4L2_DV_BT_FRAME_HEIGHT(bt);
309 if (bt->interlaced)
310 vtot /= 2;
311
312 fps = (htot * vtot) > 0 ? div_u64((100 * (u64)bt->pixelclock),
313 (htot * vtot)) : 0;
314
315 if (prefix == NULL)
316 prefix = "";
317
318 pr_info("%s: %s%ux%u%s%u.%u (%ux%u)\n", dev_prefix, prefix,
319 bt->width, bt->height, bt->interlaced ? "i" : "p",
320 fps / 100, fps % 100, htot, vtot);
321
322 if (!detailed)
323 return;
324
325 pr_info("%s: horizontal: fp = %u, %ssync = %u, bp = %u\n",
326 dev_prefix, bt->hfrontporch,
327 (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-",
328 bt->hsync, bt->hbackporch);
329 pr_info("%s: vertical: fp = %u, %ssync = %u, bp = %u\n",
330 dev_prefix, bt->vfrontporch,
331 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-",
332 bt->vsync, bt->vbackporch);
333 if (bt->interlaced)
334 pr_info("%s: vertical bottom field: fp = %u, %ssync = %u, bp = %u\n",
335 dev_prefix, bt->il_vfrontporch,
336 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-",
337 bt->il_vsync, bt->il_vbackporch);
338 pr_info("%s: pixelclock: %llu\n", dev_prefix, bt->pixelclock);
339 pr_info("%s: flags (0x%x):%s%s%s%s%s%s%s%s%s%s\n",
340 dev_prefix, bt->flags,
341 (bt->flags & V4L2_DV_FL_REDUCED_BLANKING) ?
342 " REDUCED_BLANKING" : "",
343 ((bt->flags & V4L2_DV_FL_REDUCED_BLANKING) &&
344 bt->vsync == 8) ? " (V2)" : "",
345 (bt->flags & V4L2_DV_FL_CAN_REDUCE_FPS) ?
346 " CAN_REDUCE_FPS" : "",
347 (bt->flags & V4L2_DV_FL_REDUCED_FPS) ?
348 " REDUCED_FPS" : "",
349 (bt->flags & V4L2_DV_FL_HALF_LINE) ?
350 " HALF_LINE" : "",
351 (bt->flags & V4L2_DV_FL_IS_CE_VIDEO) ?
352 " CE_VIDEO" : "",
353 (bt->flags & V4L2_DV_FL_FIRST_FIELD_EXTRA_LINE) ?
354 " FIRST_FIELD_EXTRA_LINE" : "",
355 (bt->flags & V4L2_DV_FL_HAS_PICTURE_ASPECT) ?
356 " HAS_PICTURE_ASPECT" : "",
357 (bt->flags & V4L2_DV_FL_HAS_CEA861_VIC) ?
358 " HAS_CEA861_VIC" : "",
359 (bt->flags & V4L2_DV_FL_HAS_HDMI_VIC) ?
360 " HAS_HDMI_VIC" : "");
361 pr_info("%s: standards (0x%x):%s%s%s%s%s\n", dev_prefix, bt->standards,
362 (bt->standards & V4L2_DV_BT_STD_CEA861) ? " CEA" : "",
363 (bt->standards & V4L2_DV_BT_STD_DMT) ? " DMT" : "",
364 (bt->standards & V4L2_DV_BT_STD_CVT) ? " CVT" : "",
365 (bt->standards & V4L2_DV_BT_STD_GTF) ? " GTF" : "",
366 (bt->standards & V4L2_DV_BT_STD_SDI) ? " SDI" : "");
367 if (bt->flags & V4L2_DV_FL_HAS_PICTURE_ASPECT)
368 pr_info("%s: picture aspect (hor:vert): %u:%u\n", dev_prefix,
369 bt->picture_aspect.numerator,
370 bt->picture_aspect.denominator);
371 if (bt->flags & V4L2_DV_FL_HAS_CEA861_VIC)
372 pr_info("%s: CEA-861 VIC: %u\n", dev_prefix, bt->cea861_vic);
373 if (bt->flags & V4L2_DV_FL_HAS_HDMI_VIC)
374 pr_info("%s: HDMI VIC: %u\n", dev_prefix, bt->hdmi_vic);
375 }
376 EXPORT_SYMBOL_GPL(v4l2_print_dv_timings);
377
v4l2_dv_timings_aspect_ratio(const struct v4l2_dv_timings * t)378 struct v4l2_fract v4l2_dv_timings_aspect_ratio(const struct v4l2_dv_timings *t)
379 {
380 struct v4l2_fract ratio = { 1, 1 };
381 unsigned long n, d;
382
383 if (t->type != V4L2_DV_BT_656_1120)
384 return ratio;
385 if (!(t->bt.flags & V4L2_DV_FL_HAS_PICTURE_ASPECT))
386 return ratio;
387
388 ratio.numerator = t->bt.width * t->bt.picture_aspect.denominator;
389 ratio.denominator = t->bt.height * t->bt.picture_aspect.numerator;
390
391 rational_best_approximation(ratio.numerator, ratio.denominator,
392 ratio.numerator, ratio.denominator, &n, &d);
393 ratio.numerator = n;
394 ratio.denominator = d;
395 return ratio;
396 }
397 EXPORT_SYMBOL_GPL(v4l2_dv_timings_aspect_ratio);
398
399 /*
400 * CVT defines
401 * Based on Coordinated Video Timings Standard
402 * version 1.1 September 10, 2003
403 */
404
405 #define CVT_PXL_CLK_GRAN 250000 /* pixel clock granularity */
406 #define CVT_PXL_CLK_GRAN_RB_V2 1000 /* granularity for reduced blanking v2*/
407
408 /* Normal blanking */
409 #define CVT_MIN_V_BPORCH 7 /* lines */
410 #define CVT_MIN_V_PORCH_RND 3 /* lines */
411 #define CVT_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */
412 #define CVT_HSYNC_PERCENT 8 /* nominal hsync as percentage of line */
413
414 /* Normal blanking for CVT uses GTF to calculate horizontal blanking */
415 #define CVT_CELL_GRAN 8 /* character cell granularity */
416 #define CVT_M 600 /* blanking formula gradient */
417 #define CVT_C 40 /* blanking formula offset */
418 #define CVT_K 128 /* blanking formula scaling factor */
419 #define CVT_J 20 /* blanking formula scaling factor */
420 #define CVT_C_PRIME (((CVT_C - CVT_J) * CVT_K / 256) + CVT_J)
421 #define CVT_M_PRIME (CVT_K * CVT_M / 256)
422
423 /* Reduced Blanking */
424 #define CVT_RB_MIN_V_BPORCH 7 /* lines */
425 #define CVT_RB_V_FPORCH 3 /* lines */
426 #define CVT_RB_MIN_V_BLANK 460 /* us */
427 #define CVT_RB_H_SYNC 32 /* pixels */
428 #define CVT_RB_H_BLANK 160 /* pixels */
429 /* Reduce blanking Version 2 */
430 #define CVT_RB_V2_H_BLANK 80 /* pixels */
431 #define CVT_RB_MIN_V_FPORCH 3 /* lines */
432 #define CVT_RB_V2_MIN_V_FPORCH 1 /* lines */
433 #define CVT_RB_V_BPORCH 6 /* lines */
434
435 /** v4l2_detect_cvt - detect if the given timings follow the CVT standard
436 * @frame_height - the total height of the frame (including blanking) in lines.
437 * @hfreq - the horizontal frequency in Hz.
438 * @vsync - the height of the vertical sync in lines.
439 * @active_width - active width of image (does not include blanking). This
440 * information is needed only in case of version 2 of reduced blanking.
441 * In other cases, this parameter does not have any effect on timings.
442 * @polarities - the horizontal and vertical polarities (same as struct
443 * v4l2_bt_timings polarities).
444 * @interlaced - if this flag is true, it indicates interlaced format
445 * @fmt - the resulting timings.
446 *
447 * This function will attempt to detect if the given values correspond to a
448 * valid CVT format. If so, then it will return true, and fmt will be filled
449 * in with the found CVT timings.
450 */
v4l2_detect_cvt(unsigned frame_height,unsigned hfreq,unsigned vsync,unsigned active_width,u32 polarities,bool interlaced,struct v4l2_dv_timings * fmt)451 bool v4l2_detect_cvt(unsigned frame_height,
452 unsigned hfreq,
453 unsigned vsync,
454 unsigned active_width,
455 u32 polarities,
456 bool interlaced,
457 struct v4l2_dv_timings *fmt)
458 {
459 int v_fp, v_bp, h_fp, h_bp, hsync;
460 int frame_width, image_height, image_width;
461 bool reduced_blanking;
462 bool rb_v2 = false;
463 unsigned pix_clk;
464
465 if (vsync < 4 || vsync > 8)
466 return false;
467
468 if (polarities == V4L2_DV_VSYNC_POS_POL)
469 reduced_blanking = false;
470 else if (polarities == V4L2_DV_HSYNC_POS_POL)
471 reduced_blanking = true;
472 else
473 return false;
474
475 if (reduced_blanking && vsync == 8)
476 rb_v2 = true;
477
478 if (rb_v2 && active_width == 0)
479 return false;
480
481 if (!rb_v2 && vsync > 7)
482 return false;
483
484 if (hfreq == 0)
485 return false;
486
487 /* Vertical */
488 if (reduced_blanking) {
489 if (rb_v2) {
490 v_bp = CVT_RB_V_BPORCH;
491 v_fp = (CVT_RB_MIN_V_BLANK * hfreq) / 1000000 + 1;
492 v_fp -= vsync + v_bp;
493
494 if (v_fp < CVT_RB_V2_MIN_V_FPORCH)
495 v_fp = CVT_RB_V2_MIN_V_FPORCH;
496 } else {
497 v_fp = CVT_RB_V_FPORCH;
498 v_bp = (CVT_RB_MIN_V_BLANK * hfreq) / 1000000 + 1;
499 v_bp -= vsync + v_fp;
500
501 if (v_bp < CVT_RB_MIN_V_BPORCH)
502 v_bp = CVT_RB_MIN_V_BPORCH;
503 }
504 } else {
505 v_fp = CVT_MIN_V_PORCH_RND;
506 v_bp = (CVT_MIN_VSYNC_BP * hfreq) / 1000000 + 1 - vsync;
507
508 if (v_bp < CVT_MIN_V_BPORCH)
509 v_bp = CVT_MIN_V_BPORCH;
510 }
511
512 if (interlaced)
513 image_height = (frame_height - 2 * v_fp - 2 * vsync - 2 * v_bp) & ~0x1;
514 else
515 image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1;
516
517 if (image_height < 0)
518 return false;
519
520 /* Aspect ratio based on vsync */
521 switch (vsync) {
522 case 4:
523 image_width = (image_height * 4) / 3;
524 break;
525 case 5:
526 image_width = (image_height * 16) / 9;
527 break;
528 case 6:
529 image_width = (image_height * 16) / 10;
530 break;
531 case 7:
532 /* special case */
533 if (image_height == 1024)
534 image_width = (image_height * 5) / 4;
535 else if (image_height == 768)
536 image_width = (image_height * 15) / 9;
537 else
538 return false;
539 break;
540 case 8:
541 image_width = active_width;
542 break;
543 default:
544 return false;
545 }
546
547 if (!rb_v2)
548 image_width = image_width & ~7;
549
550 /* Horizontal */
551 if (reduced_blanking) {
552 int h_blank;
553 int clk_gran;
554
555 h_blank = rb_v2 ? CVT_RB_V2_H_BLANK : CVT_RB_H_BLANK;
556 clk_gran = rb_v2 ? CVT_PXL_CLK_GRAN_RB_V2 : CVT_PXL_CLK_GRAN;
557
558 pix_clk = (image_width + h_blank) * hfreq;
559 pix_clk = (pix_clk / clk_gran) * clk_gran;
560
561 h_bp = h_blank / 2;
562 hsync = CVT_RB_H_SYNC;
563 h_fp = h_blank - h_bp - hsync;
564
565 frame_width = image_width + h_blank;
566 } else {
567 unsigned ideal_duty_cycle_per_myriad =
568 100 * CVT_C_PRIME - (CVT_M_PRIME * 100000) / hfreq;
569 int h_blank;
570
571 if (ideal_duty_cycle_per_myriad < 2000)
572 ideal_duty_cycle_per_myriad = 2000;
573
574 h_blank = image_width * ideal_duty_cycle_per_myriad /
575 (10000 - ideal_duty_cycle_per_myriad);
576 h_blank = (h_blank / (2 * CVT_CELL_GRAN)) * 2 * CVT_CELL_GRAN;
577
578 pix_clk = (image_width + h_blank) * hfreq;
579 pix_clk = (pix_clk / CVT_PXL_CLK_GRAN) * CVT_PXL_CLK_GRAN;
580
581 h_bp = h_blank / 2;
582 frame_width = image_width + h_blank;
583
584 hsync = frame_width * CVT_HSYNC_PERCENT / 100;
585 hsync = (hsync / CVT_CELL_GRAN) * CVT_CELL_GRAN;
586 h_fp = h_blank - hsync - h_bp;
587 }
588
589 fmt->type = V4L2_DV_BT_656_1120;
590 fmt->bt.polarities = polarities;
591 fmt->bt.width = image_width;
592 fmt->bt.height = image_height;
593 fmt->bt.hfrontporch = h_fp;
594 fmt->bt.vfrontporch = v_fp;
595 fmt->bt.hsync = hsync;
596 fmt->bt.vsync = vsync;
597 fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync;
598
599 if (!interlaced) {
600 fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync;
601 fmt->bt.interlaced = V4L2_DV_PROGRESSIVE;
602 } else {
603 fmt->bt.vbackporch = (frame_height - image_height - 2 * v_fp -
604 2 * vsync) / 2;
605 fmt->bt.il_vbackporch = frame_height - image_height - 2 * v_fp -
606 2 * vsync - fmt->bt.vbackporch;
607 fmt->bt.il_vfrontporch = v_fp;
608 fmt->bt.il_vsync = vsync;
609 fmt->bt.flags |= V4L2_DV_FL_HALF_LINE;
610 fmt->bt.interlaced = V4L2_DV_INTERLACED;
611 }
612
613 fmt->bt.pixelclock = pix_clk;
614 fmt->bt.standards = V4L2_DV_BT_STD_CVT;
615
616 if (reduced_blanking)
617 fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING;
618
619 return true;
620 }
621 EXPORT_SYMBOL_GPL(v4l2_detect_cvt);
622
623 /*
624 * GTF defines
625 * Based on Generalized Timing Formula Standard
626 * Version 1.1 September 2, 1999
627 */
628
629 #define GTF_PXL_CLK_GRAN 250000 /* pixel clock granularity */
630
631 #define GTF_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */
632 #define GTF_V_FP 1 /* vertical front porch (lines) */
633 #define GTF_CELL_GRAN 8 /* character cell granularity */
634
635 /* Default */
636 #define GTF_D_M 600 /* blanking formula gradient */
637 #define GTF_D_C 40 /* blanking formula offset */
638 #define GTF_D_K 128 /* blanking formula scaling factor */
639 #define GTF_D_J 20 /* blanking formula scaling factor */
640 #define GTF_D_C_PRIME ((((GTF_D_C - GTF_D_J) * GTF_D_K) / 256) + GTF_D_J)
641 #define GTF_D_M_PRIME ((GTF_D_K * GTF_D_M) / 256)
642
643 /* Secondary */
644 #define GTF_S_M 3600 /* blanking formula gradient */
645 #define GTF_S_C 40 /* blanking formula offset */
646 #define GTF_S_K 128 /* blanking formula scaling factor */
647 #define GTF_S_J 35 /* blanking formula scaling factor */
648 #define GTF_S_C_PRIME ((((GTF_S_C - GTF_S_J) * GTF_S_K) / 256) + GTF_S_J)
649 #define GTF_S_M_PRIME ((GTF_S_K * GTF_S_M) / 256)
650
651 /** v4l2_detect_gtf - detect if the given timings follow the GTF standard
652 * @frame_height - the total height of the frame (including blanking) in lines.
653 * @hfreq - the horizontal frequency in Hz.
654 * @vsync - the height of the vertical sync in lines.
655 * @polarities - the horizontal and vertical polarities (same as struct
656 * v4l2_bt_timings polarities).
657 * @interlaced - if this flag is true, it indicates interlaced format
658 * @aspect - preferred aspect ratio. GTF has no method of determining the
659 * aspect ratio in order to derive the image width from the
660 * image height, so it has to be passed explicitly. Usually
661 * the native screen aspect ratio is used for this. If it
662 * is not filled in correctly, then 16:9 will be assumed.
663 * @fmt - the resulting timings.
664 *
665 * This function will attempt to detect if the given values correspond to a
666 * valid GTF format. If so, then it will return true, and fmt will be filled
667 * in with the found GTF timings.
668 */
v4l2_detect_gtf(unsigned frame_height,unsigned hfreq,unsigned vsync,u32 polarities,bool interlaced,struct v4l2_fract aspect,struct v4l2_dv_timings * fmt)669 bool v4l2_detect_gtf(unsigned frame_height,
670 unsigned hfreq,
671 unsigned vsync,
672 u32 polarities,
673 bool interlaced,
674 struct v4l2_fract aspect,
675 struct v4l2_dv_timings *fmt)
676 {
677 int pix_clk;
678 int v_fp, v_bp, h_fp, hsync;
679 int frame_width, image_height, image_width;
680 bool default_gtf;
681 int h_blank;
682
683 if (vsync != 3)
684 return false;
685
686 if (polarities == V4L2_DV_VSYNC_POS_POL)
687 default_gtf = true;
688 else if (polarities == V4L2_DV_HSYNC_POS_POL)
689 default_gtf = false;
690 else
691 return false;
692
693 if (hfreq == 0)
694 return false;
695
696 /* Vertical */
697 v_fp = GTF_V_FP;
698 v_bp = (GTF_MIN_VSYNC_BP * hfreq + 500000) / 1000000 - vsync;
699 if (interlaced)
700 image_height = (frame_height - 2 * v_fp - 2 * vsync - 2 * v_bp) & ~0x1;
701 else
702 image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1;
703
704 if (image_height < 0)
705 return false;
706
707 if (aspect.numerator == 0 || aspect.denominator == 0) {
708 aspect.numerator = 16;
709 aspect.denominator = 9;
710 }
711 image_width = ((image_height * aspect.numerator) / aspect.denominator);
712 image_width = (image_width + GTF_CELL_GRAN/2) & ~(GTF_CELL_GRAN - 1);
713
714 /* Horizontal */
715 if (default_gtf) {
716 u64 num;
717 u32 den;
718
719 num = ((image_width * GTF_D_C_PRIME * (u64)hfreq) -
720 ((u64)image_width * GTF_D_M_PRIME * 1000));
721 den = (hfreq * (100 - GTF_D_C_PRIME) + GTF_D_M_PRIME * 1000) *
722 (2 * GTF_CELL_GRAN);
723 h_blank = div_u64((num + (den >> 1)), den);
724 h_blank *= (2 * GTF_CELL_GRAN);
725 } else {
726 u64 num;
727 u32 den;
728
729 num = ((image_width * GTF_S_C_PRIME * (u64)hfreq) -
730 ((u64)image_width * GTF_S_M_PRIME * 1000));
731 den = (hfreq * (100 - GTF_S_C_PRIME) + GTF_S_M_PRIME * 1000) *
732 (2 * GTF_CELL_GRAN);
733 h_blank = div_u64((num + (den >> 1)), den);
734 h_blank *= (2 * GTF_CELL_GRAN);
735 }
736
737 frame_width = image_width + h_blank;
738
739 pix_clk = (image_width + h_blank) * hfreq;
740 pix_clk = pix_clk / GTF_PXL_CLK_GRAN * GTF_PXL_CLK_GRAN;
741
742 hsync = (frame_width * 8 + 50) / 100;
743 hsync = ((hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN) * GTF_CELL_GRAN;
744
745 h_fp = h_blank / 2 - hsync;
746
747 fmt->type = V4L2_DV_BT_656_1120;
748 fmt->bt.polarities = polarities;
749 fmt->bt.width = image_width;
750 fmt->bt.height = image_height;
751 fmt->bt.hfrontporch = h_fp;
752 fmt->bt.vfrontporch = v_fp;
753 fmt->bt.hsync = hsync;
754 fmt->bt.vsync = vsync;
755 fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync;
756
757 if (!interlaced) {
758 fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync;
759 fmt->bt.interlaced = V4L2_DV_PROGRESSIVE;
760 } else {
761 fmt->bt.vbackporch = (frame_height - image_height - 2 * v_fp -
762 2 * vsync) / 2;
763 fmt->bt.il_vbackporch = frame_height - image_height - 2 * v_fp -
764 2 * vsync - fmt->bt.vbackporch;
765 fmt->bt.il_vfrontporch = v_fp;
766 fmt->bt.il_vsync = vsync;
767 fmt->bt.flags |= V4L2_DV_FL_HALF_LINE;
768 fmt->bt.interlaced = V4L2_DV_INTERLACED;
769 }
770
771 fmt->bt.pixelclock = pix_clk;
772 fmt->bt.standards = V4L2_DV_BT_STD_GTF;
773
774 if (!default_gtf)
775 fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING;
776
777 return true;
778 }
779 EXPORT_SYMBOL_GPL(v4l2_detect_gtf);
780
781 /** v4l2_calc_aspect_ratio - calculate the aspect ratio based on bytes
782 * 0x15 and 0x16 from the EDID.
783 * @hor_landscape - byte 0x15 from the EDID.
784 * @vert_portrait - byte 0x16 from the EDID.
785 *
786 * Determines the aspect ratio from the EDID.
787 * See VESA Enhanced EDID standard, release A, rev 2, section 3.6.2:
788 * "Horizontal and Vertical Screen Size or Aspect Ratio"
789 */
v4l2_calc_aspect_ratio(u8 hor_landscape,u8 vert_portrait)790 struct v4l2_fract v4l2_calc_aspect_ratio(u8 hor_landscape, u8 vert_portrait)
791 {
792 struct v4l2_fract aspect = { 16, 9 };
793 u8 ratio;
794
795 /* Nothing filled in, fallback to 16:9 */
796 if (!hor_landscape && !vert_portrait)
797 return aspect;
798 /* Both filled in, so they are interpreted as the screen size in cm */
799 if (hor_landscape && vert_portrait) {
800 aspect.numerator = hor_landscape;
801 aspect.denominator = vert_portrait;
802 return aspect;
803 }
804 /* Only one is filled in, so interpret them as a ratio:
805 (val + 99) / 100 */
806 ratio = hor_landscape | vert_portrait;
807 /* Change some rounded values into the exact aspect ratio */
808 if (ratio == 79) {
809 aspect.numerator = 16;
810 aspect.denominator = 9;
811 } else if (ratio == 34) {
812 aspect.numerator = 4;
813 aspect.denominator = 3;
814 } else if (ratio == 68) {
815 aspect.numerator = 15;
816 aspect.denominator = 9;
817 } else {
818 aspect.numerator = hor_landscape + 99;
819 aspect.denominator = 100;
820 }
821 if (hor_landscape)
822 return aspect;
823 /* The aspect ratio is for portrait, so swap numerator and denominator */
824 swap(aspect.denominator, aspect.numerator);
825 return aspect;
826 }
827 EXPORT_SYMBOL_GPL(v4l2_calc_aspect_ratio);
828
829 /** v4l2_hdmi_rx_colorimetry - determine HDMI colorimetry information
830 * based on various InfoFrames.
831 * @avi: the AVI InfoFrame
832 * @hdmi: the HDMI Vendor InfoFrame, may be NULL
833 * @height: the frame height
834 *
835 * Determines the HDMI colorimetry information, i.e. how the HDMI
836 * pixel color data should be interpreted.
837 *
838 * Note that some of the newer features (DCI-P3, HDR) are not yet
839 * implemented: the hdmi.h header needs to be updated to the HDMI 2.0
840 * and CTA-861-G standards.
841 */
842 struct v4l2_hdmi_colorimetry
v4l2_hdmi_rx_colorimetry(const struct hdmi_avi_infoframe * avi,const struct hdmi_vendor_infoframe * hdmi,unsigned int height)843 v4l2_hdmi_rx_colorimetry(const struct hdmi_avi_infoframe *avi,
844 const struct hdmi_vendor_infoframe *hdmi,
845 unsigned int height)
846 {
847 struct v4l2_hdmi_colorimetry c = {
848 V4L2_COLORSPACE_SRGB,
849 V4L2_YCBCR_ENC_DEFAULT,
850 V4L2_QUANTIZATION_FULL_RANGE,
851 V4L2_XFER_FUNC_SRGB
852 };
853 bool is_ce = avi->video_code || (hdmi && hdmi->vic);
854 bool is_sdtv = height <= 576;
855 bool default_is_lim_range_rgb = avi->video_code > 1;
856
857 switch (avi->colorspace) {
858 case HDMI_COLORSPACE_RGB:
859 /* RGB pixel encoding */
860 switch (avi->colorimetry) {
861 case HDMI_COLORIMETRY_EXTENDED:
862 switch (avi->extended_colorimetry) {
863 case HDMI_EXTENDED_COLORIMETRY_OPRGB:
864 c.colorspace = V4L2_COLORSPACE_OPRGB;
865 c.xfer_func = V4L2_XFER_FUNC_OPRGB;
866 break;
867 case HDMI_EXTENDED_COLORIMETRY_BT2020:
868 c.colorspace = V4L2_COLORSPACE_BT2020;
869 c.xfer_func = V4L2_XFER_FUNC_709;
870 break;
871 default:
872 break;
873 }
874 break;
875 default:
876 break;
877 }
878 switch (avi->quantization_range) {
879 case HDMI_QUANTIZATION_RANGE_LIMITED:
880 c.quantization = V4L2_QUANTIZATION_LIM_RANGE;
881 break;
882 case HDMI_QUANTIZATION_RANGE_FULL:
883 break;
884 default:
885 if (default_is_lim_range_rgb)
886 c.quantization = V4L2_QUANTIZATION_LIM_RANGE;
887 break;
888 }
889 break;
890
891 default:
892 /* YCbCr pixel encoding */
893 c.quantization = V4L2_QUANTIZATION_LIM_RANGE;
894 switch (avi->colorimetry) {
895 case HDMI_COLORIMETRY_NONE:
896 if (!is_ce)
897 break;
898 if (is_sdtv) {
899 c.colorspace = V4L2_COLORSPACE_SMPTE170M;
900 c.ycbcr_enc = V4L2_YCBCR_ENC_601;
901 } else {
902 c.colorspace = V4L2_COLORSPACE_REC709;
903 c.ycbcr_enc = V4L2_YCBCR_ENC_709;
904 }
905 c.xfer_func = V4L2_XFER_FUNC_709;
906 break;
907 case HDMI_COLORIMETRY_ITU_601:
908 c.colorspace = V4L2_COLORSPACE_SMPTE170M;
909 c.ycbcr_enc = V4L2_YCBCR_ENC_601;
910 c.xfer_func = V4L2_XFER_FUNC_709;
911 break;
912 case HDMI_COLORIMETRY_ITU_709:
913 c.colorspace = V4L2_COLORSPACE_REC709;
914 c.ycbcr_enc = V4L2_YCBCR_ENC_709;
915 c.xfer_func = V4L2_XFER_FUNC_709;
916 break;
917 case HDMI_COLORIMETRY_EXTENDED:
918 switch (avi->extended_colorimetry) {
919 case HDMI_EXTENDED_COLORIMETRY_XV_YCC_601:
920 c.colorspace = V4L2_COLORSPACE_REC709;
921 c.ycbcr_enc = V4L2_YCBCR_ENC_XV709;
922 c.xfer_func = V4L2_XFER_FUNC_709;
923 break;
924 case HDMI_EXTENDED_COLORIMETRY_XV_YCC_709:
925 c.colorspace = V4L2_COLORSPACE_REC709;
926 c.ycbcr_enc = V4L2_YCBCR_ENC_XV601;
927 c.xfer_func = V4L2_XFER_FUNC_709;
928 break;
929 case HDMI_EXTENDED_COLORIMETRY_S_YCC_601:
930 c.colorspace = V4L2_COLORSPACE_SRGB;
931 c.ycbcr_enc = V4L2_YCBCR_ENC_601;
932 c.xfer_func = V4L2_XFER_FUNC_SRGB;
933 break;
934 case HDMI_EXTENDED_COLORIMETRY_OPYCC_601:
935 c.colorspace = V4L2_COLORSPACE_OPRGB;
936 c.ycbcr_enc = V4L2_YCBCR_ENC_601;
937 c.xfer_func = V4L2_XFER_FUNC_OPRGB;
938 break;
939 case HDMI_EXTENDED_COLORIMETRY_BT2020:
940 c.colorspace = V4L2_COLORSPACE_BT2020;
941 c.ycbcr_enc = V4L2_YCBCR_ENC_BT2020;
942 c.xfer_func = V4L2_XFER_FUNC_709;
943 break;
944 case HDMI_EXTENDED_COLORIMETRY_BT2020_CONST_LUM:
945 c.colorspace = V4L2_COLORSPACE_BT2020;
946 c.ycbcr_enc = V4L2_YCBCR_ENC_BT2020_CONST_LUM;
947 c.xfer_func = V4L2_XFER_FUNC_709;
948 break;
949 default: /* fall back to ITU_709 */
950 c.colorspace = V4L2_COLORSPACE_REC709;
951 c.ycbcr_enc = V4L2_YCBCR_ENC_709;
952 c.xfer_func = V4L2_XFER_FUNC_709;
953 break;
954 }
955 break;
956 default:
957 break;
958 }
959 /*
960 * YCC Quantization Range signaling is more-or-less broken,
961 * let's just ignore this.
962 */
963 break;
964 }
965 return c;
966 }
967 EXPORT_SYMBOL_GPL(v4l2_hdmi_rx_colorimetry);
968
969 /**
970 * v4l2_get_edid_phys_addr() - find and return the physical address
971 *
972 * @edid: pointer to the EDID data
973 * @size: size in bytes of the EDID data
974 * @offset: If not %NULL then the location of the physical address
975 * bytes in the EDID will be returned here. This is set to 0
976 * if there is no physical address found.
977 *
978 * Return: the physical address or CEC_PHYS_ADDR_INVALID if there is none.
979 */
v4l2_get_edid_phys_addr(const u8 * edid,unsigned int size,unsigned int * offset)980 u16 v4l2_get_edid_phys_addr(const u8 *edid, unsigned int size,
981 unsigned int *offset)
982 {
983 unsigned int loc = cec_get_edid_spa_location(edid, size);
984
985 if (offset)
986 *offset = loc;
987 if (loc == 0)
988 return CEC_PHYS_ADDR_INVALID;
989 return (edid[loc] << 8) | edid[loc + 1];
990 }
991 EXPORT_SYMBOL_GPL(v4l2_get_edid_phys_addr);
992
993 /**
994 * v4l2_set_edid_phys_addr() - find and set the physical address
995 *
996 * @edid: pointer to the EDID data
997 * @size: size in bytes of the EDID data
998 * @phys_addr: the new physical address
999 *
1000 * This function finds the location of the physical address in the EDID
1001 * and fills in the given physical address and updates the checksum
1002 * at the end of the EDID block. It does nothing if the EDID doesn't
1003 * contain a physical address.
1004 */
v4l2_set_edid_phys_addr(u8 * edid,unsigned int size,u16 phys_addr)1005 void v4l2_set_edid_phys_addr(u8 *edid, unsigned int size, u16 phys_addr)
1006 {
1007 unsigned int loc = cec_get_edid_spa_location(edid, size);
1008 u8 sum = 0;
1009 unsigned int i;
1010
1011 if (loc == 0)
1012 return;
1013 edid[loc] = phys_addr >> 8;
1014 edid[loc + 1] = phys_addr & 0xff;
1015 loc &= ~0x7f;
1016
1017 /* update the checksum */
1018 for (i = loc; i < loc + 127; i++)
1019 sum += edid[i];
1020 edid[i] = 256 - sum;
1021 }
1022 EXPORT_SYMBOL_GPL(v4l2_set_edid_phys_addr);
1023
1024 /**
1025 * v4l2_phys_addr_for_input() - calculate the PA for an input
1026 *
1027 * @phys_addr: the physical address of the parent
1028 * @input: the number of the input port, must be between 1 and 15
1029 *
1030 * This function calculates a new physical address based on the input
1031 * port number. For example:
1032 *
1033 * PA = 0.0.0.0 and input = 2 becomes 2.0.0.0
1034 *
1035 * PA = 3.0.0.0 and input = 1 becomes 3.1.0.0
1036 *
1037 * PA = 3.2.1.0 and input = 5 becomes 3.2.1.5
1038 *
1039 * PA = 3.2.1.3 and input = 5 becomes f.f.f.f since it maxed out the depth.
1040 *
1041 * Return: the new physical address or CEC_PHYS_ADDR_INVALID.
1042 */
v4l2_phys_addr_for_input(u16 phys_addr,u8 input)1043 u16 v4l2_phys_addr_for_input(u16 phys_addr, u8 input)
1044 {
1045 /* Check if input is sane */
1046 if (WARN_ON(input == 0 || input > 0xf))
1047 return CEC_PHYS_ADDR_INVALID;
1048
1049 if (phys_addr == 0)
1050 return input << 12;
1051
1052 if ((phys_addr & 0x0fff) == 0)
1053 return phys_addr | (input << 8);
1054
1055 if ((phys_addr & 0x00ff) == 0)
1056 return phys_addr | (input << 4);
1057
1058 if ((phys_addr & 0x000f) == 0)
1059 return phys_addr | input;
1060
1061 /*
1062 * All nibbles are used so no valid physical addresses can be assigned
1063 * to the input.
1064 */
1065 return CEC_PHYS_ADDR_INVALID;
1066 }
1067 EXPORT_SYMBOL_GPL(v4l2_phys_addr_for_input);
1068
1069 /**
1070 * v4l2_phys_addr_validate() - validate a physical address from an EDID
1071 *
1072 * @phys_addr: the physical address to validate
1073 * @parent: if not %NULL, then this is filled with the parents PA.
1074 * @port: if not %NULL, then this is filled with the input port.
1075 *
1076 * This validates a physical address as read from an EDID. If the
1077 * PA is invalid (such as 1.0.1.0 since '0' is only allowed at the end),
1078 * then it will return -EINVAL.
1079 *
1080 * The parent PA is passed into %parent and the input port is passed into
1081 * %port. For example:
1082 *
1083 * PA = 0.0.0.0: has parent 0.0.0.0 and input port 0.
1084 *
1085 * PA = 1.0.0.0: has parent 0.0.0.0 and input port 1.
1086 *
1087 * PA = 3.2.0.0: has parent 3.0.0.0 and input port 2.
1088 *
1089 * PA = f.f.f.f: has parent f.f.f.f and input port 0.
1090 *
1091 * Return: 0 if the PA is valid, -EINVAL if not.
1092 */
v4l2_phys_addr_validate(u16 phys_addr,u16 * parent,u16 * port)1093 int v4l2_phys_addr_validate(u16 phys_addr, u16 *parent, u16 *port)
1094 {
1095 int i;
1096
1097 if (parent)
1098 *parent = phys_addr;
1099 if (port)
1100 *port = 0;
1101 if (phys_addr == CEC_PHYS_ADDR_INVALID)
1102 return 0;
1103 for (i = 0; i < 16; i += 4)
1104 if (phys_addr & (0xf << i))
1105 break;
1106 if (i == 16)
1107 return 0;
1108 if (parent)
1109 *parent = phys_addr & (0xfff0 << i);
1110 if (port)
1111 *port = (phys_addr >> i) & 0xf;
1112 for (i += 4; i < 16; i += 4)
1113 if ((phys_addr & (0xf << i)) == 0)
1114 return -EINVAL;
1115 return 0;
1116 }
1117 EXPORT_SYMBOL_GPL(v4l2_phys_addr_validate);
1118