Home
last modified time | relevance | path

Searched defs:width (Results 1 – 25 of 168) sorted by relevance

1234567

/linux-4.19.296/drivers/clk/
Dclk-divider.c32 u8 width) in _get_table_maxdiv()
54 static unsigned int _get_maxdiv(const struct clk_div_table *table, u8 width, in _get_maxdiv()
78 unsigned int val, unsigned long flags, u8 width) in _get_div()
103 unsigned int div, unsigned long flags, u8 width) in _get_val()
119 unsigned long flags, unsigned long width) in divider_recalc_rate()
278 const struct clk_div_table *table, u8 width, in clk_divider_bestdiv()
335 u8 width, unsigned long flags) in divider_round_rate_parent()
347 const struct clk_div_table *table, u8 width, in divider_ro_round_rate_parent()
389 const struct clk_div_table *table, u8 width, in divider_get_val()
455 void __iomem *reg, u8 shift, u8 width, in _register_divider()
[all …]
Dclk-mux.c144 u8 width = 0; in clk_hw_register_mux_table() local
209 void __iomem *reg, u8 shift, u8 width, in clk_register_mux()
223 void __iomem *reg, u8 shift, u8 width, in clk_hw_register_mux()
/linux-4.19.296/include/video/
Domapvrfb.h56 static inline void omap_vrfb_adjust_size(u16 *width, u16 *height, in omap_vrfb_adjust_size()
58 static inline u32 omap_vrfb_min_phys_size(u16 width, u16 height, u8 bytespp) in omap_vrfb_min_phys_size()
60 static inline u16 omap_vrfb_max_height(u32 phys_size, u16 width, u8 bytespp) in omap_vrfb_max_height()
63 u16 width, u16 height, unsigned bytespp, bool yuv_mode) {} in omap_vrfb_setup()
/linux-4.19.296/drivers/clk/meson/
Dclkc.h13 #define PMASK(width) GENMASK(width - 1, 0) argument
14 #define SETPMASK(width, shift) GENMASK(shift + width - 1, shift) argument
15 #define CLRPMASK(width, shift) (~SETPMASK(width, shift)) argument
17 #define PARM_GET(width, shift, reg) \ argument
19 #define PARM_SET(width, shift, reg, val) \ argument
27 u8 width; member
Dclk-phase.c18 int meson_clk_degrees_from_val(unsigned int val, unsigned int width) in meson_clk_degrees_from_val()
24 unsigned int meson_clk_degrees_to_val(int degrees, unsigned int width) in meson_clk_degrees_to_val()
/linux-4.19.296/drivers/clk/imx/
Dclk.h82 u8 shift, u8 width, const char * const *parents, in imx_clk_mux_ldb()
98 void __iomem *reg, u8 shift, u8 width) in imx_clk_divider()
105 const char *parent, void __iomem *reg, u8 shift, u8 width, in imx_clk_divider_flags()
113 void __iomem *reg, u8 shift, u8 width) in imx_clk_divider2()
196 u8 shift, u8 width, const char * const *parents, in imx_clk_mux()
205 u8 shift, u8 width, const char * const *parents, in imx_clk_mux2()
214 void __iomem *reg, u8 shift, u8 width, in imx_clk_mux_flags()
/linux-4.19.296/drivers/clk/hisilicon/
Dclkdivider-hi6220.c23 #define div_mask(width) ((1 << (width)) - 1) argument
40 u8 width; member
106 u8 shift, u8 width, u32 mask_bit, spinlock_t *lock) in hi6220_register_clkdiv()
Dclk.h65 u8 width; member
78 u8 width; member
91 u8 width; member
104 u8 width; member
/linux-4.19.296/drivers/clk/ti/
Ddivider.c281 u8 shift, u8 width, s8 latch, in _register_divider()
326 u8 flags, u8 *width, in ti_clk_parse_divider_data()
393 _get_div_table_from_setup(struct ti_clk_divider *setup, u8 *width) in _get_div_table_from_setup()
448 u8 width; in ti_clk_register_divider() local
573 u32 *flags, u8 *div_flags, u8 *width, u8 *shift, s8 *latch) in ti_clk_divider_populate()
628 u8 width = 0; in of_ti_divider_clk_setup() local
/linux-4.19.296/include/xen/interface/io/
Dfbif.h48 int32_t width; /* rect width */ member
60 int32_t width; /* width in pixels */ member
112 int32_t width; /* width of the framebuffer (in pixels) */ member
/linux-4.19.296/drivers/clk/rockchip/
Dclk-muxgrf.c25 u32 width; member
69 int shift, int width, int mux_flags) in rockchip_clk_register_muxgrf()
Dclk-half-divider.c10 #define div_mask(width) ((1 << (width)) - 1) argument
35 unsigned long *best_parent_rate, u8 width, in clk_half_divider_bestdiv()
/linux-4.19.296/drivers/media/common/saa7146/
Dsaa7146_hlp.c343 int width = vv->ov.win.w.width; in calculate_clipping_registers_rect() local
523 static void saa7146_set_window(struct saa7146_dev *dev, int width, int height, enum v4l2_field fiel… in saa7146_set_window()
708 int width = buf->fmt->width; in calculate_video_dma_grab_packed() local
767 int width = buf->fmt->width; in calc_planar_422() local
798 int width = buf->fmt->width; in calc_planar_420() local
833 int width = buf->fmt->width; in calculate_video_dma_grab_planar() local
/linux-4.19.296/drivers/clk/zte/
Dclk-zx296702.c200 void __iomem *reg, u8 shift, u8 width, in zx_divtbl()
208 void __iomem *reg, u8 shift, u8 width) in zx_div()
215 int num_parents, void __iomem *reg, u8 shift, u8 width) in zx_mux()
/linux-4.19.296/drivers/clk/mxs/
Dclk-frac.c33 u8 width; member
117 void __iomem *reg, u8 shift, u8 width, u8 busy) in mxs_clk_frac()
/linux-4.19.296/drivers/clk/h8300/
Dclk-div.c22 int width; in h8300_div_clk_setup() local
/linux-4.19.296/drivers/clk/socfpga/
Dclk.h59 u32 width; /* only valid if div_reg != 0 */ member
71 u32 width; /* only valid if div_reg != 0 */ member
/linux-4.19.296/drivers/clk/tegra/
Dclk-utils.c12 int div_frac_get(unsigned long rate, unsigned parent_rate, u8 width, in div_frac_get()
/linux-4.19.296/drivers/clk/qcom/
Dclk-regmap-divider.h23 u32 width; member
Dclk-regmap-mux.h24 u32 width; member
/linux-4.19.296/include/linux/platform_data/
Dmtd-mxc_nand.h26 unsigned int width; /* data bus width in bytes */ member
Dmtd-orion_nand.h18 u8 width; /* buswidth */ member
/linux-4.19.296/drivers/clk/mmp/
Dclk-mix.c138 u8 width, shift; in _set_rate() local
295 u8 width, shift; in mmp_clk_mix_get_parent() local
325 u8 width, shift; in mmp_clk_mix_recalc_rate() local
Dclk.h42 #define MMP_CLK_BITS_MASK(width, shift) \ argument
44 #define MMP_CLK_BITS_GET_VAL(data, width, shift) \ argument
46 #define MMP_CLK_BITS_SET_VAL(val, width, shift) \ argument
204 u8 width; member
219 u8 width; member
/linux-4.19.296/include/linux/
Dpch_dma.h34 enum pch_dma_width width; member

1234567