1 /* 2 * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved. 3 * Copyright (c) 2021,2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 struct hif_softc; 21 struct hif_exec_context; 22 23 void hif_dummy_bus_prevent_linkdown(struct hif_softc *scn, bool flag); 24 void hif_dummy_reset_soc(struct hif_softc *scn); 25 int hif_dummy_bus_suspend(struct hif_softc *hif_ctx); 26 int hif_dummy_bus_resume(struct hif_softc *hif_ctx); 27 int hif_dummy_bus_suspend_noirq(struct hif_softc *hif_ctx); 28 int hif_dummy_bus_resume_noirq(struct hif_softc *hif_ctx); 29 int hif_dummy_target_sleep_state_adjust(struct hif_softc *scn, 30 bool sleep_ok, bool wait_for_it); 31 void hif_dummy_enable_power_management(struct hif_softc *hif_ctx, 32 bool is_packet_log_enabled); 33 void hif_dummy_disable_power_management(struct hif_softc *hif_ctx); 34 void hif_dummy_disable_isr(struct hif_softc *scn); 35 void hif_dummy_nointrs(struct hif_softc *hif_sc); 36 int hif_dummy_bus_configure(struct hif_softc *hif_sc); 37 QDF_STATUS hif_dummy_get_config_item(struct hif_softc *hif_sc, 38 int opcode, void *config, uint32_t config_len); 39 void hif_dummy_set_mailbox_swap(struct hif_softc *hif_sc); 40 void hif_dummy_claim_device(struct hif_softc *hif_sc); 41 void hif_dummy_cancel_deferred_target_sleep(struct hif_softc *hif_sc); 42 void hif_dummy_irq_enable(struct hif_softc *hif_sc, int irq_id); 43 void hif_dummy_irq_disable(struct hif_softc *hif_sc, int irq_id); 44 void hif_dummy_grp_irq_enable(struct hif_softc *hif_sc, uint32_t grp_id); 45 void hif_dummy_grp_irq_disable(struct hif_softc *hif_sc, uint32_t grp_id); 46 int hif_dummy_grp_irq_configure(struct hif_softc *hif_sc, 47 struct hif_exec_context *exec); 48 void hif_dummy_grp_irq_deconfigure(struct hif_softc *hif_sc); 49 int hif_dummy_dump_registers(struct hif_softc *hif_sc); 50 void hif_dummy_dump_target_memory(struct hif_softc *hif_sc, void *ramdump_base, 51 uint32_t address, uint32_t size); 52 53 /** 54 * hif_dummy_bus_reg_read32() - Read register in 32bits 55 * @hif_sc: PCIe control struct 56 * @offset: The register offset 57 * 58 * This function will read register in 32bits 59 * 60 * Return: return value for register with specified offset 61 */ 62 uint32_t hif_dummy_bus_reg_read32(struct hif_softc *hif_sc, 63 uint32_t offset); 64 65 /** 66 * hif_dummy_bus_reg_write32() - Write register in 32bits 67 * @hif_sc: PCIe control struct 68 * @offset: The register offset 69 * @value: The value need to be written 70 * 71 * This function will write register in 32bits 72 * 73 * Return: None 74 */ 75 void hif_dummy_bus_reg_write32(struct hif_softc *hif_sc, 76 uint32_t offset, 77 uint32_t value); 78 79 void hif_dummy_ipa_get_ce_resource(struct hif_softc *hif_sc, 80 qdf_shared_mem_t **ce_sr, 81 uint32_t *sr_ring_size, 82 qdf_dma_addr_t *reg_paddr); 83 void hif_dummy_mask_interrupt_call(struct hif_softc *hif_sc); 84 void hif_dummy_display_stats(struct hif_softc *hif_ctx); 85 void hif_dummy_clear_stats(struct hif_softc *hif_ctx); 86 void hif_dummy_set_bundle_mode(struct hif_softc *hif_ctx, 87 bool enabled, int rx_bundle_cnt); 88 int hif_dummy_bus_reset_resume(struct hif_softc *hif_ctx); 89 int hif_dummy_map_ce_to_irq(struct hif_softc *scn, int ce_id); 90 int hif_dummy_addr_in_boundary(struct hif_softc *scn, uint32_t offset); 91 void hif_dummy_config_irq_affinity(struct hif_softc *scn); 92 int hif_dummy_config_irq_by_ceid(struct hif_softc *scn, int ce_id); 93 bool hif_dummy_log_bus_info(struct hif_softc *scn, uint8_t *data, 94 unsigned int *offset); 95 int hif_dummy_enable_grp_irqs(struct hif_softc *scn); 96 int hif_dummy_disable_grp_irqs(struct hif_softc *scn); 97 void hif_dummy_config_irq_clear_cpu_affinity(struct hif_softc *scn, 98 int intr_ctxt_id, int cpu); 99 #ifdef FEATURE_IRQ_AFFINITY 100 void hif_dummy_set_grp_intr_affinity(struct hif_softc *scn, 101 uint32_t grp_intr_bitmask, bool perf); 102 #endif 103 void hif_dummy_affinity_mgr_set_affinity(struct hif_softc *scn); 104