1 /* $Id: gazel.c,v 2.19.2.4 2004/01/14 16:04:48 keil Exp $
2 *
3 * low level stuff for Gazel isdn cards
4 *
5 * Author BeWan Systems
6 * based on source code from Karsten Keil
7 * Copyright by BeWan Systems
8 *
9 * This software may be used and distributed according to the terms
10 * of the GNU General Public License, incorporated herein by reference.
11 *
12 */
13
14 #include <linux/init.h>
15 #include "hisax.h"
16 #include "isac.h"
17 #include "hscx.h"
18 #include "isdnl1.h"
19 #include "ipac.h"
20 #include <linux/pci.h>
21
22 static const char *gazel_revision = "$Revision: 2.19.2.4 $";
23
24 #define R647 1
25 #define R685 2
26 #define R753 3
27 #define R742 4
28
29 #define PLX_CNTRL 0x50 /* registre de controle PLX */
30 #define RESET_GAZEL 0x4
31 #define RESET_9050 0x40000000
32 #define PLX_INCSR 0x4C /* registre d'IT du 9050 */
33 #define INT_ISAC_EN 0x8 /* 1 = enable IT isac */
34 #define INT_ISAC 0x20 /* 1 = IT isac en cours */
35 #define INT_HSCX_EN 0x1 /* 1 = enable IT hscx */
36 #define INT_HSCX 0x4 /* 1 = IT hscx en cours */
37 #define INT_PCI_EN 0x40 /* 1 = enable IT PCI */
38 #define INT_IPAC_EN 0x3 /* enable IT ipac */
39
40
41 #define byteout(addr, val) outb(val, addr)
42 #define bytein(addr) inb(addr)
43
44 static inline u_char
readreg(unsigned int adr,u_short off)45 readreg(unsigned int adr, u_short off)
46 {
47 return bytein(adr + off);
48 }
49
50 static inline void
writereg(unsigned int adr,u_short off,u_char data)51 writereg(unsigned int adr, u_short off, u_char data)
52 {
53 byteout(adr + off, data);
54 }
55
56
57 static inline void
read_fifo(unsigned int adr,u_char * data,int size)58 read_fifo(unsigned int adr, u_char *data, int size)
59 {
60 insb(adr, data, size);
61 }
62
63 static void
write_fifo(unsigned int adr,u_char * data,int size)64 write_fifo(unsigned int adr, u_char *data, int size)
65 {
66 outsb(adr, data, size);
67 }
68
69 static inline u_char
readreg_ipac(unsigned int adr,u_short off)70 readreg_ipac(unsigned int adr, u_short off)
71 {
72 register u_char ret;
73
74 byteout(adr, off);
75 ret = bytein(adr + 4);
76 return ret;
77 }
78
79 static inline void
writereg_ipac(unsigned int adr,u_short off,u_char data)80 writereg_ipac(unsigned int adr, u_short off, u_char data)
81 {
82 byteout(adr, off);
83 byteout(adr + 4, data);
84 }
85
86
87 static inline void
read_fifo_ipac(unsigned int adr,u_short off,u_char * data,int size)88 read_fifo_ipac(unsigned int adr, u_short off, u_char *data, int size)
89 {
90 byteout(adr, off);
91 insb(adr + 4, data, size);
92 }
93
94 static void
write_fifo_ipac(unsigned int adr,u_short off,u_char * data,int size)95 write_fifo_ipac(unsigned int adr, u_short off, u_char *data, int size)
96 {
97 byteout(adr, off);
98 outsb(adr + 4, data, size);
99 }
100
101 /* Interface functions */
102
103 static u_char
ReadISAC(struct IsdnCardState * cs,u_char offset)104 ReadISAC(struct IsdnCardState *cs, u_char offset)
105 {
106 u_short off2 = offset;
107
108 switch (cs->subtyp) {
109 case R647:
110 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
111 /* fall through */
112 case R685:
113 return (readreg(cs->hw.gazel.isac, off2));
114 case R753:
115 case R742:
116 return (readreg_ipac(cs->hw.gazel.ipac, 0x80 + off2));
117 }
118 return 0;
119 }
120
121 static void
WriteISAC(struct IsdnCardState * cs,u_char offset,u_char value)122 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
123 {
124 u_short off2 = offset;
125
126 switch (cs->subtyp) {
127 case R647:
128 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
129 /* fall through */
130 case R685:
131 writereg(cs->hw.gazel.isac, off2, value);
132 break;
133 case R753:
134 case R742:
135 writereg_ipac(cs->hw.gazel.ipac, 0x80 + off2, value);
136 break;
137 }
138 }
139
140 static void
ReadISACfifo(struct IsdnCardState * cs,u_char * data,int size)141 ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
142 {
143 switch (cs->subtyp) {
144 case R647:
145 case R685:
146 read_fifo(cs->hw.gazel.isacfifo, data, size);
147 break;
148 case R753:
149 case R742:
150 read_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
151 break;
152 }
153 }
154
155 static void
WriteISACfifo(struct IsdnCardState * cs,u_char * data,int size)156 WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
157 {
158 switch (cs->subtyp) {
159 case R647:
160 case R685:
161 write_fifo(cs->hw.gazel.isacfifo, data, size);
162 break;
163 case R753:
164 case R742:
165 write_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
166 break;
167 }
168 }
169
170 static void
ReadHSCXfifo(struct IsdnCardState * cs,int hscx,u_char * data,int size)171 ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size)
172 {
173 switch (cs->subtyp) {
174 case R647:
175 case R685:
176 read_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
177 break;
178 case R753:
179 case R742:
180 read_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
181 break;
182 }
183 }
184
185 static void
WriteHSCXfifo(struct IsdnCardState * cs,int hscx,u_char * data,int size)186 WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size)
187 {
188 switch (cs->subtyp) {
189 case R647:
190 case R685:
191 write_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
192 break;
193 case R753:
194 case R742:
195 write_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
196 break;
197 }
198 }
199
200 static u_char
ReadHSCX(struct IsdnCardState * cs,int hscx,u_char offset)201 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
202 {
203 u_short off2 = offset;
204
205 switch (cs->subtyp) {
206 case R647:
207 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
208 /* fall through */
209 case R685:
210 return (readreg(cs->hw.gazel.hscx[hscx], off2));
211 case R753:
212 case R742:
213 return (readreg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2));
214 }
215 return 0;
216 }
217
218 static void
WriteHSCX(struct IsdnCardState * cs,int hscx,u_char offset,u_char value)219 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
220 {
221 u_short off2 = offset;
222
223 switch (cs->subtyp) {
224 case R647:
225 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
226 /* fall through */
227 case R685:
228 writereg(cs->hw.gazel.hscx[hscx], off2, value);
229 break;
230 case R753:
231 case R742:
232 writereg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2, value);
233 break;
234 }
235 }
236
237 /*
238 * fast interrupt HSCX stuff goes here
239 */
240
241 #define READHSCX(cs, nr, reg) ReadHSCX(cs, nr, reg)
242 #define WRITEHSCX(cs, nr, reg, data) WriteHSCX(cs, nr, reg, data)
243 #define READHSCXFIFO(cs, nr, ptr, cnt) ReadHSCXfifo(cs, nr, ptr, cnt)
244 #define WRITEHSCXFIFO(cs, nr, ptr, cnt) WriteHSCXfifo(cs, nr, ptr, cnt)
245
246 #include "hscx_irq.c"
247
248 static irqreturn_t
gazel_interrupt(int intno,void * dev_id)249 gazel_interrupt(int intno, void *dev_id)
250 {
251 #define MAXCOUNT 5
252 struct IsdnCardState *cs = dev_id;
253 u_char valisac, valhscx;
254 int count = 0;
255 u_long flags;
256
257 spin_lock_irqsave(&cs->lock, flags);
258 do {
259 valhscx = ReadHSCX(cs, 1, HSCX_ISTA);
260 if (valhscx)
261 hscx_int_main(cs, valhscx);
262 valisac = ReadISAC(cs, ISAC_ISTA);
263 if (valisac)
264 isac_interrupt(cs, valisac);
265 count++;
266 } while ((valhscx || valisac) && (count < MAXCOUNT));
267
268 WriteHSCX(cs, 0, HSCX_MASK, 0xFF);
269 WriteHSCX(cs, 1, HSCX_MASK, 0xFF);
270 WriteISAC(cs, ISAC_MASK, 0xFF);
271 WriteISAC(cs, ISAC_MASK, 0x0);
272 WriteHSCX(cs, 0, HSCX_MASK, 0x0);
273 WriteHSCX(cs, 1, HSCX_MASK, 0x0);
274 spin_unlock_irqrestore(&cs->lock, flags);
275 return IRQ_HANDLED;
276 }
277
278
279 static irqreturn_t
gazel_interrupt_ipac(int intno,void * dev_id)280 gazel_interrupt_ipac(int intno, void *dev_id)
281 {
282 struct IsdnCardState *cs = dev_id;
283 u_char ista, val;
284 int count = 0;
285 u_long flags;
286
287 spin_lock_irqsave(&cs->lock, flags);
288 ista = ReadISAC(cs, IPAC_ISTA - 0x80);
289 do {
290 if (ista & 0x0f) {
291 val = ReadHSCX(cs, 1, HSCX_ISTA);
292 if (ista & 0x01)
293 val |= 0x01;
294 if (ista & 0x04)
295 val |= 0x02;
296 if (ista & 0x08)
297 val |= 0x04;
298 if (val) {
299 hscx_int_main(cs, val);
300 }
301 }
302 if (ista & 0x20) {
303 val = 0xfe & ReadISAC(cs, ISAC_ISTA);
304 if (val) {
305 isac_interrupt(cs, val);
306 }
307 }
308 if (ista & 0x10) {
309 val = 0x01;
310 isac_interrupt(cs, val);
311 }
312 ista = ReadISAC(cs, IPAC_ISTA - 0x80);
313 count++;
314 }
315 while ((ista & 0x3f) && (count < MAXCOUNT));
316
317 WriteISAC(cs, IPAC_MASK - 0x80, 0xFF);
318 WriteISAC(cs, IPAC_MASK - 0x80, 0xC0);
319 spin_unlock_irqrestore(&cs->lock, flags);
320 return IRQ_HANDLED;
321 }
322
323 static void
release_io_gazel(struct IsdnCardState * cs)324 release_io_gazel(struct IsdnCardState *cs)
325 {
326 unsigned int i;
327
328 switch (cs->subtyp) {
329 case R647:
330 for (i = 0x0000; i < 0xC000; i += 0x1000)
331 release_region(i + cs->hw.gazel.hscx[0], 16);
332 release_region(0xC000 + cs->hw.gazel.hscx[0], 1);
333 break;
334
335 case R685:
336 release_region(cs->hw.gazel.hscx[0], 0x100);
337 release_region(cs->hw.gazel.cfg_reg, 0x80);
338 break;
339
340 case R753:
341 release_region(cs->hw.gazel.ipac, 0x8);
342 release_region(cs->hw.gazel.cfg_reg, 0x80);
343 break;
344
345 case R742:
346 release_region(cs->hw.gazel.ipac, 8);
347 break;
348 }
349 }
350
351 static int
reset_gazel(struct IsdnCardState * cs)352 reset_gazel(struct IsdnCardState *cs)
353 {
354 unsigned long plxcntrl, addr = cs->hw.gazel.cfg_reg;
355
356 switch (cs->subtyp) {
357 case R647:
358 writereg(addr, 0, 0);
359 HZDELAY(10);
360 writereg(addr, 0, 1);
361 HZDELAY(2);
362 break;
363 case R685:
364 plxcntrl = inl(addr + PLX_CNTRL);
365 plxcntrl |= (RESET_9050 + RESET_GAZEL);
366 outl(plxcntrl, addr + PLX_CNTRL);
367 plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
368 HZDELAY(4);
369 outl(plxcntrl, addr + PLX_CNTRL);
370 HZDELAY(10);
371 outb(INT_ISAC_EN + INT_HSCX_EN + INT_PCI_EN, addr + PLX_INCSR);
372 break;
373 case R753:
374 plxcntrl = inl(addr + PLX_CNTRL);
375 plxcntrl |= (RESET_9050 + RESET_GAZEL);
376 outl(plxcntrl, addr + PLX_CNTRL);
377 plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
378 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
379 HZDELAY(4);
380 outl(plxcntrl, addr + PLX_CNTRL);
381 HZDELAY(10);
382 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
383 WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
384 WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
385 WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
386 WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
387 outb(INT_IPAC_EN + INT_PCI_EN, addr + PLX_INCSR);
388 WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
389 break;
390 case R742:
391 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
392 HZDELAY(4);
393 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
394 WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
395 WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
396 WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
397 WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
398 WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
399 break;
400 }
401 return (0);
402 }
403
404 static int
Gazel_card_msg(struct IsdnCardState * cs,int mt,void * arg)405 Gazel_card_msg(struct IsdnCardState *cs, int mt, void *arg)
406 {
407 u_long flags;
408
409 switch (mt) {
410 case CARD_RESET:
411 spin_lock_irqsave(&cs->lock, flags);
412 reset_gazel(cs);
413 spin_unlock_irqrestore(&cs->lock, flags);
414 return (0);
415 case CARD_RELEASE:
416 release_io_gazel(cs);
417 return (0);
418 case CARD_INIT:
419 spin_lock_irqsave(&cs->lock, flags);
420 inithscxisac(cs, 1);
421 if ((cs->subtyp == R647) || (cs->subtyp == R685)) {
422 int i;
423 for (i = 0; i < (2 + MAX_WAITING_CALLS); i++) {
424 cs->bcs[i].hw.hscx.tsaxr0 = 0x1f;
425 cs->bcs[i].hw.hscx.tsaxr1 = 0x23;
426 }
427 }
428 spin_unlock_irqrestore(&cs->lock, flags);
429 return (0);
430 case CARD_TEST:
431 return (0);
432 }
433 return (0);
434 }
435
436 static int
reserve_regions(struct IsdnCard * card,struct IsdnCardState * cs)437 reserve_regions(struct IsdnCard *card, struct IsdnCardState *cs)
438 {
439 unsigned int i, j, base = 0, adr = 0, len = 0;
440
441 switch (cs->subtyp) {
442 case R647:
443 base = cs->hw.gazel.hscx[0];
444 if (!request_region(adr = (0xC000 + base), len = 1, "gazel"))
445 goto error;
446 for (i = 0x0000; i < 0xC000; i += 0x1000) {
447 if (!request_region(adr = (i + base), len = 16, "gazel"))
448 goto error;
449 }
450 if (i != 0xC000) {
451 for (j = 0; j < i; j += 0x1000)
452 release_region(j + base, 16);
453 release_region(0xC000 + base, 1);
454 goto error;
455 }
456 break;
457
458 case R685:
459 if (!request_region(adr = cs->hw.gazel.hscx[0], len = 0x100, "gazel"))
460 goto error;
461 if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
462 release_region(cs->hw.gazel.hscx[0], 0x100);
463 goto error;
464 }
465 break;
466
467 case R753:
468 if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
469 goto error;
470 if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
471 release_region(cs->hw.gazel.ipac, 8);
472 goto error;
473 }
474 break;
475
476 case R742:
477 if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
478 goto error;
479 break;
480 }
481
482 return 0;
483
484 error:
485 printk(KERN_WARNING "Gazel: io ports 0x%x-0x%x already in use\n",
486 adr, adr + len);
487 return 1;
488 }
489
setup_gazelisa(struct IsdnCard * card,struct IsdnCardState * cs)490 static int setup_gazelisa(struct IsdnCard *card, struct IsdnCardState *cs)
491 {
492 printk(KERN_INFO "Gazel: ISA PnP card automatic recognition\n");
493 // we got an irq parameter, assume it is an ISA card
494 // R742 decodes address even in not started...
495 // R647 returns FF if not present or not started
496 // eventually needs improvment
497 if (readreg_ipac(card->para[1], IPAC_ID) == 1)
498 cs->subtyp = R742;
499 else
500 cs->subtyp = R647;
501
502 setup_isac(cs);
503 cs->hw.gazel.cfg_reg = card->para[1] + 0xC000;
504 cs->hw.gazel.ipac = card->para[1];
505 cs->hw.gazel.isac = card->para[1] + 0x8000;
506 cs->hw.gazel.hscx[0] = card->para[1];
507 cs->hw.gazel.hscx[1] = card->para[1] + 0x4000;
508 cs->irq = card->para[0];
509 cs->hw.gazel.isacfifo = cs->hw.gazel.isac;
510 cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0];
511 cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1];
512
513 switch (cs->subtyp) {
514 case R647:
515 printk(KERN_INFO "Gazel: Card ISA R647/R648 found\n");
516 cs->dc.isac.adf2 = 0x87;
517 printk(KERN_INFO
518 "Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
519 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
520 printk(KERN_INFO
521 "Gazel: hscx A:0x%X hscx B:0x%X\n",
522 cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
523
524 break;
525 case R742:
526 printk(KERN_INFO "Gazel: Card ISA R742 found\n");
527 test_and_set_bit(HW_IPAC, &cs->HW_Flags);
528 printk(KERN_INFO
529 "Gazel: config irq:%d ipac:0x%X\n",
530 cs->irq, cs->hw.gazel.ipac);
531 break;
532 }
533
534 return (0);
535 }
536
537 #ifdef CONFIG_PCI
538 static struct pci_dev *dev_tel = NULL;
539
setup_gazelpci(struct IsdnCardState * cs)540 static int setup_gazelpci(struct IsdnCardState *cs)
541 {
542 u_int pci_ioaddr0 = 0, pci_ioaddr1 = 0;
543 u_char pci_irq = 0, found;
544 u_int nbseek, seekcard;
545
546 printk(KERN_WARNING "Gazel: PCI card automatic recognition\n");
547
548 found = 0;
549 seekcard = PCI_DEVICE_ID_PLX_R685;
550 for (nbseek = 0; nbseek < 4; nbseek++) {
551 if ((dev_tel = hisax_find_pci_device(PCI_VENDOR_ID_PLX,
552 seekcard, dev_tel))) {
553 if (pci_enable_device(dev_tel))
554 return 1;
555 pci_irq = dev_tel->irq;
556 pci_ioaddr0 = pci_resource_start(dev_tel, 1);
557 pci_ioaddr1 = pci_resource_start(dev_tel, 2);
558 found = 1;
559 }
560 if (found)
561 break;
562 else {
563 switch (seekcard) {
564 case PCI_DEVICE_ID_PLX_R685:
565 seekcard = PCI_DEVICE_ID_PLX_R753;
566 break;
567 case PCI_DEVICE_ID_PLX_R753:
568 seekcard = PCI_DEVICE_ID_PLX_DJINN_ITOO;
569 break;
570 case PCI_DEVICE_ID_PLX_DJINN_ITOO:
571 seekcard = PCI_DEVICE_ID_PLX_OLITEC;
572 break;
573 }
574 }
575 }
576 if (!found) {
577 printk(KERN_WARNING "Gazel: No PCI card found\n");
578 return (1);
579 }
580 if (!pci_irq) {
581 printk(KERN_WARNING "Gazel: No IRQ for PCI card found\n");
582 return 1;
583 }
584 cs->hw.gazel.pciaddr[0] = pci_ioaddr0;
585 cs->hw.gazel.pciaddr[1] = pci_ioaddr1;
586 setup_isac(cs);
587 pci_ioaddr1 &= 0xfffe;
588 cs->hw.gazel.cfg_reg = pci_ioaddr0 & 0xfffe;
589 cs->hw.gazel.ipac = pci_ioaddr1;
590 cs->hw.gazel.isac = pci_ioaddr1 + 0x80;
591 cs->hw.gazel.hscx[0] = pci_ioaddr1;
592 cs->hw.gazel.hscx[1] = pci_ioaddr1 + 0x40;
593 cs->hw.gazel.isacfifo = cs->hw.gazel.isac;
594 cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0];
595 cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1];
596 cs->irq = pci_irq;
597 cs->irq_flags |= IRQF_SHARED;
598
599 switch (seekcard) {
600 case PCI_DEVICE_ID_PLX_R685:
601 printk(KERN_INFO "Gazel: Card PCI R685 found\n");
602 cs->subtyp = R685;
603 cs->dc.isac.adf2 = 0x87;
604 printk(KERN_INFO
605 "Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
606 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
607 printk(KERN_INFO
608 "Gazel: hscx A:0x%X hscx B:0x%X\n",
609 cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
610 break;
611 case PCI_DEVICE_ID_PLX_R753:
612 case PCI_DEVICE_ID_PLX_DJINN_ITOO:
613 case PCI_DEVICE_ID_PLX_OLITEC:
614 printk(KERN_INFO "Gazel: Card PCI R753 found\n");
615 cs->subtyp = R753;
616 test_and_set_bit(HW_IPAC, &cs->HW_Flags);
617 printk(KERN_INFO
618 "Gazel: config irq:%d ipac:0x%X cfg:0x%X\n",
619 cs->irq, cs->hw.gazel.ipac, cs->hw.gazel.cfg_reg);
620 break;
621 }
622
623 return (0);
624 }
625 #endif /* CONFIG_PCI */
626
setup_gazel(struct IsdnCard * card)627 int setup_gazel(struct IsdnCard *card)
628 {
629 struct IsdnCardState *cs = card->cs;
630 char tmp[64];
631 u_char val;
632
633 strcpy(tmp, gazel_revision);
634 printk(KERN_INFO "Gazel: Driver Revision %s\n", HiSax_getrev(tmp));
635
636 if (cs->typ != ISDN_CTYPE_GAZEL)
637 return (0);
638
639 if (card->para[0]) {
640 if (setup_gazelisa(card, cs))
641 return (0);
642 } else {
643
644 #ifdef CONFIG_PCI
645 if (setup_gazelpci(cs))
646 return (0);
647 #else
648 printk(KERN_WARNING "Gazel: Card PCI requested and NO_PCI_BIOS, unable to config\n");
649 return (0);
650 #endif /* CONFIG_PCI */
651 }
652
653 if (reserve_regions(card, cs)) {
654 return (0);
655 }
656 if (reset_gazel(cs)) {
657 printk(KERN_WARNING "Gazel: wrong IRQ\n");
658 release_io_gazel(cs);
659 return (0);
660 }
661 cs->readisac = &ReadISAC;
662 cs->writeisac = &WriteISAC;
663 cs->readisacfifo = &ReadISACfifo;
664 cs->writeisacfifo = &WriteISACfifo;
665 cs->BC_Read_Reg = &ReadHSCX;
666 cs->BC_Write_Reg = &WriteHSCX;
667 cs->BC_Send_Data = &hscx_fill_fifo;
668 cs->cardmsg = &Gazel_card_msg;
669
670 switch (cs->subtyp) {
671 case R647:
672 case R685:
673 cs->irq_func = &gazel_interrupt;
674 ISACVersion(cs, "Gazel:");
675 if (HscxVersion(cs, "Gazel:")) {
676 printk(KERN_WARNING
677 "Gazel: wrong HSCX versions check IO address\n");
678 release_io_gazel(cs);
679 return (0);
680 }
681 break;
682 case R742:
683 case R753:
684 cs->irq_func = &gazel_interrupt_ipac;
685 val = ReadISAC(cs, IPAC_ID - 0x80);
686 printk(KERN_INFO "Gazel: IPAC version %x\n", val);
687 break;
688 }
689
690 return (1);
691 }
692