1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Purpose: PCI Express Port Bus Driver's Internal Data Structures
4 *
5 * Copyright (C) 2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
7 */
8
9 #ifndef _PORTDRV_H_
10 #define _PORTDRV_H_
11
12 #include <linux/compiler.h>
13
14 /* Service Type */
15 #define PCIE_PORT_SERVICE_PME_SHIFT 0 /* Power Management Event */
16 #define PCIE_PORT_SERVICE_PME (1 << PCIE_PORT_SERVICE_PME_SHIFT)
17 #define PCIE_PORT_SERVICE_AER_SHIFT 1 /* Advanced Error Reporting */
18 #define PCIE_PORT_SERVICE_AER (1 << PCIE_PORT_SERVICE_AER_SHIFT)
19 #define PCIE_PORT_SERVICE_HP_SHIFT 2 /* Native Hotplug */
20 #define PCIE_PORT_SERVICE_HP (1 << PCIE_PORT_SERVICE_HP_SHIFT)
21 #define PCIE_PORT_SERVICE_DPC_SHIFT 3 /* Downstream Port Containment */
22 #define PCIE_PORT_SERVICE_DPC (1 << PCIE_PORT_SERVICE_DPC_SHIFT)
23
24 #define PCIE_PORT_DEVICE_MAXSERVICES 4
25
26 #ifdef CONFIG_PCIEAER
27 int pcie_aer_init(void);
28 #else
pcie_aer_init(void)29 static inline int pcie_aer_init(void) { return 0; }
30 #endif
31
32 #ifdef CONFIG_HOTPLUG_PCI_PCIE
33 int pcie_hp_init(void);
34 #else
pcie_hp_init(void)35 static inline int pcie_hp_init(void) { return 0; }
36 #endif
37
38 #ifdef CONFIG_PCIE_PME
39 int pcie_pme_init(void);
40 #else
pcie_pme_init(void)41 static inline int pcie_pme_init(void) { return 0; }
42 #endif
43
44 #ifdef CONFIG_PCIE_DPC
45 int pcie_dpc_init(void);
46 #else
pcie_dpc_init(void)47 static inline int pcie_dpc_init(void) { return 0; }
48 #endif
49
50 /* Port Type */
51 #define PCIE_ANY_PORT (~0)
52
53 struct pcie_device {
54 int irq; /* Service IRQ/MSI/MSI-X Vector */
55 struct pci_dev *port; /* Root/Upstream/Downstream Port */
56 u32 service; /* Port service this device represents */
57 void *priv_data; /* Service Private Data */
58 struct device device; /* Generic Device Interface */
59 };
60 #define to_pcie_device(d) container_of(d, struct pcie_device, device)
61
set_service_data(struct pcie_device * dev,void * data)62 static inline void set_service_data(struct pcie_device *dev, void *data)
63 {
64 dev->priv_data = data;
65 }
66
get_service_data(struct pcie_device * dev)67 static inline void *get_service_data(struct pcie_device *dev)
68 {
69 return dev->priv_data;
70 }
71
72 struct pcie_port_service_driver {
73 const char *name;
74 int (*probe) (struct pcie_device *dev);
75 void (*remove) (struct pcie_device *dev);
76 int (*suspend) (struct pcie_device *dev);
77 int (*resume_noirq) (struct pcie_device *dev);
78 int (*resume) (struct pcie_device *dev);
79
80 /* Device driver may resume normal operations */
81 void (*error_resume)(struct pci_dev *dev);
82
83 /* Link Reset Capability - AER service driver specific */
84 pci_ers_result_t (*reset_link) (struct pci_dev *dev);
85
86 int port_type; /* Type of the port this driver can handle */
87 u32 service; /* Port service this device represents */
88
89 struct device_driver driver;
90 };
91 #define to_service_driver(d) \
92 container_of(d, struct pcie_port_service_driver, driver)
93
94 int pcie_port_service_register(struct pcie_port_service_driver *new);
95 void pcie_port_service_unregister(struct pcie_port_service_driver *new);
96
97 /*
98 * The PCIe Capability Interrupt Message Number (PCIe r3.1, sec 7.8.2) must
99 * be one of the first 32 MSI-X entries. Per PCI r3.0, sec 6.8.3.1, MSI
100 * supports a maximum of 32 vectors per function.
101 */
102 #define PCIE_PORT_MAX_MSI_ENTRIES 32
103
104 #define get_descriptor_id(type, service) (((type - 4) << 8) | service)
105
106 extern struct bus_type pcie_port_bus_type;
107 int pcie_port_device_register(struct pci_dev *dev);
108 #ifdef CONFIG_PM
109 int pcie_port_device_suspend(struct device *dev);
110 int pcie_port_device_resume_noirq(struct device *dev);
111 int pcie_port_device_resume(struct device *dev);
112 #endif
113 void pcie_port_device_remove(struct pci_dev *dev);
114 int __must_check pcie_port_bus_register(void);
115 void pcie_port_bus_unregister(void);
116
117 struct pci_dev;
118
119 #ifdef CONFIG_PCIE_PME
120 extern bool pcie_pme_msi_disabled;
121
pcie_pme_disable_msi(void)122 static inline void pcie_pme_disable_msi(void)
123 {
124 pcie_pme_msi_disabled = true;
125 }
126
pcie_pme_no_msi(void)127 static inline bool pcie_pme_no_msi(void)
128 {
129 return pcie_pme_msi_disabled;
130 }
131
132 void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable);
133 #else /* !CONFIG_PCIE_PME */
pcie_pme_disable_msi(void)134 static inline void pcie_pme_disable_msi(void) {}
pcie_pme_no_msi(void)135 static inline bool pcie_pme_no_msi(void) { return false; }
pcie_pme_interrupt_enable(struct pci_dev * dev,bool en)136 static inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {}
137 #endif /* !CONFIG_PCIE_PME */
138
139 #ifdef CONFIG_ACPI_APEI
140 int pcie_aer_get_firmware_first(struct pci_dev *pci_dev);
141 #else
pcie_aer_get_firmware_first(struct pci_dev * pci_dev)142 static inline int pcie_aer_get_firmware_first(struct pci_dev *pci_dev)
143 {
144 if (pci_dev->__aer_firmware_first_valid)
145 return pci_dev->__aer_firmware_first;
146 return 0;
147 }
148 #endif
149
150 #ifdef CONFIG_PCIEAER
151 irqreturn_t aer_irq(int irq, void *context);
152 #endif
153
154 struct pcie_port_service_driver *pcie_port_find_service(struct pci_dev *dev,
155 u32 service);
156 struct device *pcie_port_find_device(struct pci_dev *dev, u32 service);
157 #endif /* _PORTDRV_H_ */
158