1 /*
2 * An RTC driver for Allwinner A10/A20
3 *
4 * Copyright (c) 2013, Carlo Caione <carlo.caione@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19 */
20
21 #include <linux/delay.h>
22 #include <linux/err.h>
23 #include <linux/fs.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/io.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/of.h>
30 #include <linux/of_address.h>
31 #include <linux/of_device.h>
32 #include <linux/platform_device.h>
33 #include <linux/rtc.h>
34 #include <linux/types.h>
35
36 #define SUNXI_LOSC_CTRL 0x0000
37 #define SUNXI_LOSC_CTRL_RTC_HMS_ACC BIT(8)
38 #define SUNXI_LOSC_CTRL_RTC_YMD_ACC BIT(7)
39
40 #define SUNXI_RTC_YMD 0x0004
41
42 #define SUNXI_RTC_HMS 0x0008
43
44 #define SUNXI_ALRM_DHMS 0x000c
45
46 #define SUNXI_ALRM_EN 0x0014
47 #define SUNXI_ALRM_EN_CNT_EN BIT(8)
48
49 #define SUNXI_ALRM_IRQ_EN 0x0018
50 #define SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN BIT(0)
51
52 #define SUNXI_ALRM_IRQ_STA 0x001c
53 #define SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND BIT(0)
54
55 #define SUNXI_MASK_DH 0x0000001f
56 #define SUNXI_MASK_SM 0x0000003f
57 #define SUNXI_MASK_M 0x0000000f
58 #define SUNXI_MASK_LY 0x00000001
59 #define SUNXI_MASK_D 0x00000ffe
60 #define SUNXI_MASK_M 0x0000000f
61
62 #define SUNXI_GET(x, mask, shift) (((x) & ((mask) << (shift))) \
63 >> (shift))
64
65 #define SUNXI_SET(x, mask, shift) (((x) & (mask)) << (shift))
66
67 /*
68 * Get date values
69 */
70 #define SUNXI_DATE_GET_DAY_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 0)
71 #define SUNXI_DATE_GET_MON_VALUE(x) SUNXI_GET(x, SUNXI_MASK_M, 8)
72 #define SUNXI_DATE_GET_YEAR_VALUE(x, mask) SUNXI_GET(x, mask, 16)
73
74 /*
75 * Get time values
76 */
77 #define SUNXI_TIME_GET_SEC_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 0)
78 #define SUNXI_TIME_GET_MIN_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 8)
79 #define SUNXI_TIME_GET_HOUR_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 16)
80
81 /*
82 * Get alarm values
83 */
84 #define SUNXI_ALRM_GET_SEC_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 0)
85 #define SUNXI_ALRM_GET_MIN_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 8)
86 #define SUNXI_ALRM_GET_HOUR_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 16)
87
88 /*
89 * Set date values
90 */
91 #define SUNXI_DATE_SET_DAY_VALUE(x) SUNXI_DATE_GET_DAY_VALUE(x)
92 #define SUNXI_DATE_SET_MON_VALUE(x) SUNXI_SET(x, SUNXI_MASK_M, 8)
93 #define SUNXI_DATE_SET_YEAR_VALUE(x, mask) SUNXI_SET(x, mask, 16)
94 #define SUNXI_LEAP_SET_VALUE(x, shift) SUNXI_SET(x, SUNXI_MASK_LY, shift)
95
96 /*
97 * Set time values
98 */
99 #define SUNXI_TIME_SET_SEC_VALUE(x) SUNXI_TIME_GET_SEC_VALUE(x)
100 #define SUNXI_TIME_SET_MIN_VALUE(x) SUNXI_SET(x, SUNXI_MASK_SM, 8)
101 #define SUNXI_TIME_SET_HOUR_VALUE(x) SUNXI_SET(x, SUNXI_MASK_DH, 16)
102
103 /*
104 * Set alarm values
105 */
106 #define SUNXI_ALRM_SET_SEC_VALUE(x) SUNXI_ALRM_GET_SEC_VALUE(x)
107 #define SUNXI_ALRM_SET_MIN_VALUE(x) SUNXI_SET(x, SUNXI_MASK_SM, 8)
108 #define SUNXI_ALRM_SET_HOUR_VALUE(x) SUNXI_SET(x, SUNXI_MASK_DH, 16)
109 #define SUNXI_ALRM_SET_DAY_VALUE(x) SUNXI_SET(x, SUNXI_MASK_D, 21)
110
111 /*
112 * Time unit conversions
113 */
114 #define SEC_IN_MIN 60
115 #define SEC_IN_HOUR (60 * SEC_IN_MIN)
116 #define SEC_IN_DAY (24 * SEC_IN_HOUR)
117
118 /*
119 * The year parameter passed to the driver is usually an offset relative to
120 * the year 1900. This macro is used to convert this offset to another one
121 * relative to the minimum year allowed by the hardware.
122 */
123 #define SUNXI_YEAR_OFF(x) ((x)->min - 1900)
124
125 /*
126 * min and max year are arbitrary set considering the limited range of the
127 * hardware register field
128 */
129 struct sunxi_rtc_data_year {
130 unsigned int min; /* min year allowed */
131 unsigned int max; /* max year allowed */
132 unsigned int mask; /* mask for the year field */
133 unsigned char leap_shift; /* bit shift to get the leap year */
134 };
135
136 static const struct sunxi_rtc_data_year data_year_param[] = {
137 [0] = {
138 .min = 2010,
139 .max = 2073,
140 .mask = 0x3f,
141 .leap_shift = 22,
142 },
143 [1] = {
144 .min = 1970,
145 .max = 2225,
146 .mask = 0xff,
147 .leap_shift = 24,
148 },
149 };
150
151 struct sunxi_rtc_dev {
152 struct rtc_device *rtc;
153 struct device *dev;
154 const struct sunxi_rtc_data_year *data_year;
155 void __iomem *base;
156 int irq;
157 };
158
sunxi_rtc_alarmirq(int irq,void * id)159 static irqreturn_t sunxi_rtc_alarmirq(int irq, void *id)
160 {
161 struct sunxi_rtc_dev *chip = (struct sunxi_rtc_dev *) id;
162 u32 val;
163
164 val = readl(chip->base + SUNXI_ALRM_IRQ_STA);
165
166 if (val & SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND) {
167 val |= SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND;
168 writel(val, chip->base + SUNXI_ALRM_IRQ_STA);
169
170 rtc_update_irq(chip->rtc, 1, RTC_AF | RTC_IRQF);
171
172 return IRQ_HANDLED;
173 }
174
175 return IRQ_NONE;
176 }
177
sunxi_rtc_setaie(unsigned int to,struct sunxi_rtc_dev * chip)178 static void sunxi_rtc_setaie(unsigned int to, struct sunxi_rtc_dev *chip)
179 {
180 u32 alrm_val = 0;
181 u32 alrm_irq_val = 0;
182
183 if (to) {
184 alrm_val = readl(chip->base + SUNXI_ALRM_EN);
185 alrm_val |= SUNXI_ALRM_EN_CNT_EN;
186
187 alrm_irq_val = readl(chip->base + SUNXI_ALRM_IRQ_EN);
188 alrm_irq_val |= SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN;
189 } else {
190 writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND,
191 chip->base + SUNXI_ALRM_IRQ_STA);
192 }
193
194 writel(alrm_val, chip->base + SUNXI_ALRM_EN);
195 writel(alrm_irq_val, chip->base + SUNXI_ALRM_IRQ_EN);
196 }
197
sunxi_rtc_getalarm(struct device * dev,struct rtc_wkalrm * wkalrm)198 static int sunxi_rtc_getalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
199 {
200 struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
201 struct rtc_time *alrm_tm = &wkalrm->time;
202 u32 alrm;
203 u32 alrm_en;
204 u32 date;
205
206 alrm = readl(chip->base + SUNXI_ALRM_DHMS);
207 date = readl(chip->base + SUNXI_RTC_YMD);
208
209 alrm_tm->tm_sec = SUNXI_ALRM_GET_SEC_VALUE(alrm);
210 alrm_tm->tm_min = SUNXI_ALRM_GET_MIN_VALUE(alrm);
211 alrm_tm->tm_hour = SUNXI_ALRM_GET_HOUR_VALUE(alrm);
212
213 alrm_tm->tm_mday = SUNXI_DATE_GET_DAY_VALUE(date);
214 alrm_tm->tm_mon = SUNXI_DATE_GET_MON_VALUE(date);
215 alrm_tm->tm_year = SUNXI_DATE_GET_YEAR_VALUE(date,
216 chip->data_year->mask);
217
218 alrm_tm->tm_mon -= 1;
219
220 /*
221 * switch from (data_year->min)-relative offset to
222 * a (1900)-relative one
223 */
224 alrm_tm->tm_year += SUNXI_YEAR_OFF(chip->data_year);
225
226 alrm_en = readl(chip->base + SUNXI_ALRM_IRQ_EN);
227 if (alrm_en & SUNXI_ALRM_EN_CNT_EN)
228 wkalrm->enabled = 1;
229
230 return 0;
231 }
232
sunxi_rtc_gettime(struct device * dev,struct rtc_time * rtc_tm)233 static int sunxi_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
234 {
235 struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
236 u32 date, time;
237
238 /*
239 * read again in case it changes
240 */
241 do {
242 date = readl(chip->base + SUNXI_RTC_YMD);
243 time = readl(chip->base + SUNXI_RTC_HMS);
244 } while ((date != readl(chip->base + SUNXI_RTC_YMD)) ||
245 (time != readl(chip->base + SUNXI_RTC_HMS)));
246
247 rtc_tm->tm_sec = SUNXI_TIME_GET_SEC_VALUE(time);
248 rtc_tm->tm_min = SUNXI_TIME_GET_MIN_VALUE(time);
249 rtc_tm->tm_hour = SUNXI_TIME_GET_HOUR_VALUE(time);
250
251 rtc_tm->tm_mday = SUNXI_DATE_GET_DAY_VALUE(date);
252 rtc_tm->tm_mon = SUNXI_DATE_GET_MON_VALUE(date);
253 rtc_tm->tm_year = SUNXI_DATE_GET_YEAR_VALUE(date,
254 chip->data_year->mask);
255
256 rtc_tm->tm_mon -= 1;
257
258 /*
259 * switch from (data_year->min)-relative offset to
260 * a (1900)-relative one
261 */
262 rtc_tm->tm_year += SUNXI_YEAR_OFF(chip->data_year);
263
264 return 0;
265 }
266
sunxi_rtc_setalarm(struct device * dev,struct rtc_wkalrm * wkalrm)267 static int sunxi_rtc_setalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
268 {
269 struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
270 struct rtc_time *alrm_tm = &wkalrm->time;
271 struct rtc_time tm_now;
272 u32 alrm;
273 time64_t diff;
274 unsigned long time_gap;
275 unsigned long time_gap_day;
276 unsigned long time_gap_hour;
277 unsigned long time_gap_min;
278 int ret;
279
280 ret = sunxi_rtc_gettime(dev, &tm_now);
281 if (ret < 0) {
282 dev_err(dev, "Error in getting time\n");
283 return -EINVAL;
284 }
285
286 diff = rtc_tm_sub(alrm_tm, &tm_now);
287 if (diff <= 0) {
288 dev_err(dev, "Date to set in the past\n");
289 return -EINVAL;
290 }
291
292 if (diff > 255 * SEC_IN_DAY) {
293 dev_err(dev, "Day must be in the range 0 - 255\n");
294 return -EINVAL;
295 }
296
297 time_gap = diff;
298 time_gap_day = time_gap / SEC_IN_DAY;
299 time_gap -= time_gap_day * SEC_IN_DAY;
300 time_gap_hour = time_gap / SEC_IN_HOUR;
301 time_gap -= time_gap_hour * SEC_IN_HOUR;
302 time_gap_min = time_gap / SEC_IN_MIN;
303 time_gap -= time_gap_min * SEC_IN_MIN;
304
305 sunxi_rtc_setaie(0, chip);
306 writel(0, chip->base + SUNXI_ALRM_DHMS);
307 usleep_range(100, 300);
308
309 alrm = SUNXI_ALRM_SET_SEC_VALUE(time_gap) |
310 SUNXI_ALRM_SET_MIN_VALUE(time_gap_min) |
311 SUNXI_ALRM_SET_HOUR_VALUE(time_gap_hour) |
312 SUNXI_ALRM_SET_DAY_VALUE(time_gap_day);
313 writel(alrm, chip->base + SUNXI_ALRM_DHMS);
314
315 writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
316 writel(SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN, chip->base + SUNXI_ALRM_IRQ_EN);
317
318 sunxi_rtc_setaie(wkalrm->enabled, chip);
319
320 return 0;
321 }
322
sunxi_rtc_wait(struct sunxi_rtc_dev * chip,int offset,unsigned int mask,unsigned int ms_timeout)323 static int sunxi_rtc_wait(struct sunxi_rtc_dev *chip, int offset,
324 unsigned int mask, unsigned int ms_timeout)
325 {
326 const unsigned long timeout = jiffies + msecs_to_jiffies(ms_timeout);
327 u32 reg;
328
329 do {
330 reg = readl(chip->base + offset);
331 reg &= mask;
332
333 if (reg == mask)
334 return 0;
335
336 } while (time_before(jiffies, timeout));
337
338 return -ETIMEDOUT;
339 }
340
sunxi_rtc_settime(struct device * dev,struct rtc_time * rtc_tm)341 static int sunxi_rtc_settime(struct device *dev, struct rtc_time *rtc_tm)
342 {
343 struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
344 u32 date = 0;
345 u32 time = 0;
346 unsigned int year;
347
348 /*
349 * the input rtc_tm->tm_year is the offset relative to 1900. We use
350 * the SUNXI_YEAR_OFF macro to rebase it with respect to the min year
351 * allowed by the hardware
352 */
353
354 year = rtc_tm->tm_year + 1900;
355 if (year < chip->data_year->min || year > chip->data_year->max) {
356 dev_err(dev, "rtc only supports year in range %u - %u\n",
357 chip->data_year->min, chip->data_year->max);
358 return -EINVAL;
359 }
360
361 rtc_tm->tm_year -= SUNXI_YEAR_OFF(chip->data_year);
362 rtc_tm->tm_mon += 1;
363
364 date = SUNXI_DATE_SET_DAY_VALUE(rtc_tm->tm_mday) |
365 SUNXI_DATE_SET_MON_VALUE(rtc_tm->tm_mon) |
366 SUNXI_DATE_SET_YEAR_VALUE(rtc_tm->tm_year,
367 chip->data_year->mask);
368
369 if (is_leap_year(year))
370 date |= SUNXI_LEAP_SET_VALUE(1, chip->data_year->leap_shift);
371
372 time = SUNXI_TIME_SET_SEC_VALUE(rtc_tm->tm_sec) |
373 SUNXI_TIME_SET_MIN_VALUE(rtc_tm->tm_min) |
374 SUNXI_TIME_SET_HOUR_VALUE(rtc_tm->tm_hour);
375
376 writel(0, chip->base + SUNXI_RTC_HMS);
377 writel(0, chip->base + SUNXI_RTC_YMD);
378
379 writel(time, chip->base + SUNXI_RTC_HMS);
380
381 /*
382 * After writing the RTC HH-MM-SS register, the
383 * SUNXI_LOSC_CTRL_RTC_HMS_ACC bit is set and it will not
384 * be cleared until the real writing operation is finished
385 */
386
387 if (sunxi_rtc_wait(chip, SUNXI_LOSC_CTRL,
388 SUNXI_LOSC_CTRL_RTC_HMS_ACC, 50)) {
389 dev_err(dev, "Failed to set rtc time.\n");
390 return -1;
391 }
392
393 writel(date, chip->base + SUNXI_RTC_YMD);
394
395 /*
396 * After writing the RTC YY-MM-DD register, the
397 * SUNXI_LOSC_CTRL_RTC_YMD_ACC bit is set and it will not
398 * be cleared until the real writing operation is finished
399 */
400
401 if (sunxi_rtc_wait(chip, SUNXI_LOSC_CTRL,
402 SUNXI_LOSC_CTRL_RTC_YMD_ACC, 50)) {
403 dev_err(dev, "Failed to set rtc time.\n");
404 return -1;
405 }
406
407 return 0;
408 }
409
sunxi_rtc_alarm_irq_enable(struct device * dev,unsigned int enabled)410 static int sunxi_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
411 {
412 struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
413
414 if (!enabled)
415 sunxi_rtc_setaie(enabled, chip);
416
417 return 0;
418 }
419
420 static const struct rtc_class_ops sunxi_rtc_ops = {
421 .read_time = sunxi_rtc_gettime,
422 .set_time = sunxi_rtc_settime,
423 .read_alarm = sunxi_rtc_getalarm,
424 .set_alarm = sunxi_rtc_setalarm,
425 .alarm_irq_enable = sunxi_rtc_alarm_irq_enable
426 };
427
428 static const struct of_device_id sunxi_rtc_dt_ids[] = {
429 { .compatible = "allwinner,sun4i-a10-rtc", .data = &data_year_param[0] },
430 { .compatible = "allwinner,sun7i-a20-rtc", .data = &data_year_param[1] },
431 { /* sentinel */ },
432 };
433 MODULE_DEVICE_TABLE(of, sunxi_rtc_dt_ids);
434
sunxi_rtc_probe(struct platform_device * pdev)435 static int sunxi_rtc_probe(struct platform_device *pdev)
436 {
437 struct sunxi_rtc_dev *chip;
438 struct resource *res;
439 int ret;
440
441 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
442 if (!chip)
443 return -ENOMEM;
444
445 platform_set_drvdata(pdev, chip);
446 chip->dev = &pdev->dev;
447
448 chip->rtc = devm_rtc_allocate_device(&pdev->dev);
449 if (IS_ERR(chip->rtc))
450 return PTR_ERR(chip->rtc);
451
452 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
453 chip->base = devm_ioremap_resource(&pdev->dev, res);
454 if (IS_ERR(chip->base))
455 return PTR_ERR(chip->base);
456
457 chip->irq = platform_get_irq(pdev, 0);
458 if (chip->irq < 0) {
459 dev_err(&pdev->dev, "No IRQ resource\n");
460 return chip->irq;
461 }
462 ret = devm_request_irq(&pdev->dev, chip->irq, sunxi_rtc_alarmirq,
463 0, dev_name(&pdev->dev), chip);
464 if (ret) {
465 dev_err(&pdev->dev, "Could not request IRQ\n");
466 return ret;
467 }
468
469 chip->data_year = of_device_get_match_data(&pdev->dev);
470 if (!chip->data_year) {
471 dev_err(&pdev->dev, "Unable to setup RTC data\n");
472 return -ENODEV;
473 }
474
475 /* clear the alarm count value */
476 writel(0, chip->base + SUNXI_ALRM_DHMS);
477
478 /* disable alarm, not generate irq pending */
479 writel(0, chip->base + SUNXI_ALRM_EN);
480
481 /* disable alarm week/cnt irq, unset to cpu */
482 writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
483
484 /* clear alarm week/cnt irq pending */
485 writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND, chip->base +
486 SUNXI_ALRM_IRQ_STA);
487
488 chip->rtc->ops = &sunxi_rtc_ops;
489
490 ret = rtc_register_device(chip->rtc);
491 if (ret) {
492 dev_err(&pdev->dev, "unable to register device\n");
493 return ret;
494 }
495
496 dev_info(&pdev->dev, "RTC enabled\n");
497
498 return 0;
499 }
500
501 static struct platform_driver sunxi_rtc_driver = {
502 .probe = sunxi_rtc_probe,
503 .driver = {
504 .name = "sunxi-rtc",
505 .of_match_table = sunxi_rtc_dt_ids,
506 },
507 };
508
509 module_platform_driver(sunxi_rtc_driver);
510
511 MODULE_DESCRIPTION("sunxi RTC driver");
512 MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
513 MODULE_LICENSE("GPL");
514