1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * HD-audio codec verbs
4  */
5 
6 #ifndef __SOUND_HDA_VERBS_H
7 #define __SOUND_HDA_VERBS_H
8 
9 /*
10  * nodes
11  */
12 #define	AC_NODE_ROOT		0x00
13 
14 /*
15  * function group types
16  */
17 enum {
18 	AC_GRP_AUDIO_FUNCTION = 0x01,
19 	AC_GRP_MODEM_FUNCTION = 0x02,
20 };
21 
22 /*
23  * widget types
24  */
25 enum {
26 	AC_WID_AUD_OUT,		/* Audio Out */
27 	AC_WID_AUD_IN,		/* Audio In */
28 	AC_WID_AUD_MIX,		/* Audio Mixer */
29 	AC_WID_AUD_SEL,		/* Audio Selector */
30 	AC_WID_PIN,		/* Pin Complex */
31 	AC_WID_POWER,		/* Power */
32 	AC_WID_VOL_KNB,		/* Volume Knob */
33 	AC_WID_BEEP,		/* Beep Generator */
34 	AC_WID_VENDOR = 0x0f	/* Vendor specific */
35 };
36 
37 /*
38  * GET verbs
39  */
40 #define AC_VERB_GET_STREAM_FORMAT		0x0a00
41 #define AC_VERB_GET_AMP_GAIN_MUTE		0x0b00
42 #define AC_VERB_GET_PROC_COEF			0x0c00
43 #define AC_VERB_GET_COEF_INDEX			0x0d00
44 #define AC_VERB_PARAMETERS			0x0f00
45 #define AC_VERB_GET_CONNECT_SEL			0x0f01
46 #define AC_VERB_GET_CONNECT_LIST		0x0f02
47 #define AC_VERB_GET_PROC_STATE			0x0f03
48 #define AC_VERB_GET_SDI_SELECT			0x0f04
49 #define AC_VERB_GET_POWER_STATE			0x0f05
50 #define AC_VERB_GET_CONV			0x0f06
51 #define AC_VERB_GET_PIN_WIDGET_CONTROL		0x0f07
52 #define AC_VERB_GET_UNSOLICITED_RESPONSE	0x0f08
53 #define AC_VERB_GET_PIN_SENSE			0x0f09
54 #define AC_VERB_GET_BEEP_CONTROL		0x0f0a
55 #define AC_VERB_GET_EAPD_BTLENABLE		0x0f0c
56 #define AC_VERB_GET_DIGI_CONVERT_1		0x0f0d
57 #define AC_VERB_GET_DIGI_CONVERT_2		0x0f0e /* unused */
58 #define AC_VERB_GET_VOLUME_KNOB_CONTROL		0x0f0f
59 /* f10-f1a: GPIO */
60 #define AC_VERB_GET_GPIO_DATA			0x0f15
61 #define AC_VERB_GET_GPIO_MASK			0x0f16
62 #define AC_VERB_GET_GPIO_DIRECTION		0x0f17
63 #define AC_VERB_GET_GPIO_WAKE_MASK		0x0f18
64 #define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK	0x0f19
65 #define AC_VERB_GET_GPIO_STICKY_MASK		0x0f1a
66 #define AC_VERB_GET_CONFIG_DEFAULT		0x0f1c
67 /* f20: AFG/MFG */
68 #define AC_VERB_GET_SUBSYSTEM_ID		0x0f20
69 #define AC_VERB_GET_CVT_CHAN_COUNT		0x0f2d
70 #define AC_VERB_GET_HDMI_DIP_SIZE		0x0f2e
71 #define AC_VERB_GET_HDMI_ELDD			0x0f2f
72 #define AC_VERB_GET_HDMI_DIP_INDEX		0x0f30
73 #define AC_VERB_GET_HDMI_DIP_DATA		0x0f31
74 #define AC_VERB_GET_HDMI_DIP_XMIT		0x0f32
75 #define AC_VERB_GET_HDMI_CP_CTRL		0x0f33
76 #define AC_VERB_GET_HDMI_CHAN_SLOT		0x0f34
77 #define AC_VERB_GET_DEVICE_SEL			0xf35
78 #define AC_VERB_GET_DEVICE_LIST			0xf36
79 
80 /*
81  * SET verbs
82  */
83 #define AC_VERB_SET_STREAM_FORMAT		0x200
84 #define AC_VERB_SET_AMP_GAIN_MUTE		0x300
85 #define AC_VERB_SET_PROC_COEF			0x400
86 #define AC_VERB_SET_COEF_INDEX			0x500
87 #define AC_VERB_SET_CONNECT_SEL			0x701
88 #define AC_VERB_SET_PROC_STATE			0x703
89 #define AC_VERB_SET_SDI_SELECT			0x704
90 #define AC_VERB_SET_POWER_STATE			0x705
91 #define AC_VERB_SET_CHANNEL_STREAMID		0x706
92 #define AC_VERB_SET_PIN_WIDGET_CONTROL		0x707
93 #define AC_VERB_SET_UNSOLICITED_ENABLE		0x708
94 #define AC_VERB_SET_PIN_SENSE			0x709
95 #define AC_VERB_SET_BEEP_CONTROL		0x70a
96 #define AC_VERB_SET_EAPD_BTLENABLE		0x70c
97 #define AC_VERB_SET_DIGI_CONVERT_1		0x70d
98 #define AC_VERB_SET_DIGI_CONVERT_2		0x70e
99 #define AC_VERB_SET_DIGI_CONVERT_3		0x73e
100 #define AC_VERB_SET_VOLUME_KNOB_CONTROL		0x70f
101 #define AC_VERB_SET_GPIO_DATA			0x715
102 #define AC_VERB_SET_GPIO_MASK			0x716
103 #define AC_VERB_SET_GPIO_DIRECTION		0x717
104 #define AC_VERB_SET_GPIO_WAKE_MASK		0x718
105 #define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK	0x719
106 #define AC_VERB_SET_GPIO_STICKY_MASK		0x71a
107 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0	0x71c
108 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1	0x71d
109 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2	0x71e
110 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3	0x71f
111 #define AC_VERB_SET_EAPD				0x788
112 #define AC_VERB_SET_CODEC_RESET			0x7ff
113 #define AC_VERB_SET_CVT_CHAN_COUNT		0x72d
114 #define AC_VERB_SET_HDMI_DIP_INDEX		0x730
115 #define AC_VERB_SET_HDMI_DIP_DATA		0x731
116 #define AC_VERB_SET_HDMI_DIP_XMIT		0x732
117 #define AC_VERB_SET_HDMI_CP_CTRL		0x733
118 #define AC_VERB_SET_HDMI_CHAN_SLOT		0x734
119 #define AC_VERB_SET_DEVICE_SEL			0x735
120 
121 /*
122  * Parameter IDs
123  */
124 #define AC_PAR_VENDOR_ID		0x00
125 #define AC_PAR_SUBSYSTEM_ID		0x01
126 #define AC_PAR_REV_ID			0x02
127 #define AC_PAR_NODE_COUNT		0x04
128 #define AC_PAR_FUNCTION_TYPE		0x05
129 #define AC_PAR_AUDIO_FG_CAP		0x08
130 #define AC_PAR_AUDIO_WIDGET_CAP		0x09
131 #define AC_PAR_PCM			0x0a
132 #define AC_PAR_STREAM			0x0b
133 #define AC_PAR_PIN_CAP			0x0c
134 #define AC_PAR_AMP_IN_CAP		0x0d
135 #define AC_PAR_CONNLIST_LEN		0x0e
136 #define AC_PAR_POWER_STATE		0x0f
137 #define AC_PAR_PROC_CAP			0x10
138 #define AC_PAR_GPIO_CAP			0x11
139 #define AC_PAR_AMP_OUT_CAP		0x12
140 #define AC_PAR_VOL_KNB_CAP		0x13
141 #define AC_PAR_DEVLIST_LEN		0x15
142 #define AC_PAR_HDMI_LPCM_CAP		0x20
143 
144 /*
145  * AC_VERB_PARAMETERS results (32bit)
146  */
147 
148 /* Function Group Type */
149 #define AC_FGT_TYPE			(0xff<<0)
150 #define AC_FGT_TYPE_SHIFT		0
151 #define AC_FGT_UNSOL_CAP		(1<<8)
152 
153 /* Audio Function Group Capabilities */
154 #define AC_AFG_OUT_DELAY		(0xf<<0)
155 #define AC_AFG_IN_DELAY			(0xf<<8)
156 #define AC_AFG_BEEP_GEN			(1<<16)
157 
158 /* Audio Widget Capabilities */
159 #define AC_WCAP_STEREO			(1<<0)	/* stereo I/O */
160 #define AC_WCAP_IN_AMP			(1<<1)	/* AMP-in present */
161 #define AC_WCAP_OUT_AMP			(1<<2)	/* AMP-out present */
162 #define AC_WCAP_AMP_OVRD		(1<<3)	/* AMP-parameter override */
163 #define AC_WCAP_FORMAT_OVRD		(1<<4)	/* format override */
164 #define AC_WCAP_STRIPE			(1<<5)	/* stripe */
165 #define AC_WCAP_PROC_WID		(1<<6)	/* Proc Widget */
166 #define AC_WCAP_UNSOL_CAP		(1<<7)	/* Unsol capable */
167 #define AC_WCAP_CONN_LIST		(1<<8)	/* connection list */
168 #define AC_WCAP_DIGITAL			(1<<9)	/* digital I/O */
169 #define AC_WCAP_POWER			(1<<10)	/* power control */
170 #define AC_WCAP_LR_SWAP			(1<<11)	/* L/R swap */
171 #define AC_WCAP_CP_CAPS			(1<<12) /* content protection */
172 #define AC_WCAP_CHAN_CNT_EXT		(7<<13)	/* channel count ext */
173 #define AC_WCAP_DELAY			(0xf<<16)
174 #define AC_WCAP_DELAY_SHIFT		16
175 #define AC_WCAP_TYPE			(0xf<<20)
176 #define AC_WCAP_TYPE_SHIFT		20
177 
178 /* supported PCM rates and bits */
179 #define AC_SUPPCM_RATES			(0xfff << 0)
180 #define AC_SUPPCM_BITS_8		(1<<16)
181 #define AC_SUPPCM_BITS_16		(1<<17)
182 #define AC_SUPPCM_BITS_20		(1<<18)
183 #define AC_SUPPCM_BITS_24		(1<<19)
184 #define AC_SUPPCM_BITS_32		(1<<20)
185 
186 /* supported PCM stream format */
187 #define AC_SUPFMT_PCM			(1<<0)
188 #define AC_SUPFMT_FLOAT32		(1<<1)
189 #define AC_SUPFMT_AC3			(1<<2)
190 
191 /* GP I/O count */
192 #define AC_GPIO_IO_COUNT		(0xff<<0)
193 #define AC_GPIO_O_COUNT			(0xff<<8)
194 #define AC_GPIO_O_COUNT_SHIFT		8
195 #define AC_GPIO_I_COUNT			(0xff<<16)
196 #define AC_GPIO_I_COUNT_SHIFT		16
197 #define AC_GPIO_UNSOLICITED		(1<<30)
198 #define AC_GPIO_WAKE			(1<<31)
199 
200 /* Converter stream, channel */
201 #define AC_CONV_CHANNEL			(0xf<<0)
202 #define AC_CONV_STREAM			(0xf<<4)
203 #define AC_CONV_STREAM_SHIFT		4
204 
205 /* Input converter SDI select */
206 #define AC_SDI_SELECT			(0xf<<0)
207 
208 /* stream format id */
209 #define AC_FMT_CHAN_SHIFT		0
210 #define AC_FMT_CHAN_MASK		(0x0f << 0)
211 #define AC_FMT_BITS_SHIFT		4
212 #define AC_FMT_BITS_MASK		(7 << 4)
213 #define AC_FMT_BITS_8			(0 << 4)
214 #define AC_FMT_BITS_16			(1 << 4)
215 #define AC_FMT_BITS_20			(2 << 4)
216 #define AC_FMT_BITS_24			(3 << 4)
217 #define AC_FMT_BITS_32			(4 << 4)
218 #define AC_FMT_DIV_SHIFT		8
219 #define AC_FMT_DIV_MASK			(7 << 8)
220 #define AC_FMT_MULT_SHIFT		11
221 #define AC_FMT_MULT_MASK		(7 << 11)
222 #define AC_FMT_BASE_SHIFT		14
223 #define AC_FMT_BASE_48K			(0 << 14)
224 #define AC_FMT_BASE_44K			(1 << 14)
225 #define AC_FMT_TYPE_SHIFT		15
226 #define AC_FMT_TYPE_PCM			(0 << 15)
227 #define AC_FMT_TYPE_NON_PCM		(1 << 15)
228 
229 /* Unsolicited response control */
230 #define AC_UNSOL_TAG			(0x3f<<0)
231 #define AC_UNSOL_ENABLED		(1<<7)
232 #define AC_USRSP_EN			AC_UNSOL_ENABLED
233 
234 /* Unsolicited responses */
235 #define AC_UNSOL_RES_TAG		(0x3f<<26)
236 #define AC_UNSOL_RES_TAG_SHIFT		26
237 #define AC_UNSOL_RES_SUBTAG		(0x1f<<21)
238 #define AC_UNSOL_RES_SUBTAG_SHIFT	21
239 #define AC_UNSOL_RES_DE			(0x3f<<15)  /* Device Entry
240 						     * (for DP1.2 MST)
241 						     */
242 #define AC_UNSOL_RES_DE_SHIFT		15
243 #define AC_UNSOL_RES_IA			(1<<2)	/* Inactive (for DP1.2 MST) */
244 #define AC_UNSOL_RES_ELDV		(1<<1)	/* ELD Data valid (for HDMI) */
245 #define AC_UNSOL_RES_PD			(1<<0)	/* pinsense detect */
246 #define AC_UNSOL_RES_CP_STATE		(1<<1)	/* content protection */
247 #define AC_UNSOL_RES_CP_READY		(1<<0)	/* content protection */
248 
249 /* Pin widget capabilies */
250 #define AC_PINCAP_IMP_SENSE		(1<<0)	/* impedance sense capable */
251 #define AC_PINCAP_TRIG_REQ		(1<<1)	/* trigger required */
252 #define AC_PINCAP_PRES_DETECT		(1<<2)	/* presence detect capable */
253 #define AC_PINCAP_HP_DRV		(1<<3)	/* headphone drive capable */
254 #define AC_PINCAP_OUT			(1<<4)	/* output capable */
255 #define AC_PINCAP_IN			(1<<5)	/* input capable */
256 #define AC_PINCAP_BALANCE		(1<<6)	/* balanced I/O capable */
257 /* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
258  *       but is marked reserved in the Intel HDA specification.
259  */
260 #define AC_PINCAP_LR_SWAP		(1<<7)	/* L/R swap */
261 /* Note: The same bit as LR_SWAP is newly defined as HDMI capability
262  *       in HD-audio specification
263  */
264 #define AC_PINCAP_HDMI			(1<<7)	/* HDMI pin */
265 #define AC_PINCAP_DP			(1<<24)	/* DisplayPort pin, can
266 						 * coexist with AC_PINCAP_HDMI
267 						 */
268 #define AC_PINCAP_VREF			(0x37<<8)
269 #define AC_PINCAP_VREF_SHIFT		8
270 #define AC_PINCAP_EAPD			(1<<16)	/* EAPD capable */
271 #define AC_PINCAP_HBR			(1<<27)	/* High Bit Rate */
272 /* Vref status (used in pin cap) */
273 #define AC_PINCAP_VREF_HIZ		(1<<0)	/* Hi-Z */
274 #define AC_PINCAP_VREF_50		(1<<1)	/* 50% */
275 #define AC_PINCAP_VREF_GRD		(1<<2)	/* ground */
276 #define AC_PINCAP_VREF_80		(1<<4)	/* 80% */
277 #define AC_PINCAP_VREF_100		(1<<5)	/* 100% */
278 
279 /* Amplifier capabilities */
280 #define AC_AMPCAP_OFFSET		(0x7f<<0)  /* 0dB offset */
281 #define AC_AMPCAP_OFFSET_SHIFT		0
282 #define AC_AMPCAP_NUM_STEPS		(0x7f<<8)  /* number of steps */
283 #define AC_AMPCAP_NUM_STEPS_SHIFT	8
284 #define AC_AMPCAP_STEP_SIZE		(0x7f<<16) /* step size 0-32dB
285 						    * in 0.25dB
286 						    */
287 #define AC_AMPCAP_STEP_SIZE_SHIFT	16
288 #define AC_AMPCAP_MUTE			(1<<31)    /* mute capable */
289 #define AC_AMPCAP_MUTE_SHIFT		31
290 
291 /* driver-specific amp-caps: using bits 24-30 */
292 #define AC_AMPCAP_MIN_MUTE		(1 << 30) /* min-volume = mute */
293 
294 /* Connection list */
295 #define AC_CLIST_LENGTH			(0x7f<<0)
296 #define AC_CLIST_LONG			(1<<7)
297 
298 /* Supported power status */
299 #define AC_PWRST_D0SUP			(1<<0)
300 #define AC_PWRST_D1SUP			(1<<1)
301 #define AC_PWRST_D2SUP			(1<<2)
302 #define AC_PWRST_D3SUP			(1<<3)
303 #define AC_PWRST_D3COLDSUP		(1<<4)
304 #define AC_PWRST_S3D3COLDSUP		(1<<29)
305 #define AC_PWRST_CLKSTOP		(1<<30)
306 #define AC_PWRST_EPSS			(1U<<31)
307 
308 /* Power state values */
309 #define AC_PWRST_SETTING		(0xf<<0)
310 #define AC_PWRST_ACTUAL			(0xf<<4)
311 #define AC_PWRST_ACTUAL_SHIFT		4
312 #define AC_PWRST_D0			0x00
313 #define AC_PWRST_D1			0x01
314 #define AC_PWRST_D2			0x02
315 #define AC_PWRST_D3			0x03
316 #define AC_PWRST_ERROR                  (1<<8)
317 #define AC_PWRST_CLK_STOP_OK            (1<<9)
318 #define AC_PWRST_SETTING_RESET          (1<<10)
319 
320 /* Processing capabilies */
321 #define AC_PCAP_BENIGN			(1<<0)
322 #define AC_PCAP_NUM_COEF		(0xff<<8)
323 #define AC_PCAP_NUM_COEF_SHIFT		8
324 
325 /* Volume knobs capabilities */
326 #define AC_KNBCAP_NUM_STEPS		(0x7f<<0)
327 #define AC_KNBCAP_DELTA			(1<<7)
328 
329 /* HDMI LPCM capabilities */
330 #define AC_LPCMCAP_48K_CP_CHNS		(0x0f<<0) /* max channels w/ CP-on */
331 #define AC_LPCMCAP_48K_NO_CHNS		(0x0f<<4) /* max channels w/o CP-on */
332 #define AC_LPCMCAP_48K_20BIT		(1<<8)	/* 20b bitrate supported */
333 #define AC_LPCMCAP_48K_24BIT		(1<<9)	/* 24b bitrate supported */
334 #define AC_LPCMCAP_96K_CP_CHNS		(0x0f<<10) /* max channels w/ CP-on */
335 #define AC_LPCMCAP_96K_NO_CHNS		(0x0f<<14) /* max channels w/o CP-on */
336 #define AC_LPCMCAP_96K_20BIT		(1<<18)	/* 20b bitrate supported */
337 #define AC_LPCMCAP_96K_24BIT		(1<<19)	/* 24b bitrate supported */
338 #define AC_LPCMCAP_192K_CP_CHNS		(0x0f<<20) /* max channels w/ CP-on */
339 #define AC_LPCMCAP_192K_NO_CHNS		(0x0f<<24) /* max channels w/o CP-on */
340 #define AC_LPCMCAP_192K_20BIT		(1<<28)	/* 20b bitrate supported */
341 #define AC_LPCMCAP_192K_24BIT		(1<<29)	/* 24b bitrate supported */
342 #define AC_LPCMCAP_44K			(1<<30)	/* 44.1kHz support */
343 #define AC_LPCMCAP_44K_MS		(1<<31)	/* 44.1kHz-multiplies support */
344 
345 /* Display pin's device list length */
346 #define AC_DEV_LIST_LEN_MASK		0x3f
347 #define AC_MAX_DEV_LIST_LEN		64
348 
349 /*
350  * Control Parameters
351  */
352 
353 /* Amp gain/mute */
354 #define AC_AMP_MUTE			(1<<7)
355 #define AC_AMP_GAIN			(0x7f)
356 #define AC_AMP_GET_INDEX		(0xf<<0)
357 
358 #define AC_AMP_GET_LEFT			(1<<13)
359 #define AC_AMP_GET_RIGHT		(0<<13)
360 #define AC_AMP_GET_OUTPUT		(1<<15)
361 #define AC_AMP_GET_INPUT		(0<<15)
362 
363 #define AC_AMP_SET_INDEX		(0xf<<8)
364 #define AC_AMP_SET_INDEX_SHIFT		8
365 #define AC_AMP_SET_RIGHT		(1<<12)
366 #define AC_AMP_SET_LEFT			(1<<13)
367 #define AC_AMP_SET_INPUT		(1<<14)
368 #define AC_AMP_SET_OUTPUT		(1<<15)
369 
370 /* DIGITAL1 bits */
371 #define AC_DIG1_ENABLE			(1<<0)
372 #define AC_DIG1_V			(1<<1)
373 #define AC_DIG1_VCFG			(1<<2)
374 #define AC_DIG1_EMPHASIS		(1<<3)
375 #define AC_DIG1_COPYRIGHT		(1<<4)
376 #define AC_DIG1_NONAUDIO		(1<<5)
377 #define AC_DIG1_PROFESSIONAL		(1<<6)
378 #define AC_DIG1_LEVEL			(1<<7)
379 
380 /* DIGITAL2 bits */
381 #define AC_DIG2_CC			(0x7f<<0)
382 
383 /* DIGITAL3 bits */
384 #define AC_DIG3_ICT			(0xf<<0)
385 #define AC_DIG3_KAE			(1<<7)
386 
387 /* Pin widget control - 8bit */
388 #define AC_PINCTL_EPT			(0x3<<0)
389 #define AC_PINCTL_EPT_NATIVE		0
390 #define AC_PINCTL_EPT_HBR		3
391 #define AC_PINCTL_VREFEN		(0x7<<0)
392 #define AC_PINCTL_VREF_HIZ		0	/* Hi-Z */
393 #define AC_PINCTL_VREF_50		1	/* 50% */
394 #define AC_PINCTL_VREF_GRD		2	/* ground */
395 #define AC_PINCTL_VREF_80		4	/* 80% */
396 #define AC_PINCTL_VREF_100		5	/* 100% */
397 #define AC_PINCTL_IN_EN			(1<<5)
398 #define AC_PINCTL_OUT_EN		(1<<6)
399 #define AC_PINCTL_HP_EN			(1<<7)
400 
401 /* Pin sense - 32bit */
402 #define AC_PINSENSE_IMPEDANCE_MASK	(0x7fffffff)
403 #define AC_PINSENSE_PRESENCE		(1<<31)
404 #define AC_PINSENSE_ELDV		(1<<30)	/* ELD valid (HDMI) */
405 
406 /* EAPD/BTL enable - 32bit */
407 #define AC_EAPDBTL_BALANCED		(1<<0)
408 #define AC_EAPDBTL_EAPD			(1<<1)
409 #define AC_EAPDBTL_LR_SWAP		(1<<2)
410 
411 /* HDMI ELD data */
412 #define AC_ELDD_ELD_VALID		(1<<31)
413 #define AC_ELDD_ELD_DATA		0xff
414 
415 /* HDMI DIP size */
416 #define AC_DIPSIZE_ELD_BUF		(1<<3) /* ELD buf size of packet size */
417 #define AC_DIPSIZE_PACK_IDX		(0x07<<0) /* packet index */
418 
419 /* HDMI DIP index */
420 #define AC_DIPIDX_PACK_IDX		(0x07<<5) /* packet idnex */
421 #define AC_DIPIDX_BYTE_IDX		(0x1f<<0) /* byte index */
422 
423 /* HDMI DIP xmit (transmit) control */
424 #define AC_DIPXMIT_MASK			(0x3<<6)
425 #define AC_DIPXMIT_DISABLE		(0x0<<6) /* disable xmit */
426 #define AC_DIPXMIT_ONCE			(0x2<<6) /* xmit once then disable */
427 #define AC_DIPXMIT_BEST			(0x3<<6) /* best effort */
428 
429 /* HDMI content protection (CP) control */
430 #define AC_CPCTRL_CES			(1<<9) /* current encryption state */
431 #define AC_CPCTRL_READY			(1<<8) /* ready bit */
432 #define AC_CPCTRL_SUBTAG		(0x1f<<3) /* subtag for unsol-resp */
433 #define AC_CPCTRL_STATE			(3<<0) /* current CP request state */
434 
435 /* Converter channel <-> HDMI slot mapping */
436 #define AC_CVTMAP_HDMI_SLOT		(0xf<<0) /* HDMI slot number */
437 #define AC_CVTMAP_CHAN			(0xf<<4) /* converter channel number */
438 
439 /* configuration default - 32bit */
440 #define AC_DEFCFG_SEQUENCE		(0xf<<0)
441 #define AC_DEFCFG_DEF_ASSOC		(0xf<<4)
442 #define AC_DEFCFG_ASSOC_SHIFT		4
443 #define AC_DEFCFG_MISC			(0xf<<8)
444 #define AC_DEFCFG_MISC_SHIFT		8
445 #define AC_DEFCFG_MISC_NO_PRESENCE	(1<<0)
446 #define AC_DEFCFG_COLOR			(0xf<<12)
447 #define AC_DEFCFG_COLOR_SHIFT		12
448 #define AC_DEFCFG_CONN_TYPE		(0xf<<16)
449 #define AC_DEFCFG_CONN_TYPE_SHIFT	16
450 #define AC_DEFCFG_DEVICE		(0xf<<20)
451 #define AC_DEFCFG_DEVICE_SHIFT		20
452 #define AC_DEFCFG_LOCATION		(0x3f<<24)
453 #define AC_DEFCFG_LOCATION_SHIFT	24
454 #define AC_DEFCFG_PORT_CONN		(0x3<<30)
455 #define AC_DEFCFG_PORT_CONN_SHIFT	30
456 
457 /* Display pin's device list entry */
458 #define AC_DE_PD			(1<<0)
459 #define AC_DE_ELDV			(1<<1)
460 #define AC_DE_IA			(1<<2)
461 
462 /* device device types (0x0-0xf) */
463 enum {
464 	AC_JACK_LINE_OUT,
465 	AC_JACK_SPEAKER,
466 	AC_JACK_HP_OUT,
467 	AC_JACK_CD,
468 	AC_JACK_SPDIF_OUT,
469 	AC_JACK_DIG_OTHER_OUT,
470 	AC_JACK_MODEM_LINE_SIDE,
471 	AC_JACK_MODEM_HAND_SIDE,
472 	AC_JACK_LINE_IN,
473 	AC_JACK_AUX,
474 	AC_JACK_MIC_IN,
475 	AC_JACK_TELEPHONY,
476 	AC_JACK_SPDIF_IN,
477 	AC_JACK_DIG_OTHER_IN,
478 	AC_JACK_OTHER = 0xf,
479 };
480 
481 /* jack connection types (0x0-0xf) */
482 enum {
483 	AC_JACK_CONN_UNKNOWN,
484 	AC_JACK_CONN_1_8,
485 	AC_JACK_CONN_1_4,
486 	AC_JACK_CONN_ATAPI,
487 	AC_JACK_CONN_RCA,
488 	AC_JACK_CONN_OPTICAL,
489 	AC_JACK_CONN_OTHER_DIGITAL,
490 	AC_JACK_CONN_OTHER_ANALOG,
491 	AC_JACK_CONN_DIN,
492 	AC_JACK_CONN_XLR,
493 	AC_JACK_CONN_RJ11,
494 	AC_JACK_CONN_COMB,
495 	AC_JACK_CONN_OTHER = 0xf,
496 };
497 
498 /* jack colors (0x0-0xf) */
499 enum {
500 	AC_JACK_COLOR_UNKNOWN,
501 	AC_JACK_COLOR_BLACK,
502 	AC_JACK_COLOR_GREY,
503 	AC_JACK_COLOR_BLUE,
504 	AC_JACK_COLOR_GREEN,
505 	AC_JACK_COLOR_RED,
506 	AC_JACK_COLOR_ORANGE,
507 	AC_JACK_COLOR_YELLOW,
508 	AC_JACK_COLOR_PURPLE,
509 	AC_JACK_COLOR_PINK,
510 	AC_JACK_COLOR_WHITE = 0xe,
511 	AC_JACK_COLOR_OTHER,
512 };
513 
514 /* Jack location (0x0-0x3f) */
515 /* common case */
516 enum {
517 	AC_JACK_LOC_NONE,
518 	AC_JACK_LOC_REAR,
519 	AC_JACK_LOC_FRONT,
520 	AC_JACK_LOC_LEFT,
521 	AC_JACK_LOC_RIGHT,
522 	AC_JACK_LOC_TOP,
523 	AC_JACK_LOC_BOTTOM,
524 };
525 /* bits 4-5 */
526 enum {
527 	AC_JACK_LOC_EXTERNAL = 0x00,
528 	AC_JACK_LOC_INTERNAL = 0x10,
529 	AC_JACK_LOC_SEPARATE = 0x20,
530 	AC_JACK_LOC_OTHER    = 0x30,
531 };
532 enum {
533 	/* external on primary chasis */
534 	AC_JACK_LOC_REAR_PANEL = 0x07,
535 	AC_JACK_LOC_DRIVE_BAY,
536 	/* internal */
537 	AC_JACK_LOC_RISER = 0x17,
538 	AC_JACK_LOC_HDMI,
539 	AC_JACK_LOC_ATAPI,
540 	/* others */
541 	AC_JACK_LOC_MOBILE_IN = 0x37,
542 	AC_JACK_LOC_MOBILE_OUT,
543 };
544 
545 /* Port connectivity (0-3) */
546 enum {
547 	AC_JACK_PORT_COMPLEX,
548 	AC_JACK_PORT_NONE,
549 	AC_JACK_PORT_FIXED,
550 	AC_JACK_PORT_BOTH,
551 };
552 
553 /* max. codec address */
554 #define HDA_MAX_CODEC_ADDRESS	0x0f
555 
556 #endif /* __SOUND_HDA_VERBS_H */
557