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Searched refs:BIT0 (Results 1 – 3 of 3) sorted by relevance

/linux-4.19.296/include/uapi/linux/
Dsynclink.h19 #define BIT0 0x0001 macro
/linux-4.19.296/lib/zstd/
Dzstd_internal.h79 #define BIT0 1 macro
/linux-4.19.296/drivers/char/pcmcia/
Dsynclink_cs.c303 #define IRQ_RXFIFO BIT0 // receive pool full
311 #define PVR_DTR BIT0
684 #define CMD_TXRESET BIT0 // transmit reset
1185 if (gis & (BIT1 | BIT0)) { in mgslpc_isr()
2998 val = read_reg(info, CHA + CCR1) | (BIT2 | BIT1 | BIT0); in loopback_enable()
3012 val = read_reg(info, CHA + MODE) | BIT0; in loopback_enable()
3065 val |= BIT0; in hdlc_mode()
3135 val |= BIT0; in hdlc_mode()
3411 val |= BIT0; in async_mode()
3489 val |= BIT0; /* 7 bits */ in async_mode()