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Searched refs:CLK_BDP_RLE_DRAM (Results 1 – 2 of 2) sorted by relevance

/linux-4.19.296/drivers/clk/mediatek/
Dclk-mt2701-bdp.c70 GATE_BDP0(CLK_BDP_RLE_DRAM, "rle_dram", "mm_sel", 16),
/linux-4.19.296/include/dt-bindings/clock/
Dmt2701-clk.h456 #define CLK_BDP_RLE_DRAM 17 macro