| /linux-4.19.296/drivers/clk/zynq/ |
| D | clkc.c | 150 0, fclk_ctrl_reg, 8, 6, CLK_DIVIDER_ONE_BASED | in zynq_clk_register_fclk()
155 CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, in zynq_clk_register_fclk()
207 CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, lock); in zynq_clk_register_periph_clk()
295 SLCR_ARM_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED | in zynq_clk_setup()
339 SLCR_DDR_CLK_CTRL, 26, 6, CLK_DIVIDER_ONE_BASED | in zynq_clk_setup()
345 SLCR_DDR_CLK_CTRL, 20, 6, CLK_DIVIDER_ONE_BASED | in zynq_clk_setup()
352 SLCR_DCI_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED | in zynq_clk_setup()
356 CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, in zynq_clk_setup()
403 SLCR_GEM0_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED | in zynq_clk_setup()
407 CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, in zynq_clk_setup()
[all …]
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| /linux-4.19.296/drivers/clk/loongson1/ |
| D | clk-loongson1b.c | 66 CLK_DIVIDER_ONE_BASED | in ls1x_clk_init()
83 DIV_DC_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock); in ls1x_clk_init()
99 DIV_DDR_WIDTH, CLK_DIVIDER_ONE_BASED, in ls1x_clk_init()
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| D | clk-loongson1c.c | 61 CLK_DIVIDER_ONE_BASED | in ls1x_clk_init()
70 DIV_DC_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock); in ls1x_clk_init()
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| /linux-4.19.296/drivers/clk/ti/ |
| D | divider.c | 44 if (divider->flags & CLK_DIVIDER_ONE_BASED) in _get_maxdiv()
66 if (divider->flags & CLK_DIVIDER_ONE_BASED) in _get_div()
88 if (divider->flags & CLK_DIVIDER_ONE_BASED) in _get_val()
422 div->flags |= CLK_DIVIDER_ONE_BASED; in ti_clk_build_component_div()
455 div_flags |= CLK_DIVIDER_ONE_BASED; in ti_clk_register_divider()
547 if (flags & CLK_DIVIDER_ONE_BASED) in _get_divider_width()
598 *div_flags |= CLK_DIVIDER_ONE_BASED; in ti_clk_divider_populate()
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| D | adpll.c | 661 CLK_DIVIDER_ONE_BASED); in ti_adpll_init_children_adpll_s()
704 CLK_DIVIDER_ONE_BASED); in ti_adpll_init_children_adpll_s()
734 CLK_DIVIDER_ONE_BASED); in ti_adpll_init_children_adpll_lj()
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| /linux-4.19.296/drivers/clk/mmp/ |
| D | clk-mmp2.c | 337 10, 4, CLK_DIVIDER_ONE_BASED, &clk_lock); in mmp2_clk_init()
368 8, 4, CLK_DIVIDER_ONE_BASED, &clk_lock); in mmp2_clk_init()
391 8, 4, CLK_DIVIDER_ONE_BASED, &clk_lock); in mmp2_clk_init()
410 17, 4, CLK_DIVIDER_ONE_BASED, &clk_lock); in mmp2_clk_init()
438 16, 4, CLK_DIVIDER_ONE_BASED, &clk_lock); in mmp2_clk_init()
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| D | clk-mix.c | 33 if (mix->div_flags & CLK_DIVIDER_ONE_BASED) in _get_maxdiv()
50 if (mix->div_flags & CLK_DIVIDER_ONE_BASED) in _get_div()
87 if (mix->div_flags & CLK_DIVIDER_ONE_BASED) in _get_div_val()
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| D | clk-of-pxa1928.c | 156 {0, "sdh_div", "sdh_mux", 0, PXA1928_CLK_SDH0 * 4, 10, 4, CLK_DIVIDER_ONE_BASED, &sdh0_lock},
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| /linux-4.19.296/drivers/clk/mxs/ |
| D | clk-div.c | 99 div->divider.flags = CLK_DIVIDER_ONE_BASED; in mxs_clk_div()
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| /linux-4.19.296/drivers/clk/ |
| D | clk-tango4.c | 74 base + CPUCLK_DIV, 8, 8, CLK_DIVIDER_ONE_BASED, NULL); in tango4_clkgen_setup()
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| D | clk-divider.c | 57 if (flags & CLK_DIVIDER_ONE_BASED) in _get_maxdiv()
80 if (flags & CLK_DIVIDER_ONE_BASED) in _get_div()
105 if (flags & CLK_DIVIDER_ONE_BASED) in _get_val()
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| D | clk-asm9260.c | 322 base + dc->reg, 0, 8, CLK_DIVIDER_ONE_BASED, in asm9260_acc_init()
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| D | clk-nomadik.c | 548 CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, in of_nomadik_hclk_setup()
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| D | clk-stm32h7.c | 1175 M_CFG_DIV(NULL, CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO),
1256 base + RCC_CFGR, 8, 6, CLK_DIVIDER_ONE_BASED | in stm32h7_rcc_init()
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| /linux-4.19.296/drivers/clk/sunxi/ |
| D | clk-a10-pll2.c | 74 CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, in sun4i_pll2_setup()
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| /linux-4.19.296/drivers/clk/nxp/ |
| D | clk-lpc32xx.c | 941 if (flags & CLK_DIVIDER_ONE_BASED) in _get_div()
1286 CLK_DIVIDER_ONE_BASED),
1292 CLK_DIVIDER_ONE_BASED),
1339 LPC32XX_DEFINE_DIV(SD_DIV, MS_CTRL, 0, 4, NULL, CLK_DIVIDER_ONE_BASED),
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| /linux-4.19.296/drivers/clk/st/ |
| D | clkgen-pll.c | 684 div->flags = CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO; in clkgen_odf_register()
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| /linux-4.19.296/include/linux/ |
| D | clk-provider.h | 432 #define CLK_DIVIDER_ONE_BASED BIT(0) macro
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