Searched refs:CLK_DIV_4 (Results 1 – 3 of 3) sorted by relevance
317 #define CLK_DIV_4 0x02 macro
476 #define CLK_DIV_4 0x03 macro
449 while (n < MIN_DIV_N && div < CLK_DIV_4) { in rtsx_usb_switch_clock()