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Searched refs:CLK_MM_MDP_WROT0 (Results 1 – 6 of 6) sorted by relevance

/linux-4.19.296/drivers/clk/mediatek/
Dclk-mt6797-mm.c65 GATE_MM0(CLK_MM_MDP_WROT0, "mm_mdp_wrot0", "mm_sel", 12),
Dclk-mt2712-mm.c82 GATE_MM0(CLK_MM_MDP_WROT0, "mm_mdp_wrot0", "mm_sel", 12),
Dclk-mt8173.c807 GATE_MM0(CLK_MM_MDP_WROT0, "mm_mdp_wrot0", "mm_sel", 12),
/linux-4.19.296/include/dt-bindings/clock/
Dmt6797-clk.h235 #define CLK_MM_MDP_WROT0 13 macro
Dmt8173-clk.h267 #define CLK_MM_MDP_WROT0 12 macro
Dmt2712-clk.h320 #define CLK_MM_MDP_WROT0 12 macro