| /linux-4.19.296/drivers/clk/hisilicon/ |
| D | clk-hi3660.c | 275 CLK_MUX_HIWORD_MASK, },
278 CLK_MUX_HIWORD_MASK, },
281 CLK_MUX_HIWORD_MASK, },
284 CLK_MUX_HIWORD_MASK, },
287 CLK_MUX_HIWORD_MASK, },
290 CLK_MUX_HIWORD_MASK, },
293 CLK_MUX_HIWORD_MASK, },
296 CLK_MUX_HIWORD_MASK, },
299 CLK_MUX_HIWORD_MASK, },
302 CLK_MUX_HIWORD_MASK, },
[all …]
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| D | clk-hi3620.c | 110 … uart0_mux_p, ARRAY_SIZE(uart0_mux_p), CLK_SET_RATE_PARENT, 0x100, 7, 1, CLK_MUX_HIWORD_MASK, },
111 … uart1_mux_p, ARRAY_SIZE(uart1_mux_p), CLK_SET_RATE_PARENT, 0x100, 8, 1, CLK_MUX_HIWORD_MASK, },
112 … uart2_mux_p, ARRAY_SIZE(uart2_mux_p), CLK_SET_RATE_PARENT, 0x100, 9, 1, CLK_MUX_HIWORD_MASK, },
113 … uart3_mux_p, ARRAY_SIZE(uart3_mux_p), CLK_SET_RATE_PARENT, 0x100, 10, 1, CLK_MUX_HIWORD_MASK, },
114 … uart4_mux_p, ARRAY_SIZE(uart4_mux_p), CLK_SET_RATE_PARENT, 0x100, 11, 1, CLK_MUX_HIWORD_MASK, },
115 … spi0_mux_p, ARRAY_SIZE(spi0_mux_p), CLK_SET_RATE_PARENT, 0x100, 12, 1, CLK_MUX_HIWORD_MASK, },
116 … spi1_mux_p, ARRAY_SIZE(spi1_mux_p), CLK_SET_RATE_PARENT, 0x100, 13, 1, CLK_MUX_HIWORD_MASK, },
117 … spi2_mux_p, ARRAY_SIZE(spi2_mux_p), CLK_SET_RATE_PARENT, 0x100, 14, 1, CLK_MUX_HIWORD_MASK, },
118 … saxi_mux_p, ARRAY_SIZE(saxi_mux_p), CLK_SET_RATE_PARENT, 0x100, 15, 1, CLK_MUX_HIWORD_MASK, },
119 … pwm0_mux_p, ARRAY_SIZE(pwm0_mux_p), CLK_SET_RATE_PARENT, 0x104, 10, 1, CLK_MUX_HIWORD_MASK, },
[all …]
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| D | clk-hi6220.c | 158 …fi_src, ARRAY_SIZE(hifi_src), CLK_SET_RATE_PARENT, 0x400, 0, 1, CLK_MUX_HIWORD_MASK,},
159 …rt1_src, ARRAY_SIZE(uart1_src), CLK_SET_RATE_PARENT, 0x400, 1, 1, CLK_MUX_HIWORD_MASK,},
160 …rt2_src, ARRAY_SIZE(uart2_src), CLK_SET_RATE_PARENT, 0x400, 2, 1, CLK_MUX_HIWORD_MASK,},
161 …rt3_src, ARRAY_SIZE(uart3_src), CLK_SET_RATE_PARENT, 0x400, 3, 1, CLK_MUX_HIWORD_MASK,},
162 …rt4_src, ARRAY_SIZE(uart4_src), CLK_SET_RATE_PARENT, 0x400, 4, 1, CLK_MUX_HIWORD_MASK,},
163 …c0_mux0_p, ARRAY_SIZE(mmc0_mux0_p), CLK_SET_RATE_PARENT, 0x400, 5, 1, CLK_MUX_HIWORD_MASK,},
164 …c1_mux0_p, ARRAY_SIZE(mmc1_mux0_p), CLK_SET_RATE_PARENT, 0x400, 11, 1, CLK_MUX_HIWORD_MASK,},
165 …c2_mux0_p, ARRAY_SIZE(mmc2_mux0_p), CLK_SET_RATE_PARENT, 0x400, 12, 1, CLK_MUX_HIWORD_MASK,},
166 …c0_mux1_p, ARRAY_SIZE(mmc0_mux1_p), CLK_SET_RATE_PARENT, 0x400, 13, 1, CLK_MUX_HIWORD_MASK,},
167 …c1_mux1_p, ARRAY_SIZE(mmc1_mux1_p), CLK_SET_RATE_PARENT, 0x400, 14, 1, CLK_MUX_HIWORD_MASK,},
[all …]
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| /linux-4.19.296/drivers/clk/ |
| D | clk-mux.c | 97 if (mux->flags & CLK_MUX_HIWORD_MASK) { in clk_mux_set_parent()
147 if (clk_mux_flags & CLK_MUX_HIWORD_MASK) { in clk_hw_register_mux_table()
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| /linux-4.19.296/drivers/clk/rockchip/ |
| D | clk-muxgrf.c | 54 if (mux->flags & CLK_MUX_HIWORD_MASK) in rockchip_muxgrf_set_parent()
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| D | clk-rk3036.c | 151 #define MFLAGS CLK_MUX_HIWORD_MASK
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| D | clk-rk3128.c | 176 #define MFLAGS CLK_MUX_HIWORD_MASK
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| D | clk-rk3228.c | 185 #define MFLAGS CLK_MUX_HIWORD_MASK
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| D | clk-rk3328.c | 239 #define MFLAGS CLK_MUX_HIWORD_MASK
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| D | clk-rv1108.c | 170 #define MFLAGS CLK_MUX_HIWORD_MASK
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| D | clk-rk3188.c | 243 #define MFLAGS CLK_MUX_HIWORD_MASK
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| D | clk-rk3368.c | 159 #define MFLAGS CLK_MUX_HIWORD_MASK
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| D | clk-pll.c | 885 pll_mux->flags |= CLK_MUX_HIWORD_MASK; in rockchip_clk_register_pll()
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| D | clk-rk3288.c | 227 #define MFLAGS CLK_MUX_HIWORD_MASK
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| D | clk-px30.c | 207 #define MFLAGS CLK_MUX_HIWORD_MASK
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| D | clk-rk3399.c | 246 #define MFLAGS CLK_MUX_HIWORD_MASK
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| /linux-4.19.296/drivers/clk/ti/ |
| D | mux.c | 81 if (mux->flags & CLK_MUX_HIWORD_MASK) { in ti_clk_mux_set_parent()
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| /linux-4.19.296/include/linux/ |
| D | clk-provider.h | 517 #define CLK_MUX_HIWORD_MASK BIT(2) macro
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