Searched refs:CLK_PDMA1 (Results 1 – 14 of 14) sorted by relevance
| /linux-4.19.296/include/dt-bindings/clock/ |
| D | exynos5410.h | 60 #define CLK_PDMA1 363 macro
|
| D | exynos5250.h | 82 #define CLK_PDMA1 276 macro
|
| D | s5pv210.h | 117 #define CLK_PDMA1 96 macro
|
| D | exynos5420.h | 125 #define CLK_PDMA1 363 macro
|
| D | exynos4.h | 134 #define CLK_PDMA1 293 macro
|
| D | exynos3250.h | 209 #define CLK_PDMA1 200 macro
|
| D | exynos5433.h | 574 #define CLK_PDMA1 64 macro
|
| /linux-4.19.296/drivers/clk/samsung/ |
| D | clk-exynos5410.c | 185 GATE(CLK_PDMA1, "pdma1", "aclk200", GATE_BUS_FSYS0, 2, 0, 0),
|
| D | clk-s5pv210.c | 673 GATE(CLK_PDMA1, "pdma1", "dout_hclkp", CLK_GATE_IP0, 4, 0, 0),
|
| D | clk-exynos5250.c | 598 GATE(CLK_PDMA1, "pdma1", "div_aclk200", GATE_IP_FSYS, 2, 0, 0),
|
| D | clk-exynos3250.c | 649 GATE(CLK_PDMA1, "pdma1", "div_aclk_200", GATE_IP_FSYS, 1, 0, 0),
|
| D | clk-exynos4.c | 982 GATE(CLK_PDMA1, "pdma1", "aclk133", GATE_IP_FSYS, 1,
|
| D | clk-exynos5420.c | 1082 GATE(CLK_PDMA1, "pdma1", "aclk200_fsys", GATE_BUS_FSYS0, 2, 0, 0),
|
| D | clk-exynos5433.c | 2300 GATE(CLK_PDMA1, "pdma1", "aclk_pdma1", ENABLE_IP_FSYS0, 15, 0, 0),
|