Searched refs:CLK_RESET_CCLK_DIVIDER (Results 1 – 1 of 1) sorted by relevance
132 #define CLK_RESET_CCLK_DIVIDER 0x24 macro1175 readl(clk_base + CLK_RESET_CCLK_DIVIDER); in tegra30_cpu_clock_suspend()1210 clk_base + CLK_RESET_CCLK_DIVIDER); in tegra30_cpu_clock_resume()