Searched refs:CLK_SDMMC1 (Results 1 – 7 of 7) sorted by relevance
| /linux-4.19.296/drivers/clk/zte/ |
| D | clk-zx296702.c | 38 #define CLK_SDMMC1 (lsp0crpm_base + 0x0c) macro
607 ARRAY_SIZE(sdmmc1_wclk_sel), CLK_SDMMC1, 4, 1); in zx296702_lsp0_clocks_init()
609 zx_div("sdmmc1_wclk_div", "sdmmc1_wclk_mux", CLK_SDMMC1, 12, 4); in zx296702_lsp0_clocks_init()
611 zx_gate("sdmmc1_wclk", "sdmmc1_wclk_div", CLK_SDMMC1, 1); in zx296702_lsp0_clocks_init()
613 zx_gate("sdmmc1_pclk", "lsp0_apb_pclk", CLK_SDMMC1, 0); in zx296702_lsp0_clocks_init()
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| /linux-4.19.296/include/dt-bindings/clock/ |
| D | exynos5250.h | 87 #define CLK_SDMMC1 281 macro
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| D | exynos4.h | 139 #define CLK_SDMMC1 298 macro
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| D | exynos3250.h | 207 #define CLK_SDMMC1 198 macro
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| /linux-4.19.296/drivers/clk/samsung/ |
| D | clk-exynos5250.c | 603 GATE(CLK_SDMMC1, "sdmmc1", "div_aclk200", GATE_IP_FSYS, 13, 0, 0),
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| D | clk-exynos3250.c | 647 GATE(CLK_SDMMC1, "sdmmc1", "div_aclk_200", GATE_IP_FSYS, 6, 0, 0),
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| D | clk-exynos4.c | 986 GATE(CLK_SDMMC1, "sdmmc1", "aclk133", GATE_IP_FSYS, 6,
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