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Searched refs:CLK_SOURCE_CSITE (Results 1 – 5 of 5) sorted by relevance

/linux-4.19.296/drivers/clk/tegra/
Dclk-tegra20.c108 #define CLK_SOURCE_CSITE 0x1d4 macro
975 readl(clk_base + CLK_SOURCE_CSITE); in tegra20_cpu_clock_suspend()
976 writel(3<<30, clk_base + CLK_SOURCE_CSITE); in tegra20_cpu_clock_suspend()
1025 clk_base + CLK_SOURCE_CSITE); in tegra20_cpu_clock_resume()
Dclk-tegra114.c116 #define CLK_SOURCE_CSITE 0x1d4 macro
1123 readl(clk_base + CLK_SOURCE_CSITE); in tegra114_cpu_clock_suspend()
1124 writel(3 << 30, clk_base + CLK_SOURCE_CSITE); in tegra114_cpu_clock_suspend()
1135 clk_base + CLK_SOURCE_CSITE); in tegra114_cpu_clock_resume()
Dclk-tegra124.c39 #define CLK_SOURCE_CSITE 0x1d4 macro
1220 readl(clk_base + CLK_SOURCE_CSITE); in tegra124_cpu_clock_suspend()
1221 writel(3 << 30, clk_base + CLK_SOURCE_CSITE); in tegra124_cpu_clock_suspend()
1232 clk_base + CLK_SOURCE_CSITE); in tegra124_cpu_clock_resume()
Dclk-tegra-periph.c62 #define CLK_SOURCE_CSITE 0x1d4 macro
749 …MUX_FLAGS("csite", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_CSITE, 73, TEGRA_PERIPH_ON_APB, tegra_clk_c…
750 …MUX_FLAGS("csite", mux_pllp_pllre_clkm, CLK_SOURCE_CSITE, 73, TEGRA_PERIPH_ON_APB, tegra_clk_csite…
Dclk-tegra210.c43 #define CLK_SOURCE_CSITE 0x1d4 macro
3299 readl(clk_base + CLK_SOURCE_CSITE); in tegra210_cpu_clock_suspend()
3300 writel(3 << 30, clk_base + CLK_SOURCE_CSITE); in tegra210_cpu_clock_suspend()
3306 clk_base + CLK_SOURCE_CSITE); in tegra210_cpu_clock_resume()