Home
last modified time | relevance | path

Searched refs:CLK_TOP_APLL2_DIV3 (Results 1 – 2 of 2) sorted by relevance

/linux-4.19.296/include/dt-bindings/clock/
Dmt8173-clk.h148 #define CLK_TOP_APLL2_DIV3 130 macro
/linux-4.19.296/drivers/clk/mediatek/
Dclk-mt8173.c613 DIV_GATE(CLK_TOP_APLL2_DIV3, "apll2_div3", "aud_2_sel", 0x12c, 19, 0x128, 8, 16),