Home
last modified time | relevance | path

Searched refs:CLK_TOP_APLL_DIV0 (Results 1 – 2 of 2) sorted by relevance

/linux-4.19.296/include/dt-bindings/clock/
Dmt2712-clk.h209 #define CLK_TOP_APLL_DIV0 170 macro
/linux-4.19.296/drivers/clk/mediatek/
Dclk-mt2712.c942 DIV_ADJ(CLK_TOP_APLL_DIV0, "apll_div0", "i2so1_sel", 0x124, 0, 8),