Searched refs:CLK_TOP_APLL_SEL (Results 1 – 6 of 6) sorted by relevance
| /linux-4.19.296/include/dt-bindings/clock/ |
| D | mt8135-clk.h | 110 #define CLK_TOP_APLL_SEL 91 macro
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| D | mt2712-clk.h | 178 #define CLK_TOP_APLL_SEL 139 macro
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| D | mt2701-clk.h | 115 #define CLK_TOP_APLL_SEL 96 macro
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| /linux-4.19.296/drivers/clk/mediatek/ |
| D | clk-mt8135.c | 401 MUX_GATE(CLK_TOP_APLL_SEL, "apll_sel", apll_parents, 0x0168, 16, 3, 23),
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| D | clk-mt2701.c | 550 MUX_GATE(CLK_TOP_APLL_SEL, "apll_sel", apll_parents,
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| D | clk-mt2712.c | 832 MUX_GATE(CLK_TOP_APLL_SEL, "apll_sel",
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