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Searched refs:CLK_TOP_AUD_MUX1_DIV (Results 1 – 2 of 2) sorted by relevance

/linux-4.19.296/include/dt-bindings/clock/
Dmt2701-clk.h151 #define CLK_TOP_AUD_MUX1_DIV 132 macro
/linux-4.19.296/drivers/clk/mediatek/
Dclk-mt2701.c629 DIV_ADJ(CLK_TOP_AUD_MUX1_DIV, "aud_mux1_div", "aud_mux1_sel",