Searched refs:CLK_TOP_DPILVDS1_SEL (Results 1 – 2 of 2) sorted by relevance
| /linux-4.19.296/include/dt-bindings/clock/ | ||
| D | mt2712-clk.h | 158 #define CLK_TOP_DPILVDS1_SEL 119 macro |
| /linux-4.19.296/drivers/clk/mediatek/ | ||
| D | clk-mt2712.c | 787 MUX_GATE(CLK_TOP_DPILVDS1_SEL, "dpilvds1_sel", |