Searched refs:CLK_TOP_MSDC30_0_SEL (Results 1 – 6 of 6) sorted by relevance
/linux-4.19.296/include/dt-bindings/clock/ |
D | mt8135-clk.h | 105 #define CLK_TOP_MSDC30_0_SEL 86 macro
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D | mt7622-clk.h | 88 #define CLK_TOP_MSDC30_0_SEL 68 macro
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D | mt2701-clk.h | 103 #define CLK_TOP_MSDC30_0_SEL 84 macro
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/linux-4.19.296/drivers/clk/mediatek/ |
D | clk-mt8135.c | 394 MUX_GATE(CLK_TOP_MSDC30_0_SEL, "msdc30_0_sel", msdc30_parents, 0x0164, 8, 3, 15),
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D | clk-mt7622.c | 553 MUX_GATE(CLK_TOP_MSDC30_0_SEL, "msdc30_0_sel", msdc30_0_parents,
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D | clk-mt2701.c | 525 MUX_GATE(CLK_TOP_MSDC30_0_SEL, "msdc30_0_sel", msdc30_parents,
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