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Searched refs:CLK_TOP_MSDC50_0_HCLK_SEL (Results 1 – 2 of 2) sorted by relevance

/linux-4.19.296/include/dt-bindings/clock/
Dmt2712-clk.h150 #define CLK_TOP_MSDC50_0_HCLK_SEL 111 macro
/linux-4.19.296/drivers/clk/mediatek/
Dclk-mt2712.c769 MUX_GATE(CLK_TOP_MSDC50_0_HCLK_SEL, "msdc50_0_h_sel",