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Searched refs:CLK_TOP_P1_1MHZ (Results 1 – 2 of 2) sorted by relevance

/linux-4.19.296/include/dt-bindings/clock/
Dmt7622-clk.h31 #define CLK_TOP_P1_1MHZ 11 macro
/linux-4.19.296/drivers/clk/mediatek/
Dclk-mt7622.c397 FACTOR(CLK_TOP_P1_1MHZ, "p1_1mhz", "eth1pll", 1, 500),