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Searched refs:CLK_TOP_PE2_MAC_P1_SEL (Results 1 – 2 of 2) sorted by relevance

/linux-4.19.296/include/dt-bindings/clock/
Dmt2712-clk.h171 #define CLK_TOP_PE2_MAC_P1_SEL 132 macro
/linux-4.19.296/drivers/clk/mediatek/
Dclk-mt2712.c816 MUX_GATE(CLK_TOP_PE2_MAC_P1_SEL, "pe2_mac_p1_sel",