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Searched refs:CLK_TOP_SPI1_SEL (Results 1 – 4 of 4) sorted by relevance

/linux-4.19.296/include/dt-bindings/clock/
Dmt7622-clk.h86 #define CLK_TOP_SPI1_SEL 66 macro
Dmt2701-clk.h132 #define CLK_TOP_SPI1_SEL 113 macro
/linux-4.19.296/drivers/clk/mediatek/
Dclk-mt7622.c547 MUX_GATE(CLK_TOP_SPI1_SEL, "spi1_sel", spi1_parents,
Dclk-mt2701.c592 MUX_GATE(CLK_TOP_SPI1_SEL, "spi2_sel", spi_parents,