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Searched refs:CLK_UART1_INTERNAL_DIV (Results 1 – 2 of 2) sorted by relevance

/linux-4.19.296/include/dt-bindings/clock/
Dpistachio-clk.h71 #define CLK_UART1_INTERNAL_DIV 78 macro
/linux-4.19.296/drivers/clk/pistachio/
Dclk-pistachio.c81 DIV_F(CLK_UART1_INTERNAL_DIV, "uart1_internal_div", "sys_pll_mux",