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Searched refs:DCLK_VOP0 (Results 1 – 4 of 4) sorted by relevance

/linux-4.19.296/include/dt-bindings/clock/
Drk3288-cru.h96 #define DCLK_VOP0 190 macro
Drk3399-cru.h138 #define DCLK_VOP0 180 macro
/linux-4.19.296/drivers/clk/rockchip/
Dclk-rk3288.c429 COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0,
Dclk-rk3399.c288 MUX(DCLK_VOP0, "dclk_vop0", mux_dclk_vop0_p, CLK_SET_RATE_PARENT,