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Searched refs:DIV (Results 1 – 25 of 31) sorted by relevance

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/linux-4.19.296/drivers/clk/pistachio/
Dclk-pistachio.c60 DIV(CLK_MIPS_INTERNAL_DIV, "mips_internal_div", "mips_pll_mux",
62 DIV(CLK_MIPS_DIV, "mips_div", "mips_internal_div", 0x208, 8),
71 DIV(CLK_RPU_V_DIV, "rpu_v_div", "rpu_v_pll_mux", 0x21c, 2),
72 DIV(CLK_RPU_L_DIV, "rpu_l_div", "rpu_l_mux", 0x220, 2),
73 DIV(CLK_RPU_SLEEP_DIV, "rpu_sleep_div", "xtal", 0x224, 10),
74 DIV(CLK_RPU_CORE_DIV, "rpu_core_div", "rpu_core_mux", 0x228, 3),
75 DIV(CLK_USB_PHY_DIV, "usb_phy_div", "sys_internal_div", 0x22c, 6),
76 DIV(CLK_ENET_DIV, "enet_div", "enet_mux", 0x230, 6),
85 DIV(CLK_SYS_INTERNAL_DIV, "sys_internal_div", "sys_pll_mux", 0x244, 3),
86 DIV(CLK_SPI0_INTERNAL_DIV, "spi0_internal_div", "sys_pll_mux",
[all …]
Dclk.h62 #define DIV(_id, _name, _pname, _reg, _width) \ macro
/linux-4.19.296/drivers/clk/samsung/
Dclk-exynos5410.c125 DIV(0, "div_arm", "mout_cpu", DIV_CPU0, 0, 3),
126 DIV(0, "div_arm2", "div_arm", DIV_CPU0, 28, 3),
128 DIV(0, "div_acp", "div_arm2", DIV_CPU0, 8, 3),
129 DIV(0, "div_cpud", "div_arm2", DIV_CPU0, 4, 3),
130 DIV(0, "div_atb", "div_arm2", DIV_CPU0, 16, 3),
131 DIV(0, "pclk_dbg", "div_arm2", DIV_CPU0, 20, 3),
133 DIV(0, "div_kfc", "mout_kfc", DIV_KFC0, 0, 3),
134 DIV(0, "div_aclk", "div_kfc", DIV_KFC0, 4, 3),
135 DIV(0, "div_pclk", "div_kfc", DIV_KFC0, 20, 3),
137 DIV(0, "aclk66_pre", "sclk_mpll_muxed", DIV_TOP1, 24, 3),
[all …]
Dclk-exynos4.c723 DIV(CLK_DIV_GDL, "div_gdl", "mout_gdl", DIV_LEFTBUS, 0, 3),
724 DIV(0, "div_gpl", "div_gdl", DIV_LEFTBUS, 4, 3),
725 DIV(0, "div_clkout_leftbus", "mout_clkout_leftbus",
728 DIV(CLK_DIV_GDR, "div_gdr", "mout_gdr", DIV_RIGHTBUS, 0, 3),
729 DIV(0, "div_gpr", "div_gdr", DIV_RIGHTBUS, 4, 3),
730 DIV(0, "div_clkout_rightbus", "mout_clkout_rightbus",
733 DIV(0, "div_core", "mout_core", DIV_CPU0, 0, 3),
734 DIV(0, "div_corem0", "div_core2", DIV_CPU0, 4, 3),
735 DIV(0, "div_corem1", "div_core2", DIV_CPU0, 8, 3),
736 DIV(0, "div_periph", "div_core2", DIV_CPU0, 12, 3),
[all …]
Dclk-exynos5260.c105 DIV(AUD_DOUT_ACLK_AUD_131, "dout_aclk_aud_131", "mout_aud_pll_user",
108 DIV(AUD_DOUT_SCLK_AUD_I2S, "dout_sclk_aud_i2s", "mout_sclk_aud_i2s",
110 DIV(AUD_DOUT_SCLK_AUD_PCM, "dout_sclk_aud_pcm", "mout_sclk_aud_pcm",
112 DIV(AUD_DOUT_SCLK_AUD_UART, "dout_sclk_aud_uart", "mout_aud_pll_user",
274 DIV(DISP_DOUT_PCLK_DISP_111, "dout_pclk_disp_111",
277 DIV(DISP_DOUT_SCLK_FIMD1_EXTCLKPLL, "dout_sclk_fimd1_extclkpll",
280 DIV(DISP_DOUT_SCLK_HDMI_PHY_PIXEL_CLKI,
371 DIV(EGL_DOUT_EGL1, "dout_egl1", "mout_egl_b", DIV_EGL, 0, 3),
372 DIV(EGL_DOUT_EGL2, "dout_egl2", "dout_egl1", DIV_EGL, 4, 3),
373 DIV(EGL_DOUT_ACLK_EGL, "dout_aclk_egl", "dout_egl2", DIV_EGL, 8, 3),
[all …]
Dclk-exynos5420.c583 DIV(CLK_DOUT_ACLK400_WCORE, "dout_aclk400_wcore",
585 DIV(0, "dout_aclk550_cam", "mout_aclk550_cam",
587 DIV(0, "dout_aclkfl1_550_cam", "mout_aclkfl1_550_cam",
589 DIV(0, "dout_aclk432_cam", "mout_aclk432_cam",
591 DIV(0, "dout_aclk432_scaler", "mout_aclk432_scaler",
594 DIV(0, "dout_osc_div", "fin_pll", DIV_TOP9, 20, 3),
595 DIV(0, "dout_sclk_sw", "sclk_spll", DIV_TOP9, 24, 6),
640 DIV(CLK_DOUT_ACLK400_WCORE, "dout_aclk400_wcore",
825 DIV(0, "div_arm", "mout_cpu", DIV_CPU0, 0, 3),
826 DIV(0, "sclk_apll", "mout_apll", DIV_CPU0, 24, 3),
[all …]
Dclk-s5pv210.c519 DIV(DOUT_PCLKP, "dout_pclkp", "dout_hclkp", CLK_DIV0, 28, 3),
520 DIV(DOUT_PCLKD, "dout_pclkd", "dout_hclkd", CLK_DIV0, 20, 3),
521 DIV(DOUT_A2M, "dout_a2m", "mout_apll", CLK_DIV0, 4, 3),
522 DIV(DOUT_APLL, "dout_apll", "mout_msys", CLK_DIV0, 0, 3),
524 DIV(DOUT_FIMD, "dout_fimd", "mout_fimd", CLK_DIV1, 20, 4),
525 DIV(DOUT_CAM1, "dout_cam1", "mout_cam1", CLK_DIV1, 16, 4),
526 DIV(DOUT_CAM0, "dout_cam0", "mout_cam0", CLK_DIV1, 12, 4),
528 DIV(DOUT_FIMC2, "dout_fimc2", "mout_fimc2", CLK_DIV3, 20, 4),
529 DIV(DOUT_FIMC1, "dout_fimc1", "mout_fimc1", CLK_DIV3, 16, 4),
530 DIV(DOUT_FIMC0, "dout_fimc0", "mout_fimc0", CLK_DIV3, 12, 4),
[all …]
Dclk-exynos5250.c393 DIV(0, "div_arm", "mout_cpu", DIV_CPU0, 0, 3),
394 DIV(0, "div_apll", "mout_apll", DIV_CPU0, 24, 3),
395 DIV(0, "div_arm2", "div_arm", DIV_CPU0, 28, 3),
400 DIV(0, "div_aclk66", "div_aclk66_pre", DIV_TOP0, 0, 3),
401 DIV(0, "div_aclk166", "mout_aclk166", DIV_TOP0, 8, 3),
402 DIV(0, "div_aclk200", "mout_aclk200", DIV_TOP0, 12, 3),
403 DIV(0, "div_aclk266", "mout_mpll_user", DIV_TOP0, 16, 3),
404 DIV(0, "div_aclk333", "mout_aclk333", DIV_TOP0, 20, 3),
405 DIV(0, "div_aclk400_g3d", "mout_aclk400_g3d", DIV_TOP0,
407 DIV(0, "div_aclk300_disp", "mout_aclk300", DIV_TOP0, 28, 3),
[all …]
Dclk-exynos3250.c339 DIV(CLK_DIV_GPL, "div_gpl", "div_gdl", DIV_LEFTBUS, 4, 3),
340 DIV(CLK_DIV_GDL, "div_gdl", "mout_gdl", DIV_LEFTBUS, 0, 4),
343 DIV(CLK_DIV_GPR, "div_gpr", "div_gdr", DIV_RIGHTBUS, 4, 3),
344 DIV(CLK_DIV_GDR, "div_gdr", "mout_gdr", DIV_RIGHTBUS, 0, 4),
347 DIV(CLK_DIV_MPLL_PRE, "div_mpll_pre", "sclk_mpll_mif", DIV_TOP, 28, 2),
348 DIV(CLK_DIV_ACLK_400_MCUISP, "div_aclk_400_mcuisp",
350 DIV(CLK_DIV_EBI, "div_ebi", "mout_ebi_1", DIV_TOP, 16, 3),
351 DIV(CLK_DIV_ACLK_200, "div_aclk_200", "mout_aclk_200", DIV_TOP, 12, 3),
352 DIV(CLK_DIV_ACLK_160, "div_aclk_160", "mout_aclk_160", DIV_TOP, 8, 3),
353 DIV(CLK_DIV_ACLK_100, "div_aclk_100", "mout_aclk_100", DIV_TOP, 4, 4),
[all …]
Dclk-exynos7.c122 DIV(DOUT_ACLK_CCORE_133, "dout_aclk_ccore_133", "mout_aclk_ccore_133",
125 DIV(DOUT_ACLK_MSCL_532, "dout_aclk_mscl_532", "mout_aclk_mscl_532",
127 DIV(DOUT_ACLK_PERIS, "dout_aclk_peris_66", "mout_aclk_peris_66",
130 DIV(DOUT_SCLK_BUS0_PLL, "dout_sclk_bus0_pll", "mout_topc_bus0_pll_out",
132 DIV(DOUT_SCLK_BUS1_PLL, "dout_sclk_bus1_pll", "mout_topc_bus1_pll",
134 DIV(DOUT_SCLK_CC_PLL, "dout_sclk_cc_pll", "mout_topc_cc_pll",
136 DIV(DOUT_SCLK_MFC_PLL, "dout_sclk_mfc_pll", "mout_topc_mfc_pll",
138 DIV(DOUT_SCLK_AUD_PLL, "dout_sclk_aud_pll", "mout_topc_aud_pll",
319 DIV(DOUT_ACLK_PERIC1, "dout_aclk_peric1_66", "mout_aclk_peric1_66",
321 DIV(DOUT_ACLK_PERIC0, "dout_aclk_peric0_66", "mout_aclk_peric0_66",
[all …]
Dclk-s3c64xx.c222 DIV(DOUT_MPLL, "dout_mpll", "mout_mpll", CLK_DIV0, 4, 1),
223 DIV(HCLKX2, "hclkx2", "mout_syncmux", CLK_DIV0, 9, 3),
224 DIV(HCLK, "hclk", "hclkx2", CLK_DIV0, 8, 1),
225 DIV(PCLK, "pclk", "hclkx2", CLK_DIV0, 12, 4),
226 DIV(DOUT_SECUR, "dout_secur", "hclkx2", CLK_DIV0, 18, 2),
227 DIV(DOUT_CAM, "dout_cam", "hclkx2", CLK_DIV0, 20, 4),
228 DIV(DOUT_JPEG, "dout_jpeg", "hclkx2", CLK_DIV0, 24, 4),
229 DIV(DOUT_MFC, "dout_mfc", "mout_mfc", CLK_DIV0, 28, 4),
230 DIV(DOUT_MMC0, "dout_mmc0", "mout_mmc0", CLK_DIV1, 0, 4),
231 DIV(DOUT_MMC1, "dout_mmc1", "mout_mmc1", CLK_DIV1, 4, 4),
[all …]
Dclk-exynos5433.c386 DIV(CLK_DIV_ACLK_CAM1_333, "div_aclk_cam1_333", "mout_aclk_cam1_333",
388 DIV(CLK_DIV_ACLK_CAM1_400, "div_aclk_cam1_400", "mout_bus_pll_user",
390 DIV(CLK_DIV_ACLK_CAM1_552, "div_aclk_cam1_552", "mout_aclk_cam1_552_b",
392 DIV(CLK_DIV_ACLK_CAM0_333, "div_aclk_cam0_333", "mout_mfc_pll_user",
394 DIV(CLK_DIV_ACLK_CAM0_400, "div_aclk_cam0_400", "mout_bus_pll_user",
396 DIV(CLK_DIV_ACLK_CAM0_552, "div_aclk_cam0_552", "mout_isp_pll",
398 DIV(CLK_DIV_ACLK_ISP_DIS_400, "div_aclk_isp_dis_400",
400 DIV(CLK_DIV_ACLK_ISP_400, "div_aclk_isp_400",
404 DIV(CLK_DIV_ACLK_GSCL_111, "div_aclk_gscl_111", "mout_aclk_gscl_333",
406 DIV(CLK_DIV_ACLK_GSCL_333, "div_aclk_gscl_333", "mout_aclk_gscl_333",
[all …]
Dclk-s3c2443.c141 DIV(0, "prediv", "msysclk", CLKDIV0, 4, 2),
143 DIV(PCLK, "pclk", "hclk", CLKDIV0, 2, 1),
144 DIV(0, "div_hsspi0_epll", "esysclk", CLKDIV1, 24, 2),
145 DIV(0, "div_fimd", "esysclk", CLKDIV1, 16, 8),
146 DIV(0, "div_i2s0", "esysclk", CLKDIV1, 12, 4),
147 DIV(0, "div_uart", "esysclk", CLKDIV1, 8, 4),
148 DIV(0, "div_hsmmc1", "esysclk", CLKDIV1, 6, 2),
149 DIV(0, "div_usbhost", "esysclk", CLKDIV1, 4, 2),
243 DIV(0, "div_hsspi0_mpll", "msysclk", CLKDIV2, 0, 4),
244 DIV(0, "div_hsmmc0", "esysclk", CLKDIV2, 6, 2),
[all …]
Dclk-s3c2412.c98 DIV(0, "div_cam", "mux_cam", CLKDIVN, 16, 4),
99 DIV(0, "div_i2s", "mux_i2s", CLKDIVN, 12, 4),
100 DIV(0, "div_uart", "mux_uart", CLKDIVN, 8, 4),
101 DIV(0, "div_usb", "mux_usb", CLKDIVN, 6, 1),
102 DIV(0, "div_hclk_half", "hclk", CLKDIVN, 5, 1),
103 DIV(ARMDIV, "armdiv", "msysclk", CLKDIVN, 3, 1),
104 DIV(PCLK, "pclk", "hclk", CLKDIVN, 2, 1),
105 DIV(HCLK, "hclk", "armdiv", CLKDIVN, 0, 2),
Dclk-exynos4412-isp.c41 DIV(CLK_ISP_DIV_ISP0, "div_isp0", "aclk200", E4X12_DIV_ISP0, 0, 3),
42 DIV(CLK_ISP_DIV_ISP1, "div_isp1", "aclk200", E4X12_DIV_ISP0, 4, 3),
43 DIV(CLK_ISP_DIV_MCUISP0, "div_mcuisp0", "aclk400_mcuisp",
45 DIV(CLK_ISP_DIV_MCUISP1, "div_mcuisp1", "div_mcuisp0",
47 DIV(0, "div_mpwm", "div_isp1", E4X12_DIV_ISP1, 0, 3),
Dclk-s3c2410.c116 DIV(PCLK, "pclk", "hclk", CLKDIVN, 0, 1),
204 DIV(HCLK, "hclk", "mpll", CLKDIVN, 1, 1),
295 DIV(UCLK, "uclk", "upll", CLKDIVN, 3, 1),
296 DIV(0, "div_hclk", "fclk", CLKDIVN, 1, 1),
299 DIV(0, "div_cam", "upll", CAMDIVN, 0, 3),
/linux-4.19.296/drivers/clk/bcm/
Dclk-kona.h65 #define divider_exists(div) FLAG_TEST(div, DIV, EXISTS)
66 #define divider_is_fixed(div) FLAG_TEST(div, DIV, FIXED)
295 .flags = FLAG(DIV, EXISTS)|FLAG(DIV, FIXED), \
305 .flags = FLAG(DIV, EXISTS), \
316 .flags = FLAG(DIV, EXISTS), \
/linux-4.19.296/drivers/clk/rockchip/
Dclk-rk3368.c300 DIV(0, "aclkm_core_b", "armclkb", 0,
302 DIV(0, "atclk_core_b", "armclkb", 0,
304 DIV(0, "pclk_dbg_b", "armclkb", 0,
307 DIV(0, "aclkm_core_l", "armclkl", 0,
309 DIV(0, "atclk_core_l", "armclkl", 0,
311 DIV(0, "pclk_dbg_l", "armclkl", 0,
446 DIV(0, "hclk_vio", "aclk_vio0", 0,
499 DIV(0, "pclk_pd_alive", "gpll", 0,
Dclk-rk3228.c222 DIV(0, "clk_24m", "xin24m", CLK_IGNORE_UNUSED,
311 DIV(HCLK_VIO_PRE, "hclk_vio_pre", "aclk_iep_pre", 0,
395 DIV(SCLK_SDIO, "sclk_sdio", "sclk_sdio_src", 0,
401 DIV(SCLK_EMMC, "sclk_emmc", "sclk_emmc_src", 0,
414 DIV(DCLK_HDMI_PHY, "dclk_hdmiphy", "sclk_vop_src", 0,
416 DIV(0, "sclk_vop_pre", "sclk_vop_src", 0,
Dclk-rk3036.c223 DIV(0, "pclk_peri_src", "aclk_peri_src", CLK_IGNORE_UNUSED,
227 DIV(0, "hclk_peri_src", "aclk_peri_src", CLK_IGNORE_UNUSED,
292 DIV(SCLK_SDMMC, "sclk_sdmmc", "sclk_sdmmc_src", 0,
298 DIV(SCLK_SDIO, "sclk_sdio", "sclk_sdio_src", 0,
Dclk-rk3188.c568 DIV(0, "pclk_cpu_pre", "aclk_cpu_pre", 0,
571 DIV(0, "hclk_cpu_pre", "aclk_cpu_pre", 0,
689 DIV(0, "pclk_cpu_pre", "aclk_cpu_pre", 0,
691 DIV(0, "hclk_cpu_pre", "aclk_cpu_pre", 0,
726 DIV(0, "sclk_hsicphy_12m", "sclk_hsicphy_480m", 0,
Dclk-rk3288.c322 DIV(0, "aclk_cpu_pre", "aclk_cpu_src", CLK_SET_RATE_PARENT,
416 DIV(0, "hclk_vio", "aclk_vio0", 0,
458 DIV(HCLK_HEVC, "hclk_hevc", "aclk_hevc", 0,
474 DIV(0, "pclk_pd_alive", "gpll", 0,
640 DIV(0, "hsicphy12m_usbphy", "sclk_hsicphy480m", 0,
Dclk-rk3128.c212 DIV(0, "clk_24m", "xin24m", CLK_IGNORE_UNUSED,
338 DIV(SCLK_PVTM, "clk_pvtm", "clk_pvtm_func", 0,
361 DIV(SCLK_CIF_OUT, "sclk_cif_out", "sclk_cif_out_src", 0,
Dclk-rk3328.c276 DIV(0, "clk_24m", "xin24m", CLK_IGNORE_UNUSED,
579 DIV(HCLK_VIO_PRE, "hclk_vio_pre", "aclk_vio_pre", 0,
603 DIV(DCLK_HDMIPHY, "dclk_hdmiphy", "dclk_lcdc_src", 0,
Dclk-rk3399.c538 DIV(0, "pclken_dbg_core_b", "pclk_dbg_core_b", CLK_IGNORE_UNUSED,
1287 DIV(PCLK_ALIVE, "pclk_alive", "gpll", 0,
1321 DIV(0, "clk_test_24m", "xin24m", 0,
1441 DIV(0, "clk_32k_suspend_pmu", "xin24m", CLK_IGNORE_UNUSED,
1455 DIV(PCLK_SRC_PMU, "pclk_pmu_src", "ppll", CLK_IGNORE_UNUSED,

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