1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright(C) 2015 Linaro Limited. All rights reserved. 4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org> 5 */ 6 7 #ifndef _LINUX_CORESIGHT_PMU_H 8 #define _LINUX_CORESIGHT_PMU_H 9 10 #define CORESIGHT_ETM_PMU_NAME "cs_etm" 11 #define CORESIGHT_ETM_PMU_SEED 0x10 12 13 /* ETMv3.5/PTM's ETMCR config bit */ 14 #define ETM_OPT_CYCACC 12 15 #define ETM_OPT_TS 28 16 #define ETM_OPT_RETSTK 29 17 18 /* ETMv4 CONFIGR programming bits for the ETM OPTs */ 19 #define ETM4_CFG_BIT_CYCACC 4 20 #define ETM4_CFG_BIT_TS 11 21 #define ETM4_CFG_BIT_RETSTK 12 22 coresight_get_trace_id(int cpu)23static inline int coresight_get_trace_id(int cpu) 24 { 25 /* 26 * A trace ID of value 0 is invalid, so let's start at some 27 * random value that fits in 7 bits and go from there. Since 28 * the common convention is to have data trace IDs be I(N) + 1, 29 * set instruction trace IDs as a function of the CPU number. 30 */ 31 return (CORESIGHT_ETM_PMU_SEED + (cpu * 2)); 32 } 33 34 #endif 35