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Searched refs:GICR_CTLR_ENABLE_LPIS (Results 1 – 3 of 3) sorted by relevance

/linux-4.19.296/virt/kvm/arm/vgic/
Dvgic-mmio-v3.c187 return vgic_cpu->lpis_enabled ? GICR_CTLR_ENABLE_LPIS : 0; in vgic_mmio_read_v3r_ctlr()
201 vgic_cpu->lpis_enabled = val & GICR_CTLR_ENABLE_LPIS; in vgic_mmio_write_v3r_ctlr()
/linux-4.19.296/include/linux/irqchip/
Darm-gic-v3.h119 #define GICR_CTLR_ENABLE_LPIS (1UL << 0) macro
/linux-4.19.296/drivers/irqchip/
Dirq-gic-v3-its.c2079 val |= GICR_CTLR_ENABLE_LPIS; in its_cpu_init_lpis()
3603 if (!(val & GICR_CTLR_ENABLE_LPIS)) in redist_disable_lpis()
3611 val &= ~GICR_CTLR_ENABLE_LPIS; in redist_disable_lpis()
3637 if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { in redist_disable_lpis()