1 /*
2 * mcp3422.c - driver for the Microchip mcp3421/2/3/4/5/6/7/8 chip family
3 *
4 * Copyright (C) 2013, Angelo Compagnucci
5 * Author: Angelo Compagnucci <angelo.compagnucci@gmail.com>
6 *
7 * Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/22088b.pdf
8 * http://ww1.microchip.com/downloads/en/DeviceDoc/22226a.pdf
9 * http://ww1.microchip.com/downloads/en/DeviceDoc/22072b.pdf
10 *
11 * This driver exports the value of analog input voltage to sysfs, the
12 * voltage unit is nV.
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 */
19
20 #include <linux/err.h>
21 #include <linux/i2c.h>
22 #include <linux/module.h>
23 #include <linux/delay.h>
24 #include <linux/sysfs.h>
25 #include <linux/of.h>
26
27 #include <linux/iio/iio.h>
28 #include <linux/iio/sysfs.h>
29
30 /* Masks */
31 #define MCP3422_CHANNEL_MASK 0x60
32 #define MCP3422_PGA_MASK 0x03
33 #define MCP3422_SRATE_MASK 0x0C
34 #define MCP3422_SRATE_240 0x0
35 #define MCP3422_SRATE_60 0x1
36 #define MCP3422_SRATE_15 0x2
37 #define MCP3422_SRATE_3 0x3
38 #define MCP3422_PGA_1 0
39 #define MCP3422_PGA_2 1
40 #define MCP3422_PGA_4 2
41 #define MCP3422_PGA_8 3
42 #define MCP3422_CONT_SAMPLING 0x10
43
44 #define MCP3422_CHANNEL(config) (((config) & MCP3422_CHANNEL_MASK) >> 5)
45 #define MCP3422_PGA(config) ((config) & MCP3422_PGA_MASK)
46 #define MCP3422_SAMPLE_RATE(config) (((config) & MCP3422_SRATE_MASK) >> 2)
47
48 #define MCP3422_CHANNEL_VALUE(value) (((value) << 5) & MCP3422_CHANNEL_MASK)
49 #define MCP3422_PGA_VALUE(value) ((value) & MCP3422_PGA_MASK)
50 #define MCP3422_SAMPLE_RATE_VALUE(value) ((value << 2) & MCP3422_SRATE_MASK)
51
52 #define MCP3422_CHAN(_index) \
53 { \
54 .type = IIO_VOLTAGE, \
55 .indexed = 1, \
56 .channel = _index, \
57 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
58 | BIT(IIO_CHAN_INFO_SCALE), \
59 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
60 }
61
62 static const int mcp3422_scales[4][4] = {
63 { 1000000, 500000, 250000, 125000 },
64 { 250000, 125000, 62500, 31250 },
65 { 62500, 31250, 15625, 7812 },
66 { 15625, 7812, 3906, 1953 } };
67
68 /* Constant msleep times for data acquisitions */
69 static const int mcp3422_read_times[4] = {
70 [MCP3422_SRATE_240] = 1000 / 240,
71 [MCP3422_SRATE_60] = 1000 / 60,
72 [MCP3422_SRATE_15] = 1000 / 15,
73 [MCP3422_SRATE_3] = 1000 / 3 };
74
75 /* sample rates to integer conversion table */
76 static const int mcp3422_sample_rates[4] = {
77 [MCP3422_SRATE_240] = 240,
78 [MCP3422_SRATE_60] = 60,
79 [MCP3422_SRATE_15] = 15,
80 [MCP3422_SRATE_3] = 3 };
81
82 /* sample rates to sign extension table */
83 static const int mcp3422_sign_extend[4] = {
84 [MCP3422_SRATE_240] = 11,
85 [MCP3422_SRATE_60] = 13,
86 [MCP3422_SRATE_15] = 15,
87 [MCP3422_SRATE_3] = 17 };
88
89 /* Client data (each client gets its own) */
90 struct mcp3422 {
91 struct i2c_client *i2c;
92 u8 id;
93 u8 config;
94 u8 pga[4];
95 struct mutex lock;
96 };
97
mcp3422_update_config(struct mcp3422 * adc,u8 newconfig)98 static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
99 {
100 int ret;
101
102 ret = i2c_master_send(adc->i2c, &newconfig, 1);
103 if (ret > 0) {
104 adc->config = newconfig;
105 ret = 0;
106 }
107
108 return ret;
109 }
110
mcp3422_read(struct mcp3422 * adc,int * value,u8 * config)111 static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config)
112 {
113 int ret = 0;
114 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
115 u8 buf[4] = {0, 0, 0, 0};
116 u32 temp;
117
118 if (sample_rate == MCP3422_SRATE_3) {
119 ret = i2c_master_recv(adc->i2c, buf, 4);
120 temp = buf[0] << 16 | buf[1] << 8 | buf[2];
121 *config = buf[3];
122 } else {
123 ret = i2c_master_recv(adc->i2c, buf, 3);
124 temp = buf[0] << 8 | buf[1];
125 *config = buf[2];
126 }
127
128 *value = sign_extend32(temp, mcp3422_sign_extend[sample_rate]);
129
130 return ret;
131 }
132
mcp3422_read_channel(struct mcp3422 * adc,struct iio_chan_spec const * channel,int * value)133 static int mcp3422_read_channel(struct mcp3422 *adc,
134 struct iio_chan_spec const *channel, int *value)
135 {
136 int ret;
137 u8 config;
138 u8 req_channel = channel->channel;
139
140 mutex_lock(&adc->lock);
141
142 if (req_channel != MCP3422_CHANNEL(adc->config)) {
143 config = adc->config;
144 config &= ~MCP3422_CHANNEL_MASK;
145 config |= MCP3422_CHANNEL_VALUE(req_channel);
146 config &= ~MCP3422_PGA_MASK;
147 config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
148 ret = mcp3422_update_config(adc, config);
149 if (ret < 0) {
150 mutex_unlock(&adc->lock);
151 return ret;
152 }
153 msleep(mcp3422_read_times[MCP3422_SAMPLE_RATE(adc->config)]);
154 }
155
156 ret = mcp3422_read(adc, value, &config);
157
158 mutex_unlock(&adc->lock);
159
160 return ret;
161 }
162
mcp3422_read_raw(struct iio_dev * iio,struct iio_chan_spec const * channel,int * val1,int * val2,long mask)163 static int mcp3422_read_raw(struct iio_dev *iio,
164 struct iio_chan_spec const *channel, int *val1,
165 int *val2, long mask)
166 {
167 struct mcp3422 *adc = iio_priv(iio);
168 int err;
169
170 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
171 u8 pga = MCP3422_PGA(adc->config);
172
173 switch (mask) {
174 case IIO_CHAN_INFO_RAW:
175 err = mcp3422_read_channel(adc, channel, val1);
176 if (err < 0)
177 return -EINVAL;
178 return IIO_VAL_INT;
179
180 case IIO_CHAN_INFO_SCALE:
181
182 *val1 = 0;
183 *val2 = mcp3422_scales[sample_rate][pga];
184 return IIO_VAL_INT_PLUS_NANO;
185
186 case IIO_CHAN_INFO_SAMP_FREQ:
187 *val1 = mcp3422_sample_rates[MCP3422_SAMPLE_RATE(adc->config)];
188 return IIO_VAL_INT;
189
190 default:
191 break;
192 }
193
194 return -EINVAL;
195 }
196
mcp3422_write_raw(struct iio_dev * iio,struct iio_chan_spec const * channel,int val1,int val2,long mask)197 static int mcp3422_write_raw(struct iio_dev *iio,
198 struct iio_chan_spec const *channel, int val1,
199 int val2, long mask)
200 {
201 struct mcp3422 *adc = iio_priv(iio);
202 u8 temp;
203 u8 config = adc->config;
204 u8 req_channel = channel->channel;
205 u8 sample_rate = MCP3422_SAMPLE_RATE(config);
206 u8 i;
207
208 switch (mask) {
209 case IIO_CHAN_INFO_SCALE:
210 if (val1 != 0)
211 return -EINVAL;
212
213 for (i = 0; i < ARRAY_SIZE(mcp3422_scales[0]); i++) {
214 if (val2 == mcp3422_scales[sample_rate][i]) {
215 adc->pga[req_channel] = i;
216
217 config &= ~MCP3422_CHANNEL_MASK;
218 config |= MCP3422_CHANNEL_VALUE(req_channel);
219 config &= ~MCP3422_PGA_MASK;
220 config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
221
222 return mcp3422_update_config(adc, config);
223 }
224 }
225 return -EINVAL;
226
227 case IIO_CHAN_INFO_SAMP_FREQ:
228 switch (val1) {
229 case 240:
230 temp = MCP3422_SRATE_240;
231 break;
232 case 60:
233 temp = MCP3422_SRATE_60;
234 break;
235 case 15:
236 temp = MCP3422_SRATE_15;
237 break;
238 case 3:
239 if (adc->id > 4)
240 return -EINVAL;
241 temp = MCP3422_SRATE_3;
242 break;
243 default:
244 return -EINVAL;
245 }
246
247 config &= ~MCP3422_CHANNEL_MASK;
248 config |= MCP3422_CHANNEL_VALUE(req_channel);
249 config &= ~MCP3422_SRATE_MASK;
250 config |= MCP3422_SAMPLE_RATE_VALUE(temp);
251
252 return mcp3422_update_config(adc, config);
253
254 default:
255 break;
256 }
257
258 return -EINVAL;
259 }
260
mcp3422_write_raw_get_fmt(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,long mask)261 static int mcp3422_write_raw_get_fmt(struct iio_dev *indio_dev,
262 struct iio_chan_spec const *chan, long mask)
263 {
264 switch (mask) {
265 case IIO_CHAN_INFO_SCALE:
266 return IIO_VAL_INT_PLUS_NANO;
267 case IIO_CHAN_INFO_SAMP_FREQ:
268 return IIO_VAL_INT_PLUS_MICRO;
269 default:
270 return -EINVAL;
271 }
272 }
273
mcp3422_show_samp_freqs(struct device * dev,struct device_attribute * attr,char * buf)274 static ssize_t mcp3422_show_samp_freqs(struct device *dev,
275 struct device_attribute *attr, char *buf)
276 {
277 struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
278
279 if (adc->id > 4)
280 return sprintf(buf, "240 60 15\n");
281
282 return sprintf(buf, "240 60 15 3\n");
283 }
284
mcp3422_show_scales(struct device * dev,struct device_attribute * attr,char * buf)285 static ssize_t mcp3422_show_scales(struct device *dev,
286 struct device_attribute *attr, char *buf)
287 {
288 struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
289 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
290
291 return sprintf(buf, "0.%09u 0.%09u 0.%09u 0.%09u\n",
292 mcp3422_scales[sample_rate][0],
293 mcp3422_scales[sample_rate][1],
294 mcp3422_scales[sample_rate][2],
295 mcp3422_scales[sample_rate][3]);
296 }
297
298 static IIO_DEVICE_ATTR(sampling_frequency_available, S_IRUGO,
299 mcp3422_show_samp_freqs, NULL, 0);
300 static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO,
301 mcp3422_show_scales, NULL, 0);
302
303 static struct attribute *mcp3422_attributes[] = {
304 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
305 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
306 NULL,
307 };
308
309 static const struct attribute_group mcp3422_attribute_group = {
310 .attrs = mcp3422_attributes,
311 };
312
313 static const struct iio_chan_spec mcp3421_channels[] = {
314 MCP3422_CHAN(0),
315 };
316
317 static const struct iio_chan_spec mcp3422_channels[] = {
318 MCP3422_CHAN(0),
319 MCP3422_CHAN(1),
320 };
321
322 static const struct iio_chan_spec mcp3424_channels[] = {
323 MCP3422_CHAN(0),
324 MCP3422_CHAN(1),
325 MCP3422_CHAN(2),
326 MCP3422_CHAN(3),
327 };
328
329 static const struct iio_info mcp3422_info = {
330 .read_raw = mcp3422_read_raw,
331 .write_raw = mcp3422_write_raw,
332 .write_raw_get_fmt = mcp3422_write_raw_get_fmt,
333 .attrs = &mcp3422_attribute_group,
334 };
335
mcp3422_probe(struct i2c_client * client,const struct i2c_device_id * id)336 static int mcp3422_probe(struct i2c_client *client,
337 const struct i2c_device_id *id)
338 {
339 struct iio_dev *indio_dev;
340 struct mcp3422 *adc;
341 int err;
342 u8 config;
343
344 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
345 return -EOPNOTSUPP;
346
347 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adc));
348 if (!indio_dev)
349 return -ENOMEM;
350
351 adc = iio_priv(indio_dev);
352 adc->i2c = client;
353 adc->id = (u8)(id->driver_data);
354
355 mutex_init(&adc->lock);
356
357 indio_dev->dev.parent = &client->dev;
358 indio_dev->dev.of_node = client->dev.of_node;
359 indio_dev->name = dev_name(&client->dev);
360 indio_dev->modes = INDIO_DIRECT_MODE;
361 indio_dev->info = &mcp3422_info;
362
363 switch (adc->id) {
364 case 1:
365 case 5:
366 indio_dev->channels = mcp3421_channels;
367 indio_dev->num_channels = ARRAY_SIZE(mcp3421_channels);
368 break;
369 case 2:
370 case 3:
371 case 6:
372 case 7:
373 indio_dev->channels = mcp3422_channels;
374 indio_dev->num_channels = ARRAY_SIZE(mcp3422_channels);
375 break;
376 case 4:
377 case 8:
378 indio_dev->channels = mcp3424_channels;
379 indio_dev->num_channels = ARRAY_SIZE(mcp3424_channels);
380 break;
381 }
382
383 /* meaningful default configuration */
384 config = (MCP3422_CONT_SAMPLING
385 | MCP3422_CHANNEL_VALUE(0)
386 | MCP3422_PGA_VALUE(MCP3422_PGA_1)
387 | MCP3422_SAMPLE_RATE_VALUE(MCP3422_SRATE_240));
388 err = mcp3422_update_config(adc, config);
389 if (err < 0)
390 return err;
391
392 err = devm_iio_device_register(&client->dev, indio_dev);
393 if (err < 0)
394 return err;
395
396 i2c_set_clientdata(client, indio_dev);
397
398 return 0;
399 }
400
401 static const struct i2c_device_id mcp3422_id[] = {
402 { "mcp3421", 1 },
403 { "mcp3422", 2 },
404 { "mcp3423", 3 },
405 { "mcp3424", 4 },
406 { "mcp3425", 5 },
407 { "mcp3426", 6 },
408 { "mcp3427", 7 },
409 { "mcp3428", 8 },
410 { }
411 };
412 MODULE_DEVICE_TABLE(i2c, mcp3422_id);
413
414 #ifdef CONFIG_OF
415 static const struct of_device_id mcp3422_of_match[] = {
416 { .compatible = "mcp3422" },
417 { }
418 };
419 MODULE_DEVICE_TABLE(of, mcp3422_of_match);
420 #endif
421
422 static struct i2c_driver mcp3422_driver = {
423 .driver = {
424 .name = "mcp3422",
425 .of_match_table = of_match_ptr(mcp3422_of_match),
426 },
427 .probe = mcp3422_probe,
428 .id_table = mcp3422_id,
429 };
430 module_i2c_driver(mcp3422_driver);
431
432 MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
433 MODULE_DESCRIPTION("Microchip mcp3421/2/3/4/5/6/7/8 driver");
434 MODULE_LICENSE("GPL v2");
435