| /linux-4.19.296/drivers/clk/samsung/ |
| D | clk-s3c2410.c | 128 GATE(PCLK_UART0, "uart0", "pclk", CLKCON, 10, 0, 0),
219 ALIAS(PCLK_UART0, "s3c2410-uart.0", "uart"),
222 ALIAS(PCLK_UART0, "s3c2410-uart.0", "clk_uart_baud0"),
307 ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"),
310 ALIAS(PCLK_UART0, "s3c2440-uart.0", "clk_uart_baud2"),
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| D | clk-s3c2412.c | 156 GATE(PCLK_UART0, "uart0", "pclk", CLKCON, 19, 0, 0),
178 ALIAS(PCLK_UART0, "s3c2412-uart.0", "uart"),
181 ALIAS(PCLK_UART0, "s3c2412-uart.0", "clk_uart_baud2"),
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| D | clk-s3c2443.c | 183 GATE(PCLK_UART0, "uart0", "pclk", PCLKCON, 0, 0, 0),
193 ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"),
197 ALIAS(PCLK_UART0, "s3c2440-uart.0", "clk_uart_baud2"),
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| D | clk-s3c64xx.c | 305 GATE_BUS(PCLK_UART0, "pclk_uart0", "pclk", PCLK_GATE, 1),
410 ALIAS(PCLK_UART0, "s3c6400-uart.0", "uart"),
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| /linux-4.19.296/include/dt-bindings/clock/ |
| D | s3c2410.h | 34 #define PCLK_UART0 16 macro
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| D | s3c2412.h | 53 #define PCLK_UART0 41 macro
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| D | s3c2443.h | 71 #define PCLK_UART0 72 macro
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| D | samsung,s3c64xx-clock.h | 91 #define PCLK_UART0 73 macro
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| D | rk3036-cru.h | 77 #define PCLK_UART0 341 macro
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| D | exynos7-clk.h | 81 #define PCLK_UART0 1 macro
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| D | rk3188-cru-common.h | 93 #define PCLK_UART0 332 macro
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| D | rk3128-cru.h | 117 #define PCLK_UART0 341 macro
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| D | rk3228-cru.h | 115 #define PCLK_UART0 341 macro
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| D | rv1108-cru.h | 125 #define PCLK_UART0 265 macro
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| D | rk3288-cru.h | 142 #define PCLK_UART0 341 macro
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| D | rk3368-cru.h | 133 #define PCLK_UART0 341 macro
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| D | rk3328-cru.h | 150 #define PCLK_UART0 210 macro
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| D | rk3399-cru.h | 256 #define PCLK_UART0 352 macro
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| /linux-4.19.296/drivers/clk/rockchip/ |
| D | clk-rk3188.c | 658 GATE(PCLK_UART0, "pclk_uart0", "pclk_cpu", 0, RK2928_CLKGATE_CON(8), 0, GFLAGS),
748 GATE(PCLK_UART0, "pclk_uart0", "hclk_ahb2apb", 0, RK2928_CLKGATE_CON(8), 0, GFLAGS),
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| D | clk-rk3036.c | 423 GATE(PCLK_UART0, "pclk_uart0", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 0, GFLAGS),
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| D | clk-rk3128.c | 515 GATE(PCLK_UART0, "pclk_uart0", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 0, GFLAGS),
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| D | clk-rk3228.c | 619 GATE(PCLK_UART0, "pclk_uart0", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 12, GFLAGS),
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| D | clk-rk3328.c | 790 GATE(PCLK_UART0, "pclk_uart0", "pclk_bus", 0, RK3328_CLKGATE_CON(16), 11, GFLAGS),
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| D | clk-rv1108.c | 613 GATE(PCLK_UART0, "pclk_uart0", "pclk_bus_pre", 0,
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| D | clk-rk3368.c | 805 GATE(PCLK_UART0, "pclk_uart0", "pclk_peri", 0, RK3368_CLKGATE_CON(19), 7, GFLAGS),
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