Searched refs:PLLC4_OUT (Results 1 – 1 of 1) sorted by relevance
109 #define PLLC4_OUT 0x5e4 macro3244 clk_base + PLLC4_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra210_pll_init()3247 clk_base + PLLC4_OUT, 1, 0, in tegra210_pll_init()