Searched refs:PLLD_BASE (Results 1 – 5 of 5) sorted by relevance
| /linux-4.19.296/drivers/clk/tegra/ |
| D | clk-tegra124.c | 60 #define PLLD_BASE 0xd0 macro
621 .base_reg = PLLD_BASE,
1469 plld_base = clk_readl(clk_base + PLLD_BASE); in tegra124_132_clock_init_pre()
1471 clk_writel(plld_base, clk_base + PLLD_BASE); in tegra124_132_clock_init_pre()
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| D | clk-tegra114.c | 76 #define PLLD_BASE 0xd0 macro
423 .base_reg = PLLD_BASE,
1058 clk_base + PLLD_BASE, 25, 1, 0, &pll_d_lock); in tegra114_periph_clk_init()
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| D | clk-tegra210.c | 79 #define PLLD_BASE 0xd0 macro
580 csi_src = readl_relaxed(clk_base + PLLD_BASE); in tegra210_venc_mbist_war()
581 writel_relaxed(csi_src | PLLD_BASE_CSI_CLKSOURCE, clk_base + PLLD_BASE); in tegra210_venc_mbist_war()
592 writel_relaxed(csi_src, clk_base + PLLD_BASE); in tegra210_venc_mbist_war()
2095 .base_reg = PLLD_BASE,
3579 value = clk_readl(clk_base + PLLD_BASE); in tegra210_clock_init()
3581 clk_writel(value, clk_base + PLLD_BASE); in tegra210_clock_init()
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| D | clk-tegra20.c | 65 #define PLLD_BASE 0xd0 macro
361 .base_reg = PLLD_BASE,
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| D | clk-tegra30.c | 74 #define PLLD_BASE 0xd0 macro
454 .base_reg = PLLD_BASE,
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