Searched refs:PLLU_BASE (Results 1 – 5 of 5) sorted by relevance
| /linux-4.19.296/drivers/clk/tegra/ |
| D | clk-tegra210.c | 82 #define PLLU_BASE 0xc0 macro
2230 .base_reg = PLLU_BASE,
2851 reg = readl_relaxed(clk_base + PLLU_BASE); in tegra210_enable_pllu()
2856 writel(reg, clk_base + PLLU_BASE); in tegra210_enable_pllu()
2859 writel(reg, clk_base + PLLU_BASE); in tegra210_enable_pllu()
2861 readl_relaxed_poll_timeout_atomic(clk_base + PLLU_BASE, reg, in tegra210_enable_pllu()
2878 reg = readl_relaxed(clk_base + PLLU_BASE); in tegra210_init_pllu()
2888 reg = readl_relaxed(clk_base + PLLU_BASE); in tegra210_init_pllu()
2890 writel(reg, clk_base + PLLU_BASE); in tegra210_init_pllu()
2910 reg = readl_relaxed(clk_base + PLLU_BASE); in tegra210_init_pllu()
[all …]
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| D | clk-tegra114.c | 84 #define PLLU_BASE 0xc0 macro
483 .base_reg = PLLU_BASE,
981 CLK_SET_RATE_PARENT, clk_base + PLLU_BASE, in tegra114_pll_init()
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| D | clk-tegra124.c | 62 #define PLLU_BASE 0xc0 macro
729 .base_reg = PLLU_BASE,
1120 CLK_SET_RATE_PARENT, clk_base + PLLU_BASE, in tegra124_pll_init()
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| D | clk-tegra20.c | 63 #define PLLU_BASE 0xc0 macro
383 .base_reg = PLLU_BASE,
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| D | clk-tegra30.c | 82 #define PLLU_BASE 0xc0 macro
488 .base_reg = PLLU_BASE,
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