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Searched refs:PLL_BASE_ENABLE (Results 1 – 1 of 1) sorted by relevance

/linux-4.19.296/drivers/clk/tegra/
Dclk-pll.c27 #define PLL_BASE_ENABLE BIT(30) macro
354 return val & PLL_BASE_ENABLE ? 1 : 0; in clk_pll_is_enabled()
380 val |= PLL_BASE_ENABLE; in _clk_pll_enable()
398 val &= ~PLL_BASE_ENABLE; in _clk_pll_disable()
987 val |= (PLL_BASE_BYPASS | PLL_BASE_ENABLE); in clk_plle_enable()
2016 if (val & PLL_BASE_ENABLE) in tegra_clk_register_pllxc()
2060 if (val & PLL_BASE_ENABLE) in tegra_clk_register_pllre()
2221 if (val & PLL_BASE_ENABLE) { in tegra_clk_register_plle_tegra114()
2331 if (val & PLL_BASE_ENABLE) { in tegra_clk_register_pllss()